2014-11-24 17:21:54 +08:00
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/*
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* intel_pmic_crc.c - Intel CrystalCove PMIC operation region driver
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*
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* Copyright (C) 2014 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/acpi.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include "intel_pmic.h"
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#define PWR_SOURCE_SELECT BIT(1)
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#define PMIC_A0LOCK_REG 0xc5
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static struct pmic_table power_table[] = {
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{
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.address = 0x24,
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.reg = 0x66,
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.bit = 0x00,
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},
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{
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.address = 0x48,
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.reg = 0x5d,
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.bit = 0x00,
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},
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};
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static struct pmic_table thermal_table[] = {
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{
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.address = 0x00,
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.reg = 0x75
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},
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{
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.address = 0x04,
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.reg = 0x95
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},
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{
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.address = 0x08,
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.reg = 0x97
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},
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{
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.address = 0x0c,
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.reg = 0x77
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},
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{
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.address = 0x10,
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.reg = 0x9a
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},
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{
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.address = 0x14,
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.reg = 0x9c
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},
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{
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.address = 0x18,
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.reg = 0x79
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},
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{
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.address = 0x1c,
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.reg = 0x9f
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},
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{
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.address = 0x20,
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.reg = 0xa1
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},
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{
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.address = 0x48,
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.reg = 0x94
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},
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{
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.address = 0x4c,
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.reg = 0x99
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},
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{
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.address = 0x50,
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.reg = 0x9e
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},
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};
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static int intel_crc_pmic_get_power(struct regmap *regmap, int reg,
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int bit, u64 *value)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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*value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0;
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return 0;
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}
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static int intel_crc_pmic_update_power(struct regmap *regmap, int reg,
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int bit, bool on)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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if (on) {
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data |= PWR_SOURCE_SELECT | BIT(bit);
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} else {
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data &= ~BIT(bit);
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data |= PWR_SOURCE_SELECT;
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}
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if (regmap_write(regmap, reg, data))
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return -EIO;
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return 0;
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}
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static int intel_crc_pmic_get_raw_temp(struct regmap *regmap, int reg)
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{
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int temp_l, temp_h;
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/*
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* Raw temperature value is 10bits: 8bits in reg
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* and 2bits in reg-1: bit0,1
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*/
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if (regmap_read(regmap, reg, &temp_l) ||
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regmap_read(regmap, reg - 1, &temp_h))
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return -EIO;
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return temp_l | (temp_h & 0x3) << 8;
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}
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static int intel_crc_pmic_update_aux(struct regmap *regmap, int reg, int raw)
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{
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return regmap_write(regmap, reg, raw) ||
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regmap_update_bits(regmap, reg - 1, 0x3, raw >> 8) ? -EIO : 0;
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}
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static int intel_crc_pmic_get_policy(struct regmap *regmap, int reg, u64 *value)
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{
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int pen;
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if (regmap_read(regmap, reg, &pen))
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return -EIO;
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*value = pen >> 7;
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return 0;
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}
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static int intel_crc_pmic_update_policy(struct regmap *regmap,
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int reg, int enable)
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{
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int alert0;
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/* Update to policy enable bit requires unlocking a0lock */
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if (regmap_read(regmap, PMIC_A0LOCK_REG, &alert0))
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return -EIO;
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if (regmap_update_bits(regmap, PMIC_A0LOCK_REG, 0x01, 0))
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return -EIO;
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if (regmap_update_bits(regmap, reg, 0x80, enable << 7))
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return -EIO;
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/* restore alert0 */
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if (regmap_write(regmap, PMIC_A0LOCK_REG, alert0))
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return -EIO;
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return 0;
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}
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static struct intel_pmic_opregion_data intel_crc_pmic_opregion_data = {
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.get_power = intel_crc_pmic_get_power,
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.update_power = intel_crc_pmic_update_power,
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.get_raw_temp = intel_crc_pmic_get_raw_temp,
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.update_aux = intel_crc_pmic_update_aux,
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.get_policy = intel_crc_pmic_get_policy,
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.update_policy = intel_crc_pmic_update_policy,
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.power_table = power_table,
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.power_table_count= ARRAY_SIZE(power_table),
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.thermal_table = thermal_table,
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.thermal_table_count = ARRAY_SIZE(thermal_table),
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};
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static int intel_crc_pmic_opregion_probe(struct platform_device *pdev)
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{
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struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
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return intel_pmic_install_opregion_handler(&pdev->dev,
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ACPI_HANDLE(pdev->dev.parent), pmic->regmap,
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&intel_crc_pmic_opregion_data);
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}
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static struct platform_driver intel_crc_pmic_opregion_driver = {
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.probe = intel_crc_pmic_opregion_probe,
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.driver = {
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.name = "crystal_cove_pmic",
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},
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};
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static int __init intel_crc_pmic_opregion_driver_init(void)
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{
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return platform_driver_register(&intel_crc_pmic_opregion_driver);
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}
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module_init(intel_crc_pmic_opregion_driver_init);
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2015-03-25 22:13:08 +08:00
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MODULE_DESCRIPTION("CrystalCove ACPI operation region driver");
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2014-11-24 17:21:54 +08:00
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MODULE_LICENSE("GPL");
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