2014-01-24 18:56:19 +08:00
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#include <linux/percpu.h>
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arm64: kernel: cpu_{suspend/resume} implementation
Kernel subsystems like CPU idle and suspend to RAM require a generic
mechanism to suspend a processor, save its context and put it into
a quiescent state. The cpu_{suspend}/{resume} implementation provides
such a framework through a kernel interface allowing to save/restore
registers, flush the context to DRAM and suspend/resume to/from
low-power states where processor context may be lost.
The CPU suspend implementation relies on the suspend protocol registered
in CPU operations to carry out a suspend request after context is
saved and flushed to DRAM. The cpu_suspend interface:
int cpu_suspend(unsigned long arg);
allows to pass an opaque parameter that is handed over to the suspend CPU
operations back-end so that it can take action according to the
semantics attached to it. The arg parameter allows suspend to RAM and CPU
idle drivers to communicate to suspend protocol back-ends; it requires
standardization so that the interface can be reused seamlessly across
systems, paving the way for generic drivers.
Context memory is allocated on the stack, whose address is stashed in a
per-cpu variable to keep track of it and passed to core functions that
save/restore the registers required by the architecture.
Even though, upon successful execution, the cpu_suspend function shuts
down the suspending processor, the warm boot resume mechanism, based
on the cpu_resume function, makes the resume path operate as a
cpu_suspend function return, so that cpu_suspend can be treated as a C
function by the caller, which simplifies coding the PM drivers that rely
on the cpu_suspend API.
Upon context save, the minimal amount of memory is flushed to DRAM so
that it can be retrieved when the MMU is off and caches are not searched.
The suspend CPU operation, depending on the required operations (eg CPU vs
Cluster shutdown) is in charge of flushing the cache hierarchy either
implicitly (by calling firmware implementations like PSCI) or explicitly
by executing the required cache maintainance functions.
Debug exceptions are disabled during cpu_{suspend}/{resume} operations
so that debug registers can be saved and restored properly preventing
preemption from debug agents enabled in the kernel.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-07-22 19:22:13 +08:00
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu_ops.h>
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#include <asm/debug-monitors.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend(unsigned long);
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/*
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* This is called by __cpu_suspend() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*
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* @arg: Argument to pass to suspend operations
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* @ptr: CPU context virtual address
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* @save_ptr: address of the location where the context physical address
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* must be saved
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*/
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int __cpu_suspend_finisher(unsigned long arg, struct cpu_suspend_ctx *ptr,
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phys_addr_t *save_ptr)
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{
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int cpu = smp_processor_id();
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*save_ptr = virt_to_phys(ptr);
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cpu_do_suspend(ptr);
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/*
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* Only flush the context that must be retrieved with the MMU
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* off. VA primitives ensure the flush is applied to all
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* cache levels so context is pushed to DRAM.
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*/
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__flush_dcache_area(ptr, sizeof(*ptr));
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__flush_dcache_area(save_ptr, sizeof(*save_ptr));
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return cpu_ops[cpu]->cpu_suspend(arg);
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}
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2014-01-10 21:15:05 +08:00
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/*
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* This hook is provided so that cpu_suspend code can restore HW
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* breakpoints as early as possible in the resume path, before reenabling
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* debug exceptions. Code cannot be run from a CPU PM notifier since by the
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* time the notifier runs debug exceptions might have been enabled already,
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* with HW breakpoints registers content still in an unknown state.
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*/
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void (*hw_breakpoint_restore)(void *);
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void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
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{
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/* Prevent multiple restore hook initializations */
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if (WARN_ON(hw_breakpoint_restore))
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return;
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hw_breakpoint_restore = hw_bp_restore;
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}
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arm64: kernel: cpu_{suspend/resume} implementation
Kernel subsystems like CPU idle and suspend to RAM require a generic
mechanism to suspend a processor, save its context and put it into
a quiescent state. The cpu_{suspend}/{resume} implementation provides
such a framework through a kernel interface allowing to save/restore
registers, flush the context to DRAM and suspend/resume to/from
low-power states where processor context may be lost.
The CPU suspend implementation relies on the suspend protocol registered
in CPU operations to carry out a suspend request after context is
saved and flushed to DRAM. The cpu_suspend interface:
int cpu_suspend(unsigned long arg);
allows to pass an opaque parameter that is handed over to the suspend CPU
operations back-end so that it can take action according to the
semantics attached to it. The arg parameter allows suspend to RAM and CPU
idle drivers to communicate to suspend protocol back-ends; it requires
standardization so that the interface can be reused seamlessly across
systems, paving the way for generic drivers.
Context memory is allocated on the stack, whose address is stashed in a
per-cpu variable to keep track of it and passed to core functions that
save/restore the registers required by the architecture.
Even though, upon successful execution, the cpu_suspend function shuts
down the suspending processor, the warm boot resume mechanism, based
on the cpu_resume function, makes the resume path operate as a
cpu_suspend function return, so that cpu_suspend can be treated as a C
function by the caller, which simplifies coding the PM drivers that rely
on the cpu_suspend API.
Upon context save, the minimal amount of memory is flushed to DRAM so
that it can be retrieved when the MMU is off and caches are not searched.
The suspend CPU operation, depending on the required operations (eg CPU vs
Cluster shutdown) is in charge of flushing the cache hierarchy either
implicitly (by calling firmware implementations like PSCI) or explicitly
by executing the required cache maintainance functions.
Debug exceptions are disabled during cpu_{suspend}/{resume} operations
so that debug registers can be saved and restored properly preventing
preemption from debug agents enabled in the kernel.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-07-22 19:22:13 +08:00
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/**
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* cpu_suspend
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*
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* @arg: argument to pass to the finisher function
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*/
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int cpu_suspend(unsigned long arg)
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{
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struct mm_struct *mm = current->active_mm;
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int ret, cpu = smp_processor_id();
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unsigned long flags;
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/*
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* If cpu_ops have not been registered or suspend
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* has not been initialized, cpu_suspend call fails early.
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*/
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if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_suspend)
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return -EOPNOTSUPP;
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/*
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* From this point debug exceptions are disabled to prevent
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* updates to mdscr register (saved and restored along with
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* general purpose registers) from kernel debuggers.
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*/
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local_dbg_save(flags);
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/*
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* mm context saved on the stack, it will be restored when
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* the cpu comes out of reset through the identity mapped
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* page tables, so that the thread address space is properly
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* set-up on function return.
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*/
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ret = __cpu_suspend(arg);
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if (ret == 0) {
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cpu_switch_mm(mm->pgd, mm);
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flush_tlb_all();
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2014-01-24 18:56:19 +08:00
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/*
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* Restore per-cpu offset before any kernel
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* subsystem relying on it has a chance to run.
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*/
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set_my_cpu_offset(per_cpu_offset(cpu));
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2014-01-10 21:15:05 +08:00
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/*
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* Restore HW breakpoint registers to sane values
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* before debug exceptions are possibly reenabled
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* through local_dbg_restore.
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*/
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if (hw_breakpoint_restore)
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hw_breakpoint_restore(NULL);
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arm64: kernel: cpu_{suspend/resume} implementation
Kernel subsystems like CPU idle and suspend to RAM require a generic
mechanism to suspend a processor, save its context and put it into
a quiescent state. The cpu_{suspend}/{resume} implementation provides
such a framework through a kernel interface allowing to save/restore
registers, flush the context to DRAM and suspend/resume to/from
low-power states where processor context may be lost.
The CPU suspend implementation relies on the suspend protocol registered
in CPU operations to carry out a suspend request after context is
saved and flushed to DRAM. The cpu_suspend interface:
int cpu_suspend(unsigned long arg);
allows to pass an opaque parameter that is handed over to the suspend CPU
operations back-end so that it can take action according to the
semantics attached to it. The arg parameter allows suspend to RAM and CPU
idle drivers to communicate to suspend protocol back-ends; it requires
standardization so that the interface can be reused seamlessly across
systems, paving the way for generic drivers.
Context memory is allocated on the stack, whose address is stashed in a
per-cpu variable to keep track of it and passed to core functions that
save/restore the registers required by the architecture.
Even though, upon successful execution, the cpu_suspend function shuts
down the suspending processor, the warm boot resume mechanism, based
on the cpu_resume function, makes the resume path operate as a
cpu_suspend function return, so that cpu_suspend can be treated as a C
function by the caller, which simplifies coding the PM drivers that rely
on the cpu_suspend API.
Upon context save, the minimal amount of memory is flushed to DRAM so
that it can be retrieved when the MMU is off and caches are not searched.
The suspend CPU operation, depending on the required operations (eg CPU vs
Cluster shutdown) is in charge of flushing the cache hierarchy either
implicitly (by calling firmware implementations like PSCI) or explicitly
by executing the required cache maintainance functions.
Debug exceptions are disabled during cpu_{suspend}/{resume} operations
so that debug registers can be saved and restored properly preventing
preemption from debug agents enabled in the kernel.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-07-22 19:22:13 +08:00
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}
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/*
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* Restore pstate flags. OS lock and mdscr have been already
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* restored, so from this point onwards, debugging is fully
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* renabled if it was enabled when core started shutdown.
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*/
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local_dbg_restore(flags);
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return ret;
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}
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extern struct sleep_save_sp sleep_save_sp;
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extern phys_addr_t sleep_idmap_phys;
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static int cpu_suspend_init(void)
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{
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void *ctx_ptr;
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/* ctx_ptr is an array of physical addresses */
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ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(phys_addr_t), GFP_KERNEL);
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if (WARN_ON(!ctx_ptr))
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return -ENOMEM;
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sleep_save_sp.save_ptr_stash = ctx_ptr;
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sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
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sleep_idmap_phys = virt_to_phys(idmap_pg_dir);
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__flush_dcache_area(&sleep_save_sp, sizeof(struct sleep_save_sp));
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__flush_dcache_area(&sleep_idmap_phys, sizeof(sleep_idmap_phys));
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return 0;
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}
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early_initcall(cpu_suspend_init);
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