2009-06-05 20:42:42 +08:00
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/*
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* Copyright 2009 Jerome Glisse.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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* Dave Airlie
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*/
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#include <linux/seq_file.h>
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#include <asm/atomic.h>
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#include <linux/wait.h>
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#include <linux/list.h>
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#include <linux/kref.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-06-05 20:42:42 +08:00
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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if (fence->emited) {
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
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if (!rdev->cp.ready) {
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/* FIXME: cp is not running assume everythings is done right
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* away
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*/
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WREG32(rdev->fence_drv.scratch_reg, fence->seq);
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2009-09-08 08:10:24 +08:00
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} else
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2009-06-05 20:42:42 +08:00
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radeon_fence_ring_emit(rdev, fence);
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2009-09-08 08:10:24 +08:00
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2009-06-05 20:42:42 +08:00
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fence->emited = true;
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list_del(&fence->list);
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list_add_tail(&fence->list, &rdev->fence_drv.emited);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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static bool radeon_fence_poll_locked(struct radeon_device *rdev)
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{
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struct radeon_fence *fence;
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struct list_head *i, *n;
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uint32_t seq;
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bool wake = false;
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2010-03-09 22:45:10 +08:00
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unsigned long cjiffies;
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2009-06-05 20:42:42 +08:00
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2010-08-28 06:25:25 +08:00
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if (rdev->wb.enabled) {
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2010-09-04 17:04:34 +08:00
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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2010-08-28 06:25:25 +08:00
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seq = rdev->wb.wb[scratch_index/4];
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} else
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seq = RREG32(rdev->fence_drv.scratch_reg);
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2010-03-09 22:45:10 +08:00
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if (seq != rdev->fence_drv.last_seq) {
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rdev->fence_drv.last_seq = seq;
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rdev->fence_drv.last_jiffies = jiffies;
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rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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} else {
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cjiffies = jiffies;
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if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
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cjiffies -= rdev->fence_drv.last_jiffies;
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if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
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/* update the timeout */
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rdev->fence_drv.last_timeout -= cjiffies;
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} else {
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/* the 500ms timeout is elapsed we should test
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* for GPU lockup
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*/
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rdev->fence_drv.last_timeout = 1;
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}
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} else {
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/* wrap around update last jiffies, we will just wait
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* a little longer
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*/
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rdev->fence_drv.last_jiffies = cjiffies;
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}
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return false;
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}
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2009-06-05 20:42:42 +08:00
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n = NULL;
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list_for_each(i, &rdev->fence_drv.emited) {
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fence = list_entry(i, struct radeon_fence, list);
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if (fence->seq == seq) {
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n = i;
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break;
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}
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}
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/* all fence previous to this one are considered as signaled */
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if (n) {
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i = n;
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do {
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n = i->prev;
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list_del(i);
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list_add_tail(i, &rdev->fence_drv.signaled);
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fence = list_entry(i, struct radeon_fence, list);
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fence->signaled = true;
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i = n;
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} while (i != &rdev->fence_drv.emited);
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wake = true;
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}
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return wake;
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}
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static void radeon_fence_destroy(struct kref *kref)
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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fence = container_of(kref, struct radeon_fence, kref);
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write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
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list_del(&fence->list);
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fence->emited = false;
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write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
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kfree(fence);
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}
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int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
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{
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unsigned long irq_flags;
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*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
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if ((*fence) == NULL) {
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return -ENOMEM;
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}
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kref_init(&((*fence)->kref));
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(*fence)->rdev = rdev;
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(*fence)->emited = false;
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(*fence)->signaled = false;
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(*fence)->seq = 0;
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INIT_LIST_HEAD(&(*fence)->list);
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return 0;
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}
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bool radeon_fence_signaled(struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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bool signaled = false;
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2009-12-30 09:20:05 +08:00
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if (!fence)
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2009-06-05 20:42:42 +08:00
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return true;
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2009-12-30 09:20:05 +08:00
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if (fence->rdev->gpu_lockup)
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2009-06-05 20:42:42 +08:00
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return true;
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2009-12-30 09:20:05 +08:00
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2009-06-05 20:42:42 +08:00
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write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
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signaled = fence->signaled;
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/* if we are shuting down report all fence as signaled */
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if (fence->rdev->shutdown) {
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signaled = true;
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}
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if (!fence->emited) {
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WARN(1, "Querying an unemited fence : %p !\n", fence);
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signaled = true;
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}
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if (!signaled) {
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radeon_fence_poll_locked(fence->rdev);
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signaled = fence->signaled;
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}
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write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
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return signaled;
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}
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2009-09-08 08:10:24 +08:00
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int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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2009-06-05 20:42:42 +08:00
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{
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struct radeon_device *rdev;
|
2010-03-09 22:45:10 +08:00
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unsigned long irq_flags, timeout;
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u32 seq;
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2009-06-05 20:42:42 +08:00
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int r;
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if (fence == NULL) {
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WARN(1, "Querying an invalid fence : %p !\n", fence);
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return 0;
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}
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rdev = fence->rdev;
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if (radeon_fence_signaled(fence)) {
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return 0;
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}
|
2010-03-09 22:45:10 +08:00
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timeout = rdev->fence_drv.last_timeout;
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2009-06-05 20:42:42 +08:00
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retry:
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2010-03-09 22:45:10 +08:00
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/* save current sequence used to check for GPU lockup */
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seq = rdev->fence_drv.last_seq;
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2009-09-08 08:10:24 +08:00
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if (intr) {
|
2009-12-01 14:04:56 +08:00
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radeon_irq_kms_sw_irq_get(rdev);
|
2009-06-05 20:42:42 +08:00
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r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
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radeon_fence_signaled(fence), timeout);
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2009-12-01 14:04:56 +08:00
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radeon_irq_kms_sw_irq_put(rdev);
|
2010-03-09 22:45:12 +08:00
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if (unlikely(r < 0)) {
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2009-12-08 01:36:19 +08:00
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return r;
|
2010-03-09 22:45:12 +08:00
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}
|
2009-06-05 20:42:42 +08:00
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} else {
|
2009-12-01 14:04:56 +08:00
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radeon_irq_kms_sw_irq_get(rdev);
|
2009-06-05 20:42:42 +08:00
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r = wait_event_timeout(rdev->fence_drv.queue,
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radeon_fence_signaled(fence), timeout);
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2009-12-01 14:04:56 +08:00
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radeon_irq_kms_sw_irq_put(rdev);
|
2009-06-05 20:42:42 +08:00
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}
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if (unlikely(!radeon_fence_signaled(fence))) {
|
2010-03-09 22:45:10 +08:00
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/* we were interrupted for some reason and fence isn't
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* isn't signaled yet, resume wait
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*/
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if (r) {
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timeout = r;
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goto retry;
|
2009-06-05 20:42:42 +08:00
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}
|
2010-03-09 22:45:10 +08:00
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/* don't protect read access to rdev->fence_drv.last_seq
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* if we experiencing a lockup the value doesn't change
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*/
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if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
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/* good news we believe it's a lockup */
|
2010-03-09 22:45:12 +08:00
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WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
|
2010-03-09 22:45:10 +08:00
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/* FIXME: what should we do ? marking everyone
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* as signaled for now
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*/
|
2010-03-09 22:45:12 +08:00
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rdev->gpu_lockup = true;
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r = radeon_gpu_reset(rdev);
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if (r)
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return r;
|
2010-04-27 04:23:42 +08:00
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WREG32(rdev->fence_drv.scratch_reg, fence->seq);
|
2010-03-09 22:45:12 +08:00
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rdev->gpu_lockup = false;
|
2009-06-05 20:42:42 +08:00
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}
|
2010-03-09 22:45:10 +08:00
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timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
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rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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rdev->fence_drv.last_jiffies = jiffies;
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
2009-06-05 20:42:42 +08:00
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goto retry;
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}
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return 0;
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}
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|
|
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int radeon_fence_wait_next(struct radeon_device *rdev)
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|
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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int r;
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|
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if (rdev->gpu_lockup) {
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return 0;
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}
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|
|
write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
if (list_empty(&rdev->fence_drv.emited)) {
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
fence = list_entry(rdev->fence_drv.emited.next,
|
|
|
|
struct radeon_fence, list);
|
|
|
|
radeon_fence_ref(fence);
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
r = radeon_fence_wait(fence, false);
|
|
|
|
radeon_fence_unref(&fence);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
int radeon_fence_wait_last(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
unsigned long irq_flags;
|
|
|
|
struct radeon_fence *fence;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (rdev->gpu_lockup) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
if (list_empty(&rdev->fence_drv.emited)) {
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
fence = list_entry(rdev->fence_drv.emited.prev,
|
|
|
|
struct radeon_fence, list);
|
|
|
|
radeon_fence_ref(fence);
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
r = radeon_fence_wait(fence, false);
|
|
|
|
radeon_fence_unref(&fence);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
|
|
|
|
{
|
|
|
|
kref_get(&fence->kref);
|
|
|
|
return fence;
|
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_fence_unref(struct radeon_fence **fence)
|
|
|
|
{
|
|
|
|
struct radeon_fence *tmp = *fence;
|
|
|
|
|
|
|
|
*fence = NULL;
|
|
|
|
if (tmp) {
|
|
|
|
kref_put(&tmp->kref, &radeon_fence_destroy);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_fence_process(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
unsigned long irq_flags;
|
|
|
|
bool wake;
|
|
|
|
|
|
|
|
write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
wake = radeon_fence_poll_locked(rdev);
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
if (wake) {
|
|
|
|
wake_up_all(&rdev->fence_drv.queue);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int radeon_fence_driver_init(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
unsigned long irq_flags;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
|
|
|
|
if (r) {
|
2009-12-12 03:36:19 +08:00
|
|
|
dev_err(rdev->dev, "fence failed to get scratch register\n");
|
2009-06-05 20:42:42 +08:00
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
WREG32(rdev->fence_drv.scratch_reg, 0);
|
|
|
|
atomic_set(&rdev->fence_drv.seq, 0);
|
|
|
|
INIT_LIST_HEAD(&rdev->fence_drv.created);
|
|
|
|
INIT_LIST_HEAD(&rdev->fence_drv.emited);
|
|
|
|
INIT_LIST_HEAD(&rdev->fence_drv.signaled);
|
|
|
|
init_waitqueue_head(&rdev->fence_drv.queue);
|
2009-12-12 03:36:19 +08:00
|
|
|
rdev->fence_drv.initialized = true;
|
2009-06-05 20:42:42 +08:00
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
if (radeon_debugfs_fence_init(rdev)) {
|
2009-12-12 03:36:19 +08:00
|
|
|
dev_err(rdev->dev, "fence debugfs file creation failed\n");
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_fence_driver_fini(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
unsigned long irq_flags;
|
|
|
|
|
2009-12-12 03:36:19 +08:00
|
|
|
if (!rdev->fence_drv.initialized)
|
|
|
|
return;
|
2009-06-05 20:42:42 +08:00
|
|
|
wake_up_all(&rdev->fence_drv.queue);
|
|
|
|
write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
|
|
|
|
radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
|
|
|
|
write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
|
2009-12-12 03:36:19 +08:00
|
|
|
rdev->fence_drv.initialized = false;
|
2009-06-05 20:42:42 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Fence debugfs
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *)m->private;
|
|
|
|
struct drm_device *dev = node->minor->dev;
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
|
|
struct radeon_fence *fence;
|
|
|
|
|
|
|
|
seq_printf(m, "Last signaled fence 0x%08X\n",
|
|
|
|
RREG32(rdev->fence_drv.scratch_reg));
|
|
|
|
if (!list_empty(&rdev->fence_drv.emited)) {
|
|
|
|
fence = list_entry(rdev->fence_drv.emited.prev,
|
|
|
|
struct radeon_fence, list);
|
|
|
|
seq_printf(m, "Last emited fence %p with 0x%08X\n",
|
|
|
|
fence, fence->seq);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct drm_info_list radeon_debugfs_fence_list[] = {
|
|
|
|
{"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
|
|
|
int radeon_debugfs_fence_init(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|