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linux/arch/arm/plat-mxc/include/mach/sdma.h

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dmaengine: Add Freescale i.MX SDMA support This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-09-30 21:56:34 +08:00
#ifndef __MACH_MXC_SDMA_H__
#define __MACH_MXC_SDMA_H__
dmaengine i.MX SDMA: Allow to run without firmware The SDMA firmware consists of a ROM part and a RAM part. The ROM part is always present in the SDMA engine and is sufficient for many cases. This patch allows to pass in platform data containing the script addresses in ROM, so loading a firmware is optional now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Dan Williams <dan.j.williams@intel.com>
2010-10-06 21:41:15 +08:00
/**
* struct sdma_script_start_addrs - SDMA script start pointers
*
* start addresses of the different functions in the physical
* address space of the SDMA engine.
*/
struct sdma_script_start_addrs {
s32 ap_2_ap_addr;
s32 ap_2_bp_addr;
s32 ap_2_ap_fixed_addr;
s32 bp_2_ap_addr;
s32 loopback_on_dsp_side_addr;
s32 mcu_interrupt_only_addr;
s32 firi_2_per_addr;
s32 firi_2_mcu_addr;
s32 per_2_firi_addr;
s32 mcu_2_firi_addr;
s32 uart_2_per_addr;
s32 uart_2_mcu_addr;
s32 per_2_app_addr;
s32 mcu_2_app_addr;
s32 per_2_per_addr;
s32 uartsh_2_per_addr;
s32 uartsh_2_mcu_addr;
s32 per_2_shp_addr;
s32 mcu_2_shp_addr;
s32 ata_2_mcu_addr;
s32 mcu_2_ata_addr;
s32 app_2_per_addr;
s32 app_2_mcu_addr;
s32 shp_2_per_addr;
s32 shp_2_mcu_addr;
s32 mshc_2_mcu_addr;
s32 mcu_2_mshc_addr;
s32 spdif_2_mcu_addr;
s32 mcu_2_spdif_addr;
s32 asrc_2_mcu_addr;
s32 ext_mem_2_ipu_addr;
s32 descrambler_addr;
s32 dptc_dvfs_addr;
s32 utra_addr;
s32 ram_code_start_addr;
};
dmaengine: Add Freescale i.MX SDMA support This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-09-30 21:56:34 +08:00
/**
* struct sdma_platform_data - platform specific data for SDMA engine
*
dmaengine: imx-sdma: pass sdma firmware name via platform data It is not good to have cpu_name and to_version encoded into sdma firmware name as variables. For example, there are three TOs of imx51 soc, the sdma script never changes since TO1, which means all three TOs of imx51 uses TO1 version of sdma script. But we have to prepare three identical firmwares, sdma-imx51-to1.bin sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel capable of running on all three TOs. The patch removes cpu_name and to_version from sdma platform data, and instead uses fw_name to pass the firmware name, so that we can pass the TO version where it's relevant and skip it where only one firmware exists. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-06-22 22:41:31 +08:00
* @fw_name The firmware name
dmaengine i.MX SDMA: Allow to run without firmware The SDMA firmware consists of a ROM part and a RAM part. The ROM part is always present in the SDMA engine and is sufficient for many cases. This patch allows to pass in platform data containing the script addresses in ROM, so loading a firmware is optional now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Dan Williams <dan.j.williams@intel.com>
2010-10-06 21:41:15 +08:00
* @script_addrs SDMA scripts addresses in SDMA ROM
dmaengine: Add Freescale i.MX SDMA support This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-09-30 21:56:34 +08:00
*/
struct sdma_platform_data {
dmaengine: imx-sdma: pass sdma firmware name via platform data It is not good to have cpu_name and to_version encoded into sdma firmware name as variables. For example, there are three TOs of imx51 soc, the sdma script never changes since TO1, which means all three TOs of imx51 uses TO1 version of sdma script. But we have to prepare three identical firmwares, sdma-imx51-to1.bin sdma-imx51-to2.bin and sdma-imx51-to3.bin, to have the kernel capable of running on all three TOs. The patch removes cpu_name and to_version from sdma platform data, and instead uses fw_name to pass the firmware name, so that we can pass the TO version where it's relevant and skip it where only one firmware exists. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-06-22 22:41:31 +08:00
char *fw_name;
dmaengine i.MX SDMA: Allow to run without firmware The SDMA firmware consists of a ROM part and a RAM part. The ROM part is always present in the SDMA engine and is sufficient for many cases. This patch allows to pass in platform data containing the script addresses in ROM, so loading a firmware is optional now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Dan Williams <dan.j.williams@intel.com>
2010-10-06 21:41:15 +08:00
struct sdma_script_start_addrs *script_addrs;
dmaengine: Add Freescale i.MX SDMA support This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2010-09-30 21:56:34 +08:00
};
#endif /* __MACH_MXC_SDMA_H__ */