2009-09-17 04:25:37 +08:00
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/*
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* Routines for control of the AK4113 via I2C/4-wire serial interface
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* IEC958 (S/PDIF) receiver by Asahi Kasei
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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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* Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/slab.h>
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#include <linux/delay.h>
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2011-07-16 00:38:28 +08:00
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#include <linux/module.h>
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2009-09-17 04:25:37 +08:00
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#include <sound/core.h>
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#include <sound/control.h>
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#include <sound/pcm.h>
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#include <sound/ak4113.h>
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#include <sound/asoundef.h>
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#include <sound/info.h>
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MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
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MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
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MODULE_LICENSE("GPL");
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#define AK4113_ADDR 0x00 /* fixed address */
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static void ak4113_stats(struct work_struct *work);
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static void ak4113_init_regs(struct ak4113 *chip);
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static void reg_write(struct ak4113 *ak4113, unsigned char reg,
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unsigned char val)
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{
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ak4113->write(ak4113->private_data, reg, val);
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if (reg < sizeof(ak4113->regmap))
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ak4113->regmap[reg] = val;
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}
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static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
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{
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return ak4113->read(ak4113->private_data, reg);
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}
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static void snd_ak4113_free(struct ak4113 *chip)
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{
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2015-01-13 17:53:20 +08:00
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atomic_inc(&chip->wq_processing); /* don't schedule new work */
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2010-12-12 00:51:26 +08:00
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cancel_delayed_work_sync(&chip->work);
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2009-09-17 04:25:37 +08:00
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kfree(chip);
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}
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static int snd_ak4113_dev_free(struct snd_device *device)
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{
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struct ak4113 *chip = device->device_data;
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snd_ak4113_free(chip);
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return 0;
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}
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int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
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2010-04-02 19:29:23 +08:00
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ak4113_write_t *write, const unsigned char *pgm,
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2009-09-17 04:25:37 +08:00
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void *private_data, struct ak4113 **r_ak4113)
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{
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struct ak4113 *chip;
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2015-03-23 17:34:46 +08:00
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int err;
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2009-09-17 04:25:37 +08:00
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unsigned char reg;
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static struct snd_device_ops ops = {
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.dev_free = snd_ak4113_dev_free,
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};
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chip = kzalloc(sizeof(*chip), GFP_KERNEL);
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if (chip == NULL)
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return -ENOMEM;
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spin_lock_init(&chip->lock);
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chip->card = card;
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chip->read = read;
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chip->write = write;
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chip->private_data = private_data;
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INIT_DELAYED_WORK(&chip->work, ak4113_stats);
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2015-01-13 17:53:20 +08:00
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atomic_set(&chip->wq_processing, 0);
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2015-01-16 20:03:28 +08:00
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mutex_init(&chip->reinit_mutex);
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2009-09-17 04:25:37 +08:00
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for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
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chip->regmap[reg] = pgm[reg];
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ak4113_init_regs(chip);
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chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
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AK4113_CINT | AK4113_STC);
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chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
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chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
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2014-02-04 18:18:23 +08:00
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err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
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2009-09-17 04:25:37 +08:00
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if (err < 0)
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goto __fail;
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if (r_ak4113)
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*r_ak4113 = chip;
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return 0;
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__fail:
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snd_ak4113_free(chip);
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2015-03-23 17:34:46 +08:00
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return err;
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2009-09-17 04:25:37 +08:00
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}
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EXPORT_SYMBOL_GPL(snd_ak4113_create);
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void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
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unsigned char mask, unsigned char val)
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{
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if (reg >= AK4113_WRITABLE_REGS)
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return;
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reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
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}
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EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
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static void ak4113_init_regs(struct ak4113 *chip)
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{
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unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
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/* bring the chip to reset state and powerdown state */
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reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
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udelay(200);
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/* release reset, but leave powerdown */
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reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
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udelay(200);
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for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
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reg_write(chip, reg, chip->regmap[reg]);
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/* release powerdown, everything is initialized now */
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reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
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}
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void snd_ak4113_reinit(struct ak4113 *chip)
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{
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2015-01-13 17:53:20 +08:00
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if (atomic_inc_return(&chip->wq_processing) == 1)
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cancel_delayed_work_sync(&chip->work);
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2015-01-16 20:03:28 +08:00
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mutex_lock(&chip->reinit_mutex);
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2009-09-17 04:25:37 +08:00
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ak4113_init_regs(chip);
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2015-01-16 20:03:28 +08:00
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mutex_unlock(&chip->reinit_mutex);
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2009-09-17 04:25:37 +08:00
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/* bring up statistics / event queing */
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2015-01-13 17:53:20 +08:00
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if (atomic_dec_and_test(&chip->wq_processing))
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2009-09-17 04:25:37 +08:00
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schedule_delayed_work(&chip->work, HZ / 10);
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}
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EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
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static unsigned int external_rate(unsigned char rcs1)
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{
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switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
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case AK4113_FS_8000HZ:
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return 8000;
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case AK4113_FS_11025HZ:
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return 11025;
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case AK4113_FS_16000HZ:
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return 16000;
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case AK4113_FS_22050HZ:
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return 22050;
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case AK4113_FS_24000HZ:
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return 24000;
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case AK4113_FS_32000HZ:
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return 32000;
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case AK4113_FS_44100HZ:
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return 44100;
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case AK4113_FS_48000HZ:
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return 48000;
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case AK4113_FS_64000HZ:
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return 64000;
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case AK4113_FS_88200HZ:
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return 88200;
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case AK4113_FS_96000HZ:
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return 96000;
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case AK4113_FS_176400HZ:
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return 176400;
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case AK4113_FS_192000HZ:
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return 192000;
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default:
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return 0;
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}
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}
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static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = LONG_MAX;
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return 0;
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}
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static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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spin_lock_irq(&chip->lock);
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2017-05-12 16:47:16 +08:00
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ucontrol->value.integer.value[0] =
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chip->errors[kcontrol->private_value];
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chip->errors[kcontrol->private_value] = 0;
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2009-09-17 04:25:37 +08:00
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spin_unlock_irq(&chip->lock);
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return 0;
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}
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#define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info
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static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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unsigned char reg = kcontrol->private_value & 0xff;
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unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
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unsigned char inv = (kcontrol->private_value >> 31) & 1;
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ucontrol->value.integer.value[0] =
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((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
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return 0;
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}
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static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = 5;
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return 0;
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}
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static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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ucontrol->value.integer.value[0] =
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(AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
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return 0;
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}
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static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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int change;
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u8 old_val;
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spin_lock_irq(&chip->lock);
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old_val = chip->regmap[AK4113_REG_IO1];
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change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
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if (change)
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reg_write(chip, AK4113_REG_IO1,
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(old_val & (~AK4113_IPS(0xff))) |
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(AK4113_IPS(ucontrol->value.integer.value[0])));
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spin_unlock_irq(&chip->lock);
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return change;
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}
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static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = 192000;
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return 0;
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}
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static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
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AK4113_REG_RCS1));
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return 0;
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}
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static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
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uinfo->count = 1;
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return 0;
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}
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static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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unsigned i;
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for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
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ucontrol->value.iec958.status[i] = reg_read(chip,
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AK4113_REG_RXCSB0 + i);
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return 0;
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}
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static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
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uinfo->count = 1;
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return 0;
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}
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static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
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return 0;
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}
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static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = 0xffff;
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uinfo->count = 4;
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return 0;
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}
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static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
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unsigned short tmp;
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ucontrol->value.integer.value[0] = 0xf8f2;
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|
|
ucontrol->value.integer.value[1] = 0x4e1f;
|
|
|
|
tmp = reg_read(chip, AK4113_REG_Pc0) |
|
|
|
|
(reg_read(chip, AK4113_REG_Pc1) << 8);
|
|
|
|
ucontrol->value.integer.value[2] = tmp;
|
|
|
|
tmp = reg_read(chip, AK4113_REG_Pd0) |
|
|
|
|
(reg_read(chip, AK4113_REG_Pd1) << 8);
|
|
|
|
ucontrol->value.integer.value[3] = tmp;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_info *uinfo)
|
|
|
|
{
|
|
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
|
|
|
|
uinfo->count = AK4113_REG_QSUB_SIZE;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
|
|
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
|
|
{
|
|
|
|
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
|
|
|
|
ucontrol->value.bytes.data[i] = reg_read(chip,
|
|
|
|
AK4113_REG_QSUB_ADDR + i);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Don't forget to change AK4113_CONTROLS define!!! */
|
|
|
|
static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 Parity Errors",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_error_info,
|
|
|
|
.get = snd_ak4113_in_error_get,
|
2017-05-12 16:47:16 +08:00
|
|
|
.private_value = AK4113_PARITY_ERRORS,
|
2009-09-17 04:25:37 +08:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 V-Bit Errors",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_error_info,
|
|
|
|
.get = snd_ak4113_in_error_get,
|
2017-05-12 16:47:16 +08:00
|
|
|
.private_value = AK4113_V_BIT_ERRORS,
|
2009-09-17 04:25:37 +08:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 C-CRC Errors",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_error_info,
|
|
|
|
.get = snd_ak4113_in_error_get,
|
2017-05-12 16:47:16 +08:00
|
|
|
.private_value = AK4113_CCRC_ERRORS,
|
2009-09-17 04:25:37 +08:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 Q-CRC Errors",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_error_info,
|
|
|
|
.get = snd_ak4113_in_error_get,
|
2017-05-12 16:47:16 +08:00
|
|
|
.private_value = AK4113_QCRC_ERRORS,
|
2009-09-17 04:25:37 +08:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 External Rate",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_rate_info,
|
|
|
|
.get = snd_ak4113_rate_get,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ,
|
|
|
|
.info = snd_ak4113_spdif_mask_info,
|
|
|
|
.get = snd_ak4113_spdif_mask_get,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_spdif_info,
|
|
|
|
.get = snd_ak4113_spdif_get,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
2012-11-01 23:28:50 +08:00
|
|
|
.name = "IEC958 Preamble Capture Default",
|
2009-09-17 04:25:37 +08:00
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_spdif_pinfo,
|
|
|
|
.get = snd_ak4113_spdif_pget,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 Q-subcode Capture Default",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_spdif_qinfo,
|
|
|
|
.get = snd_ak4113_spdif_qget,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 Audio",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_bit_info,
|
|
|
|
.get = snd_ak4113_in_bit_get,
|
|
|
|
.private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 Non-PCM Bitstream",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_bit_info,
|
|
|
|
.get = snd_ak4113_in_bit_get,
|
|
|
|
.private_value = (0<<8) | AK4113_REG_RCS1,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "IEC958 DTS Bitstream",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
|
|
|
|
.info = snd_ak4113_in_bit_info,
|
|
|
|
.get = snd_ak4113_in_bit_get,
|
|
|
|
.private_value = (1<<8) | AK4113_REG_RCS1,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
|
|
.name = "AK4113 Input Select",
|
|
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ |
|
|
|
|
SNDRV_CTL_ELEM_ACCESS_WRITE,
|
|
|
|
.info = snd_ak4113_rx_info,
|
|
|
|
.get = snd_ak4113_rx_get,
|
|
|
|
.put = snd_ak4113_rx_put,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
|
|
|
|
struct snd_info_buffer *buffer)
|
|
|
|
{
|
|
|
|
struct ak4113 *ak4113 = entry->private_data;
|
|
|
|
int reg, val;
|
|
|
|
/* all ak4113 registers 0x00 - 0x1c */
|
|
|
|
for (reg = 0; reg < 0x1d; reg++) {
|
|
|
|
val = reg_read(ak4113, reg);
|
|
|
|
snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void snd_ak4113_proc_init(struct ak4113 *ak4113)
|
|
|
|
{
|
|
|
|
struct snd_info_entry *entry;
|
|
|
|
if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
|
|
|
|
snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
|
|
|
|
}
|
|
|
|
|
|
|
|
int snd_ak4113_build(struct ak4113 *ak4113,
|
|
|
|
struct snd_pcm_substream *cap_substream)
|
|
|
|
{
|
|
|
|
struct snd_kcontrol *kctl;
|
|
|
|
unsigned int idx;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
if (snd_BUG_ON(!cap_substream))
|
|
|
|
return -EINVAL;
|
|
|
|
ak4113->substream = cap_substream;
|
|
|
|
for (idx = 0; idx < AK4113_CONTROLS; idx++) {
|
|
|
|
kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
|
|
|
|
if (kctl == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
kctl->id.device = cap_substream->pcm->device;
|
|
|
|
kctl->id.subdevice = cap_substream->number;
|
|
|
|
err = snd_ctl_add(ak4113->card, kctl);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
ak4113->kctls[idx] = kctl;
|
|
|
|
}
|
|
|
|
snd_ak4113_proc_init(ak4113);
|
|
|
|
/* trigger workq */
|
|
|
|
schedule_delayed_work(&ak4113->work, HZ / 10);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_ak4113_build);
|
|
|
|
|
|
|
|
int snd_ak4113_external_rate(struct ak4113 *ak4113)
|
|
|
|
{
|
|
|
|
unsigned char rcs1;
|
|
|
|
|
|
|
|
rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
|
|
|
|
return external_rate(rcs1);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
|
|
|
|
|
|
|
|
int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
|
|
|
|
{
|
|
|
|
struct snd_pcm_runtime *runtime =
|
|
|
|
ak4113->substream ? ak4113->substream->runtime : NULL;
|
|
|
|
unsigned long _flags;
|
|
|
|
int res = 0;
|
|
|
|
unsigned char rcs0, rcs1, rcs2;
|
|
|
|
unsigned char c0, c1;
|
|
|
|
|
|
|
|
rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
|
|
|
|
if (flags & AK4113_CHECK_NO_STAT)
|
|
|
|
goto __rate;
|
|
|
|
rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
|
|
|
|
rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
|
|
|
|
spin_lock_irqsave(&ak4113->lock, _flags);
|
|
|
|
if (rcs0 & AK4113_PAR)
|
2017-05-12 16:47:16 +08:00
|
|
|
ak4113->errors[AK4113_PARITY_ERRORS]++;
|
2009-09-17 04:25:37 +08:00
|
|
|
if (rcs0 & AK4113_V)
|
2017-05-12 16:47:16 +08:00
|
|
|
ak4113->errors[AK4113_V_BIT_ERRORS]++;
|
2009-09-17 04:25:37 +08:00
|
|
|
if (rcs2 & AK4113_CCRC)
|
2017-05-12 16:47:16 +08:00
|
|
|
ak4113->errors[AK4113_CCRC_ERRORS]++;
|
2009-09-17 04:25:37 +08:00
|
|
|
if (rcs2 & AK4113_QCRC)
|
2017-05-12 16:47:16 +08:00
|
|
|
ak4113->errors[AK4113_QCRC_ERRORS]++;
|
2009-09-17 04:25:37 +08:00
|
|
|
c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
|
|
|
|
AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
|
|
|
|
(rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
|
|
|
|
AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
|
|
|
|
c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
|
|
|
|
AK4113_DAT | 0xf0)) ^
|
|
|
|
(rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
|
|
|
|
AK4113_DAT | 0xf0));
|
|
|
|
ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
|
|
|
|
ak4113->rcs1 = rcs1;
|
|
|
|
ak4113->rcs2 = rcs2;
|
|
|
|
spin_unlock_irqrestore(&ak4113->lock, _flags);
|
|
|
|
|
|
|
|
if (rcs0 & AK4113_PAR)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[0]->id);
|
|
|
|
if (rcs0 & AK4113_V)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[1]->id);
|
|
|
|
if (rcs2 & AK4113_CCRC)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[2]->id);
|
|
|
|
if (rcs2 & AK4113_QCRC)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[3]->id);
|
|
|
|
|
|
|
|
/* rate change */
|
|
|
|
if (c1 & 0xf0)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[4]->id);
|
|
|
|
|
|
|
|
if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[6]->id);
|
|
|
|
if (c0 & AK4113_QINT)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[8]->id);
|
|
|
|
|
|
|
|
if (c0 & AK4113_AUDION)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[9]->id);
|
|
|
|
if (c1 & AK4113_NPCM)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[10]->id);
|
|
|
|
if (c1 & AK4113_DTSCD)
|
|
|
|
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
|
|
|
|
&ak4113->kctls[11]->id);
|
|
|
|
|
|
|
|
if (ak4113->change_callback && (c0 | c1) != 0)
|
|
|
|
ak4113->change_callback(ak4113, c0, c1);
|
|
|
|
|
|
|
|
__rate:
|
|
|
|
/* compare rate */
|
|
|
|
res = external_rate(rcs1);
|
|
|
|
if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
|
|
|
|
(runtime->rate != res)) {
|
|
|
|
snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
|
|
|
|
if (snd_pcm_running(ak4113->substream)) {
|
|
|
|
/*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
|
|
|
|
* runtime->rate, res); */
|
|
|
|
snd_pcm_stop(ak4113->substream,
|
|
|
|
SNDRV_PCM_STATE_DRAINING);
|
|
|
|
wake_up(&runtime->sleep);
|
|
|
|
res = 1;
|
|
|
|
}
|
|
|
|
snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
|
|
|
|
|
|
|
|
static void ak4113_stats(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct ak4113 *chip = container_of(work, struct ak4113, work.work);
|
|
|
|
|
2015-01-13 17:53:20 +08:00
|
|
|
if (atomic_inc_return(&chip->wq_processing) == 1)
|
2009-09-17 04:25:37 +08:00
|
|
|
snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
|
|
|
|
|
2015-01-13 17:53:20 +08:00
|
|
|
if (atomic_dec_and_test(&chip->wq_processing))
|
|
|
|
schedule_delayed_work(&chip->work, HZ / 10);
|
2009-09-17 04:25:37 +08:00
|
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}
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2015-01-13 18:24:08 +08:00
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#ifdef CONFIG_PM
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void snd_ak4113_suspend(struct ak4113 *chip)
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{
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atomic_inc(&chip->wq_processing); /* don't schedule new work */
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cancel_delayed_work_sync(&chip->work);
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}
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EXPORT_SYMBOL(snd_ak4113_suspend);
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void snd_ak4113_resume(struct ak4113 *chip)
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{
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atomic_dec(&chip->wq_processing);
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snd_ak4113_reinit(chip);
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}
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EXPORT_SYMBOL(snd_ak4113_resume);
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#endif
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