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44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
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* Renesas VSP1 Video Processing Engine
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The VSP1 is a video processing engine that supports up-/down-scaling, alpha
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blending, color space conversion and various other image processing features.
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It can be found in the Renesas R-Car second generation SoCs.
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Required properties:
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- compatible: Must contain "renesas,vsp1"
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- reg: Base address and length of the registers block for the VSP1.
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- interrupts: VSP1 interrupt specifier.
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- clocks: A phandle + clock-specifier pair for the VSP1 functional clock.
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- renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1.
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- renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1.
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- renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1.
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Optional properties:
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- renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is
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available.
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- renesas,has-lut: Boolean, indicates that the Look Up Table (LUT) module is
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available.
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- renesas,has-sru: Boolean, indicates that the Super Resolution Unit (SRU)
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module is available.
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Example: R8A7790 (R-Car H2) VSP1-S node
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vsp1@fe928000 {
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compatible = "renesas,vsp1";
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reg = <0 0xfe928000 0 0x8000>;
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interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
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renesas,has-lut;
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renesas,has-sru;
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renesas,#rpf = <5>;
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renesas,#uds = <3>;
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renesas,#wpf = <4>;
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};
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