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linux/arch/sh/include/asm/irq.h

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#ifndef __ASM_SH_IRQ_H
#define __ASM_SH_IRQ_H
sh: CPU hotplug support. This adds preliminary support for CPU hotplug for SH SMP systems. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 18:08:55 +08:00
#include <linux/cpumask.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#include <asm/machvec.h>
sh: NR_IRQS consolidation. Each board sets the total number of IRQs that it's interested in via the machvec. Previously we cared about the off vs on-chip IRQ range, but any code relying on that is long dead. Set NR_IRQS to something sensible given the vector range, and allow boards to cap it if they really care. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-12 13:09:35 +08:00
/*
* A sane default based on a reasonable vector table size, platforms are
* advised to cap this at the hard limit that they're interested in
* through the machvec.
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
*/
sh: modify NR_IRQS from 256 to 512 Newer parts need NR_IRQS > 256, so simply bump this up to 512 across the board. At this point sparseirq is used unconditionally across all CPUs, so this introduces minimal overhead. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-07-06 12:32:40 +08:00
#define NR_IRQS 512
sh: Add a NR_IRQS_LEGACY for external IRQ0-7. This adds a NR_IRQS_LEGACY definition, which will be used by sparse irq. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-22 12:50:18 +08:00
#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
sh: intc: IRQ auto-distribution support. This implements support for hardware-managed IRQ balancing as implemented by SH-X3 cores (presently only hooked up for SH7786, but can probably be carried over to other SH-X3 cores, too). CPUs need to specify their distribution register along with the mask definitions, as these follow the same format. Peripheral IRQs that don't opt out of balancing will be automatically distributed at the whim of the hardware block, while each CPU needs to verify whether it is handling the IRQ or not, especially before clearing the mask. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-15 12:13:52 +08:00
/*
* This is a special IRQ number for indicating that no IRQ has been
* triggered and to simply ignore the IRQ dispatch. This is a special
* case that can happen with IRQ auto-distribution when multiple CPUs
* are woken up and signalled in parallel.
*/
#define NO_IRQ_IGNORE ((unsigned int)-1)
sh: sh775x/titan fixes for irq header changes. The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:05:02 +08:00
/*
* Convert back and forth between INTEVT and IRQ values.
*/
sh: Fix bogus regs pointer in do_IRQ(). SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-14 12:03:35 +08:00
#ifdef CONFIG_CPU_HAS_INTEVT
sh: sh775x/titan fixes for irq header changes. The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:05:02 +08:00
#define evt2irq(evt) (((evt) >> 5) - 16)
#define irq2evt(irq) (((irq) + 16) << 5)
sh: Fix bogus regs pointer in do_IRQ(). SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-03-14 12:03:35 +08:00
#else
#define evt2irq(evt) (evt)
#define irq2evt(irq) (irq)
#endif
sh: sh775x/titan fixes for irq header changes. The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:05:02 +08:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
/*
* Simple Mask Register Support
*/
extern void make_maskreg_irq(unsigned int irq);
extern unsigned short *irq_mask_register;
sh: More cosmetic cleanups and trivial fixes. Nothing exciting here, just trivial fixes.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 16:03:56 +08:00
/*
* PINT IRQs
*/
void init_IRQ_pint(void);
sh: sh775x/titan fixes for irq header changes. The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:05:02 +08:00
void make_imask_irq(unsigned int irq);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
static inline int generic_irq_demux(int irq)
{
return irq;
}
sh: Drop CPU subtype IRQ headers. This drops the various IRQ headers that were floating around and primarily providing hardcoded IRQ definitions for the various CPU subtypes. This quickly got to be an unmaintainable mess, made even more evident by the subtle breakage introduced by the SH-2 and SH-2A changes. Now that subtypes are able to register IRQ maps directly, just rip all of the headers out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-11-20 12:55:34 +08:00
#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
sh: fixup many sparse errors. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-09-04 17:53:58 +08:00
void init_IRQ(void);
sh: CPU hotplug support. This adds preliminary support for CPU hotplug for SH SMP systems. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 18:08:55 +08:00
void migrate_irqs(void);
sh: fixup many sparse errors. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-09-04 17:53:58 +08:00
asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
sh: Decouple 4k and soft/hardirq stacks. While using separate IRQ stacks can cut down on stack consumption, many users can also use 4k stacks directly without the additional need of separate stacks for soft and hardirqs. With this split, we support the same rationale for 4KSTACKS as m68knommu, with the IRQSTACKS abstraction as per ppc64. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-11-02 11:16:51 +08:00
#ifdef CONFIG_IRQSTACKS
sh: Add support for 4K stacks. This enables support for 4K stacks on SH. Currently this depends on DEBUG_KERNEL, but likely all boards will switch to this as the default in the future. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 17:22:14 +08:00
extern void irq_ctx_init(int cpu);
extern void irq_ctx_exit(int cpu);
# define __ARCH_HAS_DO_SOFTIRQ
#else
# define irq_ctx_init(cpu) do { } while (0)
# define irq_ctx_exit(cpu) do { } while (0)
#endif
sh: intc: IRQ auto-distribution support. This implements support for hardware-managed IRQ balancing as implemented by SH-X3 cores (presently only hooked up for SH7786, but can probably be carried over to other SH-X3 cores, too). CPUs need to specify their distribution register along with the mask definitions, as these follow the same format. Peripheral IRQs that don't opt out of balancing will be automatically distributed at the whim of the hardware block, while each CPU needs to verify whether it is handling the IRQ or not, especially before clearing the mask. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-15 12:13:52 +08:00
#ifdef CONFIG_INTC_BALANCING
extern unsigned int irq_lookup(unsigned int irq);
extern void irq_finish(unsigned int irq);
#else
#define irq_lookup(irq) (irq)
#define irq_finish(irq) do { } while (0)
#endif
sh: Tidy up duplication in irq/swab/timex.h. The asm-generic versions have some helper definitions that we can use instead, drop our definitions and use those instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-14 22:21:54 +08:00
#include <asm-generic/irq.h>
sh: asm/irq.h needs asm/cpu/irq.h. The SH-5 build currently fails when trying to build the i8042 code due to the missing IRQ definitions. These are provided in asm/cpu/irq.h, so just include that there to get it building again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-13 19:16:47 +08:00
#ifdef CONFIG_CPU_SH5
sh: migrate to arch/sh/include/ This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29 07:09:44 +08:00
#include <cpu/irq.h>
sh: asm/irq.h needs asm/cpu/irq.h. The SH-5 build currently fails when trying to build the i8042 code due to the missing IRQ definitions. These are provided in asm/cpu/irq.h, so just include that there to get it building again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-13 19:16:47 +08:00
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 06:20:36 +08:00
#endif /* __ASM_SH_IRQ_H */