2011-10-01 03:06:19 +08:00
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/*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
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2011-10-01 03:06:21 +08:00
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* Copyright (C) 2011 Don Zickus Red Hat, Inc.
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2011-10-01 03:06:19 +08:00
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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/*
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* Handle hardware traps and faults.
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*/
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#include <linux/spinlock.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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2017-02-09 01:51:35 +08:00
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#include <linux/sched/debug.h>
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2011-10-01 03:06:19 +08:00
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#include <linux/nmi.h>
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2013-06-21 23:51:35 +08:00
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#include <linux/debugfs.h>
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2011-10-01 03:06:20 +08:00
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#include <linux/delay.h>
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#include <linux/hardirq.h>
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2016-06-06 22:09:52 +08:00
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#include <linux/ratelimit.h>
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2011-10-01 03:06:20 +08:00
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#include <linux/slab.h>
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2011-05-27 00:22:53 +08:00
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#include <linux/export.h>
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2017-02-01 23:36:40 +08:00
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#include <linux/sched/clock.h>
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2011-10-01 03:06:19 +08:00
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <linux/atomic.h>
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#include <asm/traps.h>
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#include <asm/mach_traps.h>
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2011-10-01 03:06:20 +08:00
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#include <asm/nmi.h>
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2011-11-10 21:45:24 +08:00
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#include <asm/x86_init.h>
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2015-12-14 18:19:13 +08:00
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#include <asm/reboot.h>
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2016-03-07 06:20:06 +08:00
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#include <asm/cache.h>
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2011-10-01 03:06:20 +08:00
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2013-06-21 23:51:38 +08:00
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#define CREATE_TRACE_POINTS
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#include <trace/events/nmi.h>
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2011-10-01 03:06:20 +08:00
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struct nmi_desc {
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spinlock_t lock;
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struct list_head head;
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};
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static struct nmi_desc nmi_desc[NMI_MAX] =
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{
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{
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.lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[0].lock),
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.head = LIST_HEAD_INIT(nmi_desc[0].head),
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},
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{
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.lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[1].lock),
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.head = LIST_HEAD_INIT(nmi_desc[1].head),
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},
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2012-03-30 04:11:16 +08:00
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{
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.lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[2].lock),
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.head = LIST_HEAD_INIT(nmi_desc[2].head),
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},
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{
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.lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[3].lock),
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.head = LIST_HEAD_INIT(nmi_desc[3].head),
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},
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2011-10-01 03:06:20 +08:00
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};
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2011-10-01 03:06:19 +08:00
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2011-10-01 03:06:23 +08:00
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struct nmi_stats {
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unsigned int normal;
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unsigned int unknown;
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unsigned int external;
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unsigned int swallow;
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};
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static DEFINE_PER_CPU(struct nmi_stats, nmi_stats);
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2016-03-07 06:20:06 +08:00
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static int ignore_nmis __read_mostly;
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2011-10-01 03:06:19 +08:00
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int unknown_nmi_panic;
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/*
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* Prevent NMI reason port (0x61) being accessed simultaneously, can
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* only be used in NMI handler.
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*/
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static DEFINE_RAW_SPINLOCK(nmi_reason_lock);
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static int __init setup_unknown_nmi_panic(char *str)
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{
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unknown_nmi_panic = 1;
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return 1;
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}
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__setup("unknown_nmi_panic", setup_unknown_nmi_panic);
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2011-10-01 03:06:20 +08:00
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#define nmi_to_desc(type) (&nmi_desc[type])
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2013-06-21 23:51:35 +08:00
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static u64 nmi_longest_ns = 1 * NSEC_PER_MSEC;
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2014-02-04 01:02:09 +08:00
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2013-06-21 23:51:35 +08:00
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static int __init nmi_warning_debugfs(void)
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{
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debugfs_create_u64("nmi_longest_ns", 0644,
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arch_debugfs_dir, &nmi_longest_ns);
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return 0;
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}
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fs_initcall(nmi_warning_debugfs);
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2014-02-04 01:02:09 +08:00
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static void nmi_max_handler(struct irq_work *w)
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{
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struct nmiaction *a = container_of(w, struct nmiaction, irq_work);
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int remainder_ns, decimal_msecs;
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u64 whole_msecs = ACCESS_ONCE(a->max_duration);
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remainder_ns = do_div(whole_msecs, (1000 * 1000));
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decimal_msecs = remainder_ns / 1000;
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printk_ratelimited(KERN_INFO
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"INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n",
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a->handler, whole_msecs, decimal_msecs);
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}
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2015-07-21 02:52:23 +08:00
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static int nmi_handle(unsigned int type, struct pt_regs *regs)
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2011-10-01 03:06:20 +08:00
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{
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struct nmi_desc *desc = nmi_to_desc(type);
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struct nmiaction *a;
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int handled=0;
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rcu_read_lock();
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/*
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* NMIs are edge-triggered, which means if you have enough
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* of them concurrently, you can lose some because only one
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* can be latched at any given time. Walk the whole list
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* to handle those situations.
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*/
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2013-06-21 23:51:35 +08:00
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list_for_each_entry_rcu(a, &desc->head, list) {
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2014-02-04 01:02:09 +08:00
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int thishandled;
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u64 delta;
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2013-06-21 23:51:35 +08:00
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2014-02-04 01:02:09 +08:00
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delta = sched_clock();
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2013-06-21 23:51:38 +08:00
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thishandled = a->handler(type, regs);
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handled += thishandled;
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2014-02-04 01:02:09 +08:00
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delta = sched_clock() - delta;
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2013-06-21 23:51:38 +08:00
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trace_nmi_handler(a->handler, (int)delta, thishandled);
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2013-06-21 23:51:35 +08:00
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2014-02-04 01:02:09 +08:00
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if (delta < nmi_longest_ns || delta < a->max_duration)
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2013-06-21 23:51:35 +08:00
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continue;
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2014-02-04 01:02:09 +08:00
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a->max_duration = delta;
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irq_work_queue(&a->irq_work);
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2013-06-21 23:51:35 +08:00
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}
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2011-10-01 03:06:20 +08:00
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rcu_read_unlock();
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/* return total number of NMI events handled */
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return handled;
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}
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2014-04-17 16:18:14 +08:00
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NOKPROBE_SYMBOL(nmi_handle);
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2011-10-01 03:06:20 +08:00
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2012-03-30 04:11:17 +08:00
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int __register_nmi_handler(unsigned int type, struct nmiaction *action)
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2011-10-01 03:06:20 +08:00
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{
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struct nmi_desc *desc = nmi_to_desc(type);
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unsigned long flags;
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2012-03-30 04:11:17 +08:00
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if (!action->handler)
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return -EINVAL;
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2014-02-04 01:02:09 +08:00
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init_irq_work(&action->irq_work, nmi_max_handler);
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2011-10-01 03:06:20 +08:00
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spin_lock_irqsave(&desc->lock, flags);
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2011-10-01 03:06:22 +08:00
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/*
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2017-03-08 05:08:42 +08:00
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* Indicate if there are multiple registrations on the
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* internal NMI handler call chains (SERR and IO_CHECK).
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2011-10-01 03:06:22 +08:00
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*/
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2012-03-30 04:11:16 +08:00
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WARN_ON_ONCE(type == NMI_SERR && !list_empty(&desc->head));
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WARN_ON_ONCE(type == NMI_IO_CHECK && !list_empty(&desc->head));
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2011-10-01 03:06:22 +08:00
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2011-10-01 03:06:20 +08:00
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/*
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* some handlers need to be executed first otherwise a fake
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* event confuses some handlers (kdump uses this flag)
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*/
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if (action->flags & NMI_FLAG_FIRST)
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list_add_rcu(&action->list, &desc->head);
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else
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list_add_tail_rcu(&action->list, &desc->head);
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spin_unlock_irqrestore(&desc->lock, flags);
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return 0;
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}
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2012-03-30 04:11:17 +08:00
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EXPORT_SYMBOL(__register_nmi_handler);
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2011-10-01 03:06:20 +08:00
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2012-03-30 04:11:17 +08:00
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void unregister_nmi_handler(unsigned int type, const char *name)
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2011-10-01 03:06:20 +08:00
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{
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struct nmi_desc *desc = nmi_to_desc(type);
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struct nmiaction *n;
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unsigned long flags;
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spin_lock_irqsave(&desc->lock, flags);
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list_for_each_entry_rcu(n, &desc->head, list) {
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/*
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* the name passed in to describe the nmi handler
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* is used as the lookup key
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*/
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if (!strcmp(n->name, name)) {
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WARN(in_nmi(),
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"Trying to free NMI (%s) from NMI context!\n", n->name);
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list_del_rcu(&n->list);
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break;
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}
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}
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spin_unlock_irqrestore(&desc->lock, flags);
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synchronize_rcu();
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}
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EXPORT_SYMBOL_GPL(unregister_nmi_handler);
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2014-04-17 16:18:14 +08:00
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static void
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2011-10-01 03:06:19 +08:00
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pci_serr_error(unsigned char reason, struct pt_regs *regs)
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{
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2012-03-30 04:11:16 +08:00
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/* check to see if anyone registered against these types of errors */
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2015-07-21 02:52:23 +08:00
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if (nmi_handle(NMI_SERR, regs))
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2012-03-30 04:11:16 +08:00
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return;
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2011-10-01 03:06:19 +08:00
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pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
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reason, smp_processor_id());
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/*
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* On some machines, PCI SERR line is used to report memory
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* errors. EDAC makes use of it.
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*/
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#if defined(CONFIG_EDAC)
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if (edac_handler_set()) {
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edac_atomic_assert_error();
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return;
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}
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#endif
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if (panic_on_unrecovered_nmi)
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panic, x86: Allow CPUs to save registers even if looping in NMI context
Currently, kdump_nmi_shootdown_cpus(), a subroutine of crash_kexec(),
sends an NMI IPI to CPUs which haven't called panic() to stop them,
save their register information and do some cleanups for crash dumping.
However, if such a CPU is infinitely looping in NMI context, we fail to
save its register information into the crash dump.
For example, this can happen when unknown NMIs are broadcast to all
CPUs as follows:
CPU 0 CPU 1
=========================== ==========================
receive an unknown NMI
unknown_nmi_error()
panic() receive an unknown NMI
spin_trylock(&panic_lock) unknown_nmi_error()
crash_kexec() panic()
spin_trylock(&panic_lock)
panic_smp_self_stop()
infinite loop
kdump_nmi_shootdown_cpus()
issue NMI IPI -----------> blocked until IRET
infinite loop...
Here, since CPU 1 is in NMI context, the second NMI from CPU 0 is
blocked until CPU 1 executes IRET. However, CPU 1 never executes IRET,
so the NMI is not handled and the callback function to save registers is
never called.
In practice, this can happen on some servers which broadcast NMIs to all
CPUs when the NMI button is pushed.
To save registers in this case, we need to:
a) Return from NMI handler instead of looping infinitely
or
b) Call the callback function directly from the infinite loop
Inherently, a) is risky because NMI is also used to prevent corrupted
data from being propagated to devices. So, we chose b).
This patch does the following:
1. Move the infinite looping of CPUs which haven't called panic() in NMI
context (actually done by panic_smp_self_stop()) outside of panic() to
enable us to refer pt_regs. Please note that panic_smp_self_stop() is
still used for normal context.
2. Call a callback of kdump_nmi_shootdown_cpus() directly to save
registers and do some cleanups after setting waiting_for_crash_ipi which
is used for counting down the number of CPUs which handled the callback
Signed-off-by: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Aaron Tomlin <atomlin@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Baoquan He <bhe@redhat.com>
Cc: Chris Metcalf <cmetcalf@ezchip.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Gobinda Charan Maji <gobinda.cemk07@gmail.com>
Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Javi Merino <javi.merino@arm.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: kexec@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: lkml <linux-kernel@vger.kernel.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Seth Jennings <sjenning@redhat.com>
Cc: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ulrich Obergfell <uobergfe@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Link: http://lkml.kernel.org/r/20151210014628.25437.75256.stgit@softrs
[ Cleanup comments, fixup formatting. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-14 18:19:10 +08:00
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nmi_panic(regs, "NMI: Not continuing");
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2011-10-01 03:06:19 +08:00
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pr_emerg("Dazed and confused, but trying to continue\n");
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/* Clear and disable the PCI SERR error line. */
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reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR;
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outb(reason, NMI_REASON_PORT);
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}
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2014-04-17 16:18:14 +08:00
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NOKPROBE_SYMBOL(pci_serr_error);
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2011-10-01 03:06:19 +08:00
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2014-04-17 16:18:14 +08:00
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static void
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2011-10-01 03:06:19 +08:00
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io_check_error(unsigned char reason, struct pt_regs *regs)
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{
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unsigned long i;
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2012-03-30 04:11:16 +08:00
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/* check to see if anyone registered against these types of errors */
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2015-07-21 02:52:23 +08:00
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if (nmi_handle(NMI_IO_CHECK, regs))
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2012-03-30 04:11:16 +08:00
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return;
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2011-10-01 03:06:19 +08:00
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|
|
pr_emerg(
|
|
|
|
"NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",
|
|
|
|
reason, smp_processor_id());
|
2012-05-09 15:47:37 +08:00
|
|
|
show_regs(regs);
|
2011-10-01 03:06:19 +08:00
|
|
|
|
2015-12-14 18:19:09 +08:00
|
|
|
if (panic_on_io_nmi) {
|
panic, x86: Allow CPUs to save registers even if looping in NMI context
Currently, kdump_nmi_shootdown_cpus(), a subroutine of crash_kexec(),
sends an NMI IPI to CPUs which haven't called panic() to stop them,
save their register information and do some cleanups for crash dumping.
However, if such a CPU is infinitely looping in NMI context, we fail to
save its register information into the crash dump.
For example, this can happen when unknown NMIs are broadcast to all
CPUs as follows:
CPU 0 CPU 1
=========================== ==========================
receive an unknown NMI
unknown_nmi_error()
panic() receive an unknown NMI
spin_trylock(&panic_lock) unknown_nmi_error()
crash_kexec() panic()
spin_trylock(&panic_lock)
panic_smp_self_stop()
infinite loop
kdump_nmi_shootdown_cpus()
issue NMI IPI -----------> blocked until IRET
infinite loop...
Here, since CPU 1 is in NMI context, the second NMI from CPU 0 is
blocked until CPU 1 executes IRET. However, CPU 1 never executes IRET,
so the NMI is not handled and the callback function to save registers is
never called.
In practice, this can happen on some servers which broadcast NMIs to all
CPUs when the NMI button is pushed.
To save registers in this case, we need to:
a) Return from NMI handler instead of looping infinitely
or
b) Call the callback function directly from the infinite loop
Inherently, a) is risky because NMI is also used to prevent corrupted
data from being propagated to devices. So, we chose b).
This patch does the following:
1. Move the infinite looping of CPUs which haven't called panic() in NMI
context (actually done by panic_smp_self_stop()) outside of panic() to
enable us to refer pt_regs. Please note that panic_smp_self_stop() is
still used for normal context.
2. Call a callback of kdump_nmi_shootdown_cpus() directly to save
registers and do some cleanups after setting waiting_for_crash_ipi which
is used for counting down the number of CPUs which handled the callback
Signed-off-by: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Aaron Tomlin <atomlin@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Baoquan He <bhe@redhat.com>
Cc: Chris Metcalf <cmetcalf@ezchip.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Gobinda Charan Maji <gobinda.cemk07@gmail.com>
Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Javi Merino <javi.merino@arm.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: kexec@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: lkml <linux-kernel@vger.kernel.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Seth Jennings <sjenning@redhat.com>
Cc: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ulrich Obergfell <uobergfe@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Link: http://lkml.kernel.org/r/20151210014628.25437.75256.stgit@softrs
[ Cleanup comments, fixup formatting. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-14 18:19:10 +08:00
|
|
|
nmi_panic(regs, "NMI IOCK error: Not continuing");
|
2015-12-14 18:19:09 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If we end up here, it means we have received an NMI while
|
|
|
|
* processing panic(). Simply return without delaying and
|
|
|
|
* re-enabling NMIs.
|
|
|
|
*/
|
|
|
|
return;
|
|
|
|
}
|
2011-10-01 03:06:19 +08:00
|
|
|
|
|
|
|
/* Re-enable the IOCK line, wait for a few seconds */
|
|
|
|
reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK;
|
|
|
|
outb(reason, NMI_REASON_PORT);
|
|
|
|
|
|
|
|
i = 20000;
|
|
|
|
while (--i) {
|
|
|
|
touch_nmi_watchdog();
|
|
|
|
udelay(100);
|
|
|
|
}
|
|
|
|
|
|
|
|
reason &= ~NMI_REASON_CLEAR_IOCHK;
|
|
|
|
outb(reason, NMI_REASON_PORT);
|
|
|
|
}
|
2014-04-17 16:18:14 +08:00
|
|
|
NOKPROBE_SYMBOL(io_check_error);
|
2011-10-01 03:06:19 +08:00
|
|
|
|
2014-04-17 16:18:14 +08:00
|
|
|
static void
|
2011-10-01 03:06:19 +08:00
|
|
|
unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
|
|
|
|
{
|
2011-10-01 03:06:21 +08:00
|
|
|
int handled;
|
|
|
|
|
2011-10-01 03:06:22 +08:00
|
|
|
/*
|
|
|
|
* Use 'false' as back-to-back NMIs are dealt with one level up.
|
|
|
|
* Of course this makes having multiple 'unknown' handlers useless
|
|
|
|
* as only the first one is ever run (unless it can actually determine
|
|
|
|
* if it caused the NMI)
|
|
|
|
*/
|
2015-07-21 02:52:23 +08:00
|
|
|
handled = nmi_handle(NMI_UNKNOWN, regs);
|
2011-10-01 03:06:23 +08:00
|
|
|
if (handled) {
|
|
|
|
__this_cpu_add(nmi_stats.unknown, handled);
|
2011-10-01 03:06:19 +08:00
|
|
|
return;
|
2011-10-01 03:06:23 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
__this_cpu_add(nmi_stats.unknown, 1);
|
|
|
|
|
2011-10-01 03:06:19 +08:00
|
|
|
pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
|
|
|
|
reason, smp_processor_id());
|
|
|
|
|
|
|
|
pr_emerg("Do you have a strange power saving mode enabled?\n");
|
|
|
|
if (unknown_nmi_panic || panic_on_unrecovered_nmi)
|
panic, x86: Allow CPUs to save registers even if looping in NMI context
Currently, kdump_nmi_shootdown_cpus(), a subroutine of crash_kexec(),
sends an NMI IPI to CPUs which haven't called panic() to stop them,
save their register information and do some cleanups for crash dumping.
However, if such a CPU is infinitely looping in NMI context, we fail to
save its register information into the crash dump.
For example, this can happen when unknown NMIs are broadcast to all
CPUs as follows:
CPU 0 CPU 1
=========================== ==========================
receive an unknown NMI
unknown_nmi_error()
panic() receive an unknown NMI
spin_trylock(&panic_lock) unknown_nmi_error()
crash_kexec() panic()
spin_trylock(&panic_lock)
panic_smp_self_stop()
infinite loop
kdump_nmi_shootdown_cpus()
issue NMI IPI -----------> blocked until IRET
infinite loop...
Here, since CPU 1 is in NMI context, the second NMI from CPU 0 is
blocked until CPU 1 executes IRET. However, CPU 1 never executes IRET,
so the NMI is not handled and the callback function to save registers is
never called.
In practice, this can happen on some servers which broadcast NMIs to all
CPUs when the NMI button is pushed.
To save registers in this case, we need to:
a) Return from NMI handler instead of looping infinitely
or
b) Call the callback function directly from the infinite loop
Inherently, a) is risky because NMI is also used to prevent corrupted
data from being propagated to devices. So, we chose b).
This patch does the following:
1. Move the infinite looping of CPUs which haven't called panic() in NMI
context (actually done by panic_smp_self_stop()) outside of panic() to
enable us to refer pt_regs. Please note that panic_smp_self_stop() is
still used for normal context.
2. Call a callback of kdump_nmi_shootdown_cpus() directly to save
registers and do some cleanups after setting waiting_for_crash_ipi which
is used for counting down the number of CPUs which handled the callback
Signed-off-by: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Aaron Tomlin <atomlin@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Baoquan He <bhe@redhat.com>
Cc: Chris Metcalf <cmetcalf@ezchip.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: David Hildenbrand <dahi@linux.vnet.ibm.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Gobinda Charan Maji <gobinda.cemk07@gmail.com>
Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Javi Merino <javi.merino@arm.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: kexec@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: lkml <linux-kernel@vger.kernel.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Seth Jennings <sjenning@redhat.com>
Cc: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ulrich Obergfell <uobergfe@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Link: http://lkml.kernel.org/r/20151210014628.25437.75256.stgit@softrs
[ Cleanup comments, fixup formatting. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-14 18:19:10 +08:00
|
|
|
nmi_panic(regs, "NMI: Not continuing");
|
2011-10-01 03:06:19 +08:00
|
|
|
|
|
|
|
pr_emerg("Dazed and confused, but trying to continue\n");
|
|
|
|
}
|
2014-04-17 16:18:14 +08:00
|
|
|
NOKPROBE_SYMBOL(unknown_nmi_error);
|
2011-10-01 03:06:19 +08:00
|
|
|
|
2011-10-01 03:06:22 +08:00
|
|
|
static DEFINE_PER_CPU(bool, swallow_nmi);
|
|
|
|
static DEFINE_PER_CPU(unsigned long, last_nmi_rip);
|
|
|
|
|
2014-04-17 16:18:14 +08:00
|
|
|
static void default_do_nmi(struct pt_regs *regs)
|
2011-10-01 03:06:19 +08:00
|
|
|
{
|
|
|
|
unsigned char reason = 0;
|
2011-10-01 03:06:21 +08:00
|
|
|
int handled;
|
2011-10-01 03:06:22 +08:00
|
|
|
bool b2b = false;
|
2011-10-01 03:06:19 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* CPU-specific NMI must be processed before non-CPU-specific
|
|
|
|
* NMI, otherwise we may lose it, because the CPU-specific
|
|
|
|
* NMI can not be detected/processed on other CPUs.
|
|
|
|
*/
|
2011-10-01 03:06:22 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Back-to-back NMIs are interesting because they can either
|
|
|
|
* be two NMI or more than two NMIs (any thing over two is dropped
|
|
|
|
* due to NMI being edge-triggered). If this is the second half
|
|
|
|
* of the back-to-back NMI, assume we dropped things and process
|
|
|
|
* more handlers. Otherwise reset the 'swallow' NMI behaviour
|
|
|
|
*/
|
|
|
|
if (regs->ip == __this_cpu_read(last_nmi_rip))
|
|
|
|
b2b = true;
|
|
|
|
else
|
|
|
|
__this_cpu_write(swallow_nmi, false);
|
|
|
|
|
|
|
|
__this_cpu_write(last_nmi_rip, regs->ip);
|
|
|
|
|
2015-07-21 02:52:23 +08:00
|
|
|
handled = nmi_handle(NMI_LOCAL, regs);
|
2011-10-01 03:06:23 +08:00
|
|
|
__this_cpu_add(nmi_stats.normal, handled);
|
2011-10-01 03:06:22 +08:00
|
|
|
if (handled) {
|
|
|
|
/*
|
|
|
|
* There are cases when a NMI handler handles multiple
|
|
|
|
* events in the current NMI. One of these events may
|
|
|
|
* be queued for in the next NMI. Because the event is
|
|
|
|
* already handled, the next NMI will result in an unknown
|
|
|
|
* NMI. Instead lets flag this for a potential NMI to
|
|
|
|
* swallow.
|
|
|
|
*/
|
|
|
|
if (handled > 1)
|
|
|
|
__this_cpu_write(swallow_nmi, true);
|
2011-10-01 03:06:19 +08:00
|
|
|
return;
|
2011-10-01 03:06:22 +08:00
|
|
|
}
|
2011-10-01 03:06:19 +08:00
|
|
|
|
2015-12-14 18:19:13 +08:00
|
|
|
/*
|
|
|
|
* Non-CPU-specific NMI: NMI sources can be processed on any CPU.
|
|
|
|
*
|
|
|
|
* Another CPU may be processing panic routines while holding
|
|
|
|
* nmi_reason_lock. Check if the CPU issued the IPI for crash dumping,
|
|
|
|
* and if so, call its callback directly. If there is no CPU preparing
|
|
|
|
* crash dump, we simply loop here.
|
|
|
|
*/
|
|
|
|
while (!raw_spin_trylock(&nmi_reason_lock)) {
|
|
|
|
run_crash_ipi_callback(regs);
|
|
|
|
cpu_relax();
|
|
|
|
}
|
|
|
|
|
2011-11-10 21:43:05 +08:00
|
|
|
reason = x86_platform.get_nmi_reason();
|
2011-10-01 03:06:19 +08:00
|
|
|
|
|
|
|
if (reason & NMI_REASON_MASK) {
|
|
|
|
if (reason & NMI_REASON_SERR)
|
|
|
|
pci_serr_error(reason, regs);
|
|
|
|
else if (reason & NMI_REASON_IOCHK)
|
|
|
|
io_check_error(reason, regs);
|
|
|
|
#ifdef CONFIG_X86_32
|
|
|
|
/*
|
|
|
|
* Reassert NMI in case it became active
|
|
|
|
* meanwhile as it's edge-triggered:
|
|
|
|
*/
|
|
|
|
reassert_nmi();
|
|
|
|
#endif
|
2011-10-01 03:06:23 +08:00
|
|
|
__this_cpu_add(nmi_stats.external, 1);
|
2011-10-01 03:06:19 +08:00
|
|
|
raw_spin_unlock(&nmi_reason_lock);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
raw_spin_unlock(&nmi_reason_lock);
|
|
|
|
|
2011-10-01 03:06:22 +08:00
|
|
|
/*
|
|
|
|
* Only one NMI can be latched at a time. To handle
|
|
|
|
* this we may process multiple nmi handlers at once to
|
|
|
|
* cover the case where an NMI is dropped. The downside
|
|
|
|
* to this approach is we may process an NMI prematurely,
|
|
|
|
* while its real NMI is sitting latched. This will cause
|
|
|
|
* an unknown NMI on the next run of the NMI processing.
|
|
|
|
*
|
|
|
|
* We tried to flag that condition above, by setting the
|
|
|
|
* swallow_nmi flag when we process more than one event.
|
|
|
|
* This condition is also only present on the second half
|
|
|
|
* of a back-to-back NMI, so we flag that condition too.
|
|
|
|
*
|
|
|
|
* If both are true, we assume we already processed this
|
|
|
|
* NMI previously and we swallow it. Otherwise we reset
|
|
|
|
* the logic.
|
|
|
|
*
|
|
|
|
* There are scenarios where we may accidentally swallow
|
|
|
|
* a 'real' unknown NMI. For example, while processing
|
|
|
|
* a perf NMI another perf NMI comes in along with a
|
|
|
|
* 'real' unknown NMI. These two NMIs get combined into
|
|
|
|
* one (as descibed above). When the next NMI gets
|
|
|
|
* processed, it will be flagged by perf as handled, but
|
|
|
|
* noone will know that there was a 'real' unknown NMI sent
|
|
|
|
* also. As a result it gets swallowed. Or if the first
|
|
|
|
* perf NMI returns two events handled then the second
|
|
|
|
* NMI will get eaten by the logic below, again losing a
|
|
|
|
* 'real' unknown NMI. But this is the best we can do
|
|
|
|
* for now.
|
|
|
|
*/
|
|
|
|
if (b2b && __this_cpu_read(swallow_nmi))
|
2011-10-01 03:06:23 +08:00
|
|
|
__this_cpu_add(nmi_stats.swallow, 1);
|
2011-10-01 03:06:22 +08:00
|
|
|
else
|
|
|
|
unknown_nmi_error(reason, regs);
|
2011-10-01 03:06:19 +08:00
|
|
|
}
|
2014-04-17 16:18:14 +08:00
|
|
|
NOKPROBE_SYMBOL(default_do_nmi);
|
2011-10-01 03:06:19 +08:00
|
|
|
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
/*
|
2015-07-16 01:29:36 +08:00
|
|
|
* NMIs can page fault or hit breakpoints which will cause it to lose
|
|
|
|
* its NMI context with the CPU when the breakpoint or page fault does an IRET.
|
2015-07-16 01:29:33 +08:00
|
|
|
*
|
|
|
|
* As a result, NMIs can nest if NMIs get unmasked due an IRET during
|
|
|
|
* NMI processing. On x86_64, the asm glue protects us from nested NMIs
|
|
|
|
* if the outer NMI came from kernel mode, but we can still nest if the
|
|
|
|
* outer NMI came from user mode.
|
|
|
|
*
|
|
|
|
* To handle these nested NMIs, we have three states:
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
*
|
|
|
|
* 1) not running
|
|
|
|
* 2) executing
|
|
|
|
* 3) latched
|
|
|
|
*
|
|
|
|
* When no NMI is in progress, it is in the "not running" state.
|
|
|
|
* When an NMI comes in, it goes into the "executing" state.
|
|
|
|
* Normally, if another NMI is triggered, it does not interrupt
|
|
|
|
* the running NMI and the HW will simply latch it so that when
|
|
|
|
* the first NMI finishes, it will restart the second NMI.
|
|
|
|
* (Note, the latch is binary, thus multiple NMIs triggering,
|
|
|
|
* when one is running, are ignored. Only one NMI is restarted.)
|
|
|
|
*
|
2015-07-16 01:29:33 +08:00
|
|
|
* If an NMI executes an iret, another NMI can preempt it. We do not
|
|
|
|
* want to allow this new NMI to run, but we want to execute it when the
|
|
|
|
* first one finishes. We set the state to "latched", and the exit of
|
|
|
|
* the first NMI will perform a dec_return, if the result is zero
|
|
|
|
* (NOT_RUNNING), then it will simply exit the NMI handler. If not, the
|
|
|
|
* dec_return would have set the state to NMI_EXECUTING (what we want it
|
|
|
|
* to be when we are running). In this case, we simply jump back to
|
|
|
|
* rerun the NMI handler again, and restart the 'latched' NMI.
|
2012-06-07 23:03:00 +08:00
|
|
|
*
|
|
|
|
* No trap (breakpoint or page fault) should be hit before nmi_restart,
|
|
|
|
* thus there is no race between the first check of state for NOT_RUNNING
|
|
|
|
* and setting it to NMI_EXECUTING. The HW will prevent nested NMIs
|
|
|
|
* at this point.
|
2012-06-07 23:54:37 +08:00
|
|
|
*
|
|
|
|
* In case the NMI takes a page fault, we need to save off the CR2
|
|
|
|
* because the NMI could have preempted another page fault and corrupt
|
|
|
|
* the CR2 that is about to be read. As nested NMIs must be restarted
|
|
|
|
* and they can not take breakpoints or page faults, the update of the
|
|
|
|
* CR2 must be done before converting the nmi state back to NOT_RUNNING.
|
|
|
|
* Otherwise, there would be a race of another nested NMI coming in
|
|
|
|
* after setting state to NOT_RUNNING but before updating the nmi_cr2.
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
*/
|
|
|
|
enum nmi_states {
|
2012-06-07 23:03:00 +08:00
|
|
|
NMI_NOT_RUNNING = 0,
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
NMI_EXECUTING,
|
|
|
|
NMI_LATCHED,
|
|
|
|
};
|
|
|
|
static DEFINE_PER_CPU(enum nmi_states, nmi_state);
|
2012-06-07 23:54:37 +08:00
|
|
|
static DEFINE_PER_CPU(unsigned long, nmi_cr2);
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
|
2015-07-16 01:29:33 +08:00
|
|
|
#ifdef CONFIG_X86_64
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
/*
|
2015-07-16 01:29:33 +08:00
|
|
|
* In x86_64, we need to handle breakpoint -> NMI -> breakpoint. Without
|
|
|
|
* some care, the inner breakpoint will clobber the outer breakpoint's
|
|
|
|
* stack.
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
*
|
2015-07-16 01:29:33 +08:00
|
|
|
* If a breakpoint is being processed, and the debug stack is being
|
|
|
|
* used, if an NMI comes in and also hits a breakpoint, the stack
|
|
|
|
* pointer will be set to the same fixed address as the breakpoint that
|
|
|
|
* was interrupted, causing that stack to be corrupted. To handle this
|
|
|
|
* case, check if the stack that was interrupted is the debug stack, and
|
|
|
|
* if so, change the IDT so that new breakpoints will use the current
|
|
|
|
* stack and not switch to the fixed address. On return of the NMI,
|
|
|
|
* switch back to the original IDT.
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
*/
|
|
|
|
static DEFINE_PER_CPU(int, update_debug_stack);
|
2015-07-16 01:29:33 +08:00
|
|
|
#endif
|
2011-12-09 16:02:19 +08:00
|
|
|
|
2015-07-16 01:29:33 +08:00
|
|
|
dotraplinkage notrace void
|
|
|
|
do_nmi(struct pt_regs *regs, long error_code)
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
{
|
2015-07-16 01:29:33 +08:00
|
|
|
if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) {
|
|
|
|
this_cpu_write(nmi_state, NMI_LATCHED);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
this_cpu_write(nmi_state, NMI_EXECUTING);
|
|
|
|
this_cpu_write(nmi_cr2, read_cr2());
|
|
|
|
nmi_restart:
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_64
|
2011-12-09 16:02:19 +08:00
|
|
|
/*
|
|
|
|
* If we interrupted a breakpoint, it is possible that
|
|
|
|
* the nmi handler will have breakpoints too. We need to
|
|
|
|
* change the IDT such that breakpoints that happen here
|
|
|
|
* continue to use the NMI stack.
|
|
|
|
*/
|
|
|
|
if (unlikely(is_debug_stack(regs->sp))) {
|
|
|
|
debug_stack_set_zero();
|
2012-05-30 23:43:19 +08:00
|
|
|
this_cpu_write(update_debug_stack, 1);
|
2011-12-09 16:02:19 +08:00
|
|
|
}
|
x86: Allow NMIs to hit breakpoints in i386
With i386, NMIs and breakpoints use the current stack and they
do not reset the stack pointer to a fix point that might corrupt
a previous NMI or breakpoint (as it does in x86_64). But NMIs are
still not made to be re-entrant, and need to prevent the case that
an NMI hitting a breakpoint (which does an iret), doesn't allow
another NMI to run.
The fix is to let the NMI be in 3 different states:
1) not running
2) executing
3) latched
When no NMI is executing on a given CPU, the state is "not running".
When the first NMI comes in, the state is switched to "executing".
On exit of that NMI, a cmpxchg is performed to switch the state
back to "not running" and if that fails, the NMI is restarted.
If a breakpoint is hit and does an iret, which re-enables NMIs,
and another NMI comes in before the first NMI finished, it will
detect that the state is not in the "not running" state and the
current NMI is nested. In this case, the state is switched to "latched"
to let the interrupted NMI know to restart the NMI handler, and
the nested NMI exits without doing anything.
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul Turner <pjt@google.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-12-14 05:44:16 +08:00
|
|
|
#endif
|
|
|
|
|
2011-10-01 03:06:19 +08:00
|
|
|
nmi_enter();
|
|
|
|
|
|
|
|
inc_irq_stat(__nmi_count);
|
|
|
|
|
|
|
|
if (!ignore_nmis)
|
|
|
|
default_do_nmi(regs);
|
|
|
|
|
|
|
|
nmi_exit();
|
2011-12-09 16:02:19 +08:00
|
|
|
|
2015-07-16 01:29:33 +08:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
if (unlikely(this_cpu_read(update_debug_stack))) {
|
|
|
|
debug_stack_reset();
|
|
|
|
this_cpu_write(update_debug_stack, 0);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))
|
|
|
|
write_cr2(this_cpu_read(nmi_cr2));
|
|
|
|
if (this_cpu_dec_return(nmi_state))
|
|
|
|
goto nmi_restart;
|
2011-10-01 03:06:19 +08:00
|
|
|
}
|
2014-04-17 16:18:14 +08:00
|
|
|
NOKPROBE_SYMBOL(do_nmi);
|
2011-10-01 03:06:19 +08:00
|
|
|
|
|
|
|
void stop_nmi(void)
|
|
|
|
{
|
|
|
|
ignore_nmis++;
|
|
|
|
}
|
|
|
|
|
|
|
|
void restart_nmi(void)
|
|
|
|
{
|
|
|
|
ignore_nmis--;
|
|
|
|
}
|
2011-10-01 03:06:22 +08:00
|
|
|
|
|
|
|
/* reset the back-to-back NMI logic */
|
|
|
|
void local_touch_nmi(void)
|
|
|
|
{
|
|
|
|
__this_cpu_write(last_nmi_rip, 0);
|
|
|
|
}
|
2013-01-04 19:12:44 +08:00
|
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EXPORT_SYMBOL_GPL(local_touch_nmi);
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