2008-06-26 17:21:34 +08:00
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/*
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* Generic helpers for smp ipi calls
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*
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* (C) Jens Axboe <jens.axboe@oracle.com> 2008
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/percpu.h>
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#include <linux/rcupdate.h>
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2008-07-16 05:02:33 +08:00
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#include <linux/rculist.h>
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2008-06-26 17:21:34 +08:00
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#include <linux/smp.h>
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static DEFINE_PER_CPU(struct call_single_queue, call_single_queue);
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static LIST_HEAD(call_function_queue);
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__cacheline_aligned_in_smp DEFINE_SPINLOCK(call_function_lock);
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enum {
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CSD_FLAG_WAIT = 0x01,
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CSD_FLAG_ALLOC = 0x02,
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2009-01-29 23:08:01 +08:00
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CSD_FLAG_LOCK = 0x04,
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2008-06-26 17:21:34 +08:00
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};
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struct call_function_data {
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struct call_single_data csd;
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spinlock_t lock;
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unsigned int refs;
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struct rcu_head rcu_head;
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2008-12-30 06:35:16 +08:00
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unsigned long cpumask_bits[];
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2008-06-26 17:21:34 +08:00
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};
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struct call_single_queue {
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struct list_head list;
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spinlock_t lock;
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};
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2008-07-26 10:45:11 +08:00
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static int __cpuinit init_call_single_data(void)
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2008-06-26 17:21:34 +08:00
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{
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int i;
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for_each_possible_cpu(i) {
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struct call_single_queue *q = &per_cpu(call_single_queue, i);
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spin_lock_init(&q->lock);
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INIT_LIST_HEAD(&q->list);
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}
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2008-07-26 10:45:11 +08:00
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return 0;
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2008-06-26 17:21:34 +08:00
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}
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2008-07-26 10:45:11 +08:00
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early_initcall(init_call_single_data);
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2008-06-26 17:21:34 +08:00
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static void csd_flag_wait(struct call_single_data *data)
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{
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/* Wait for response */
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do {
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if (!(data->flags & CSD_FLAG_WAIT))
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break;
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cpu_relax();
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} while (1);
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}
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/*
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* Insert a previously allocated call_single_data element for execution
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* on the given CPU. data must already have ->func, ->info, and ->flags set.
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*/
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static void generic_exec_single(int cpu, struct call_single_data *data)
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{
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struct call_single_queue *dst = &per_cpu(call_single_queue, cpu);
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int wait = data->flags & CSD_FLAG_WAIT, ipi;
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unsigned long flags;
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spin_lock_irqsave(&dst->lock, flags);
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ipi = list_empty(&dst->list);
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list_add_tail(&data->list, &dst->list);
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spin_unlock_irqrestore(&dst->lock, flags);
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2008-10-31 01:28:41 +08:00
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/*
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generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
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* The list addition should be visible before sending the IPI
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* handler locks the list to pull the entry off it because of
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* normal cache coherency rules implied by spinlocks.
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*
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* If IPIs can go out of order to the cache coherency protocol
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* in an architecture, sufficient synchronisation should be added
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* to arch code to make it appear to obey cache coherency WRT
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* locking and barrier primitives. Generic code isn't really equipped
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* to do the right thing...
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2008-10-31 01:28:41 +08:00
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*/
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2008-06-26 17:21:34 +08:00
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if (ipi)
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arch_send_call_function_single_ipi(cpu);
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if (wait)
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csd_flag_wait(data);
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}
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static void rcu_free_call_data(struct rcu_head *head)
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{
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struct call_function_data *data;
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data = container_of(head, struct call_function_data, rcu_head);
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kfree(data);
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}
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/*
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* Invoked by arch to handle an IPI for call function. Must be called with
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* interrupts disabled.
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*/
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void generic_smp_call_function_interrupt(void)
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{
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struct call_function_data *data;
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int cpu = get_cpu();
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|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
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/*
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* Ensure entry is visible on call_function_queue after we have
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* entered the IPI. See comment in smp_call_function_many.
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* If we don't have this, then we may miss an entry on the list
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* and never get another IPI to process it.
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*/
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smp_mb();
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2008-06-26 17:21:34 +08:00
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/*
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* It's ok to use list_for_each_rcu() here even though we may delete
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* 'pos', since list_del_rcu() doesn't clear ->next
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*/
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rcu_read_lock();
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list_for_each_entry_rcu(data, &call_function_queue, csd.list) {
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int refs;
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2008-12-30 06:35:16 +08:00
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if (!cpumask_test_cpu(cpu, to_cpumask(data->cpumask_bits)))
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2008-06-26 17:21:34 +08:00
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continue;
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data->csd.func(data->csd.info);
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spin_lock(&data->lock);
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2008-12-30 06:35:16 +08:00
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cpumask_clear_cpu(cpu, to_cpumask(data->cpumask_bits));
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2008-06-26 17:21:34 +08:00
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WARN_ON(data->refs == 0);
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data->refs--;
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refs = data->refs;
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spin_unlock(&data->lock);
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if (refs)
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continue;
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spin_lock(&call_function_lock);
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list_del_rcu(&data->csd.list);
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spin_unlock(&call_function_lock);
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if (data->csd.flags & CSD_FLAG_WAIT) {
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/*
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* serialize stores to data with the flag clear
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* and wakeup
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*/
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smp_wmb();
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data->csd.flags &= ~CSD_FLAG_WAIT;
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2008-08-12 16:05:13 +08:00
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}
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if (data->csd.flags & CSD_FLAG_ALLOC)
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2008-06-26 17:21:34 +08:00
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call_rcu(&data->rcu_head, rcu_free_call_data);
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}
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rcu_read_unlock();
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put_cpu();
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}
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/*
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* Invoked by arch to handle an IPI for call function single. Must be called
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* from the arch with interrupts disabled.
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*/
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void generic_smp_call_function_single_interrupt(void)
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{
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struct call_single_queue *q = &__get_cpu_var(call_single_queue);
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LIST_HEAD(list);
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
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unsigned int data_flags;
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2008-06-26 17:21:34 +08:00
|
|
|
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
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spin_lock(&q->lock);
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list_replace_init(&q->list, &list);
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spin_unlock(&q->lock);
|
2008-06-26 17:21:34 +08:00
|
|
|
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
|
|
|
while (!list_empty(&list)) {
|
|
|
|
struct call_single_data *data;
|
2008-06-26 17:21:34 +08:00
|
|
|
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
|
|
|
data = list_entry(list.next, struct call_single_data,
|
|
|
|
list);
|
|
|
|
list_del(&data->list);
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
/*
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
|
|
|
* 'data' can be invalid after this call if
|
|
|
|
* flags == 0 (when called through
|
|
|
|
* generic_exec_single(), so save them away before
|
|
|
|
* making the call.
|
2008-06-26 17:21:34 +08:00
|
|
|
*/
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
|
|
|
data_flags = data->flags;
|
|
|
|
|
|
|
|
data->func(data->info);
|
|
|
|
|
|
|
|
if (data_flags & CSD_FLAG_WAIT) {
|
|
|
|
smp_wmb();
|
|
|
|
data->flags &= ~CSD_FLAG_WAIT;
|
|
|
|
} else if (data_flags & CSD_FLAG_LOCK) {
|
|
|
|
smp_wmb();
|
|
|
|
data->flags &= ~CSD_FLAG_LOCK;
|
|
|
|
} else if (data_flags & CSD_FLAG_ALLOC)
|
|
|
|
kfree(data);
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-01-29 23:08:01 +08:00
|
|
|
static DEFINE_PER_CPU(struct call_single_data, csd_data);
|
|
|
|
|
2008-06-26 17:21:34 +08:00
|
|
|
/*
|
|
|
|
* smp_call_function_single - Run a function on a specific CPU
|
|
|
|
* @func: The function to run. This must be fast and non-blocking.
|
|
|
|
* @info: An arbitrary pointer to pass to the function.
|
|
|
|
* @wait: If true, wait until function has completed on other CPUs.
|
|
|
|
*
|
|
|
|
* Returns 0 on success, else a negative status code. Note that @wait
|
|
|
|
* will be implicitly turned on in case of allocation failures, since
|
|
|
|
* we fall back to on-stack allocation.
|
|
|
|
*/
|
|
|
|
int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
|
2008-06-06 17:18:06 +08:00
|
|
|
int wait)
|
2008-06-26 17:21:34 +08:00
|
|
|
{
|
|
|
|
struct call_single_data d;
|
|
|
|
unsigned long flags;
|
2008-08-26 08:07:14 +08:00
|
|
|
/* prevent preemption and reschedule on another processor,
|
|
|
|
as well as CPU removal */
|
2008-06-26 17:21:34 +08:00
|
|
|
int me = get_cpu();
|
2008-08-26 08:07:14 +08:00
|
|
|
int err = 0;
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
/* Can deadlock when called with interrupts disabled */
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
|
|
|
|
if (cpu == me) {
|
|
|
|
local_irq_save(flags);
|
|
|
|
func(info);
|
|
|
|
local_irq_restore(flags);
|
2009-01-01 07:42:15 +08:00
|
|
|
} else if ((unsigned)cpu < nr_cpu_ids && cpu_online(cpu)) {
|
2009-01-29 23:08:01 +08:00
|
|
|
struct call_single_data *data;
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
if (!wait) {
|
2009-01-29 23:08:01 +08:00
|
|
|
/*
|
|
|
|
* We are calling a function on a single CPU
|
|
|
|
* and we are not going to wait for it to finish.
|
|
|
|
* We first try to allocate the data, but if we
|
|
|
|
* fail, we fall back to use a per cpu data to pass
|
|
|
|
* the information to that CPU. Since all callers
|
|
|
|
* of this code will use the same data, we must
|
|
|
|
* synchronize the callers to prevent a new caller
|
|
|
|
* from corrupting the data before the callee
|
|
|
|
* can access it.
|
|
|
|
*
|
|
|
|
* The CSD_FLAG_LOCK is used to let us know when
|
|
|
|
* the IPI handler is done with the data.
|
|
|
|
* The first caller will set it, and the callee
|
|
|
|
* will clear it. The next caller must wait for
|
|
|
|
* it to clear before we set it again. This
|
|
|
|
* will make sure the callee is done with the
|
|
|
|
* data before a new caller will use it.
|
|
|
|
*/
|
2008-06-26 17:21:34 +08:00
|
|
|
data = kmalloc(sizeof(*data), GFP_ATOMIC);
|
|
|
|
if (data)
|
|
|
|
data->flags = CSD_FLAG_ALLOC;
|
2009-01-29 23:08:01 +08:00
|
|
|
else {
|
|
|
|
data = &per_cpu(csd_data, me);
|
|
|
|
while (data->flags & CSD_FLAG_LOCK)
|
|
|
|
cpu_relax();
|
|
|
|
data->flags = CSD_FLAG_LOCK;
|
|
|
|
}
|
|
|
|
} else {
|
2008-06-26 17:21:34 +08:00
|
|
|
data = &d;
|
|
|
|
data->flags = CSD_FLAG_WAIT;
|
|
|
|
}
|
|
|
|
|
|
|
|
data->func = func;
|
|
|
|
data->info = info;
|
|
|
|
generic_exec_single(cpu, data);
|
2008-08-26 08:07:14 +08:00
|
|
|
} else {
|
|
|
|
err = -ENXIO; /* CPU not online */
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
put_cpu();
|
2008-08-26 08:07:14 +08:00
|
|
|
return err;
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(smp_call_function_single);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* __smp_call_function_single(): Run a function on another CPU
|
|
|
|
* @cpu: The CPU to run on.
|
|
|
|
* @data: Pre-allocated and setup data structure
|
|
|
|
*
|
|
|
|
* Like smp_call_function_single(), but allow caller to pass in a pre-allocated
|
|
|
|
* data structure. Useful for embedding @data inside other structures, for
|
|
|
|
* instance.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
void __smp_call_function_single(int cpu, struct call_single_data *data)
|
|
|
|
{
|
|
|
|
/* Can deadlock when called with interrupts disabled */
|
|
|
|
WARN_ON((data->flags & CSD_FLAG_WAIT) && irqs_disabled());
|
|
|
|
|
|
|
|
generic_exec_single(cpu, data);
|
|
|
|
}
|
|
|
|
|
2008-12-30 06:35:17 +08:00
|
|
|
/* FIXME: Shim for archs using old arch_send_call_function_ipi API. */
|
|
|
|
#ifndef arch_send_call_function_ipi_mask
|
|
|
|
#define arch_send_call_function_ipi_mask(maskp) \
|
|
|
|
arch_send_call_function_ipi(*(maskp))
|
|
|
|
#endif
|
|
|
|
|
2008-06-26 17:21:34 +08:00
|
|
|
/**
|
2008-12-30 06:35:16 +08:00
|
|
|
* smp_call_function_many(): Run a function on a set of other CPUs.
|
|
|
|
* @mask: The set of cpus to run on (only runs on online subset).
|
2008-06-26 17:21:34 +08:00
|
|
|
* @func: The function to run. This must be fast and non-blocking.
|
|
|
|
* @info: An arbitrary pointer to pass to the function.
|
|
|
|
* @wait: If true, wait (atomically) until function has completed on other CPUs.
|
|
|
|
*
|
|
|
|
* If @wait is true, then returns once @func has returned. Note that @wait
|
|
|
|
* will be implicitly turned on in case of allocation failures, since
|
|
|
|
* we fall back to on-stack allocation.
|
|
|
|
*
|
|
|
|
* You must not call this function with disabled interrupts or from a
|
|
|
|
* hardware interrupt handler or from a bottom half handler. Preemption
|
|
|
|
* must be disabled when calling this function.
|
|
|
|
*/
|
2008-12-30 06:35:16 +08:00
|
|
|
void smp_call_function_many(const struct cpumask *mask,
|
|
|
|
void (*func)(void *), void *info,
|
|
|
|
bool wait)
|
2008-06-26 17:21:34 +08:00
|
|
|
{
|
2008-12-30 06:35:16 +08:00
|
|
|
struct call_function_data *data;
|
2008-06-26 17:21:34 +08:00
|
|
|
unsigned long flags;
|
2008-12-30 06:35:16 +08:00
|
|
|
int cpu, next_cpu;
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
/* Can deadlock when called with interrupts disabled */
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
|
2008-12-30 06:35:16 +08:00
|
|
|
/* So, what's a CPU they want? Ignoring this one. */
|
|
|
|
cpu = cpumask_first_and(mask, cpu_online_mask);
|
|
|
|
if (cpu == smp_processor_id())
|
|
|
|
cpu = cpumask_next_and(cpu, mask, cpu_online_mask);
|
|
|
|
/* No online cpus? We're done. */
|
|
|
|
if (cpu >= nr_cpu_ids)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Do we have another CPU which isn't us? */
|
|
|
|
next_cpu = cpumask_next_and(cpu, mask, cpu_online_mask);
|
|
|
|
if (next_cpu == smp_processor_id())
|
|
|
|
next_cpu = cpumask_next_and(next_cpu, mask, cpu_online_mask);
|
|
|
|
|
|
|
|
/* Fastpath: do that cpu by itself. */
|
|
|
|
if (next_cpu >= nr_cpu_ids) {
|
|
|
|
smp_call_function_single(cpu, func, info, wait);
|
|
|
|
return;
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
|
2008-12-30 06:35:16 +08:00
|
|
|
data = kmalloc(sizeof(*data) + cpumask_size(), GFP_ATOMIC);
|
|
|
|
if (unlikely(!data)) {
|
|
|
|
/* Slow path. */
|
|
|
|
for_each_online_cpu(cpu) {
|
|
|
|
if (cpu == smp_processor_id())
|
|
|
|
continue;
|
|
|
|
if (cpumask_test_cpu(cpu, mask))
|
|
|
|
smp_call_function_single(cpu, func, info, wait);
|
|
|
|
}
|
|
|
|
return;
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_init(&data->lock);
|
2008-12-30 06:35:16 +08:00
|
|
|
data->csd.flags = CSD_FLAG_ALLOC;
|
|
|
|
if (wait)
|
|
|
|
data->csd.flags |= CSD_FLAG_WAIT;
|
2008-06-26 17:21:34 +08:00
|
|
|
data->csd.func = func;
|
|
|
|
data->csd.info = info;
|
2008-12-30 06:35:16 +08:00
|
|
|
cpumask_and(to_cpumask(data->cpumask_bits), mask, cpu_online_mask);
|
|
|
|
cpumask_clear_cpu(smp_processor_id(), to_cpumask(data->cpumask_bits));
|
|
|
|
data->refs = cpumask_weight(to_cpumask(data->cpumask_bits));
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
spin_lock_irqsave(&call_function_lock, flags);
|
|
|
|
list_add_tail_rcu(&data->csd.list, &call_function_queue);
|
|
|
|
spin_unlock_irqrestore(&call_function_lock, flags);
|
|
|
|
|
2008-10-31 01:28:41 +08:00
|
|
|
/*
|
|
|
|
* Make the list addition visible before sending the ipi.
|
generic IPI: simplify barriers and locking
Simplify the barriers in generic remote function call interrupt
code.
Firstly, just unconditionally take the lock and check the list
in the generic_call_function_single_interrupt IPI handler. As
we've just taken an IPI here, the chances are fairly high that
there will be work on the list for us, so do the locking
unconditionally. This removes the tricky lockless list_empty
check and dubious barriers. The change looks bigger than it is
because it is just removing an outer loop.
Secondly, clarify architecture specific IPI locking rules.
Generic code has no tools to impose any sane ordering on IPIs if
they go outside normal cache coherency, ergo the arch code must
make them appear to obey cache coherency as a "memory operation"
to initiate an IPI, and a "memory operation" to receive one.
This way at least they can be reasoned about in generic code,
and smp_mb used to provide ordering.
The combination of these two changes means that explict barriers
can be taken out of queue handling for the single case -- shared
data is explicitly locked, and ipi ordering must conform to
that, so no barriers needed. An extra barrier is needed in the
many handler, so as to ensure we load the list element after the
IPI is received.
Does any architecture actually *need* these barriers? For the
initiator I could see it, but for the handler I would be
surprised. So the other thing we could do for simplicity is just
to require that, rather than just matching with cache coherency,
we just require a full barrier before generating an IPI, and
after receiving an IPI. In which case, the smp_mb()s can go
away. But just for now, we'll be on the safe side and use the
barriers (they're in the slow case anyway).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: linux-arch@vger.kernel.org
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Jens Axboe <jens.axboe@oracle.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-02-25 13:22:45 +08:00
|
|
|
* (IPIs must obey or appear to obey normal Linux cache coherency
|
|
|
|
* rules -- see comment in generic_exec_single).
|
2008-10-31 01:28:41 +08:00
|
|
|
*/
|
|
|
|
smp_mb();
|
|
|
|
|
2008-06-26 17:21:34 +08:00
|
|
|
/* Send a message to all CPUs in the map */
|
2008-12-30 06:35:17 +08:00
|
|
|
arch_send_call_function_ipi_mask(to_cpumask(data->cpumask_bits));
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
/* optionally wait for the CPUs to complete */
|
2008-12-30 06:35:16 +08:00
|
|
|
if (wait)
|
2008-06-26 17:21:34 +08:00
|
|
|
csd_flag_wait(&data->csd);
|
|
|
|
}
|
2008-12-30 06:35:16 +08:00
|
|
|
EXPORT_SYMBOL(smp_call_function_many);
|
2008-06-26 17:21:34 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* smp_call_function(): Run a function on all other CPUs.
|
|
|
|
* @func: The function to run. This must be fast and non-blocking.
|
|
|
|
* @info: An arbitrary pointer to pass to the function.
|
|
|
|
* @wait: If true, wait (atomically) until function has completed on other CPUs.
|
|
|
|
*
|
2008-12-30 06:35:16 +08:00
|
|
|
* Returns 0.
|
2008-06-26 17:21:34 +08:00
|
|
|
*
|
|
|
|
* If @wait is true, then returns once @func has returned; otherwise
|
|
|
|
* it returns just before the target cpu calls @func. In case of allocation
|
|
|
|
* failure, @wait will be implicitly turned on.
|
|
|
|
*
|
|
|
|
* You must not call this function with disabled interrupts or from a
|
|
|
|
* hardware interrupt handler or from a bottom half handler.
|
|
|
|
*/
|
2008-06-06 17:18:06 +08:00
|
|
|
int smp_call_function(void (*func)(void *), void *info, int wait)
|
2008-06-26 17:21:34 +08:00
|
|
|
{
|
|
|
|
preempt_disable();
|
2008-12-30 06:35:16 +08:00
|
|
|
smp_call_function_many(cpu_online_mask, func, info, wait);
|
2008-06-26 17:21:34 +08:00
|
|
|
preempt_enable();
|
2008-12-30 06:35:16 +08:00
|
|
|
return 0;
|
2008-06-26 17:21:34 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(smp_call_function);
|
|
|
|
|
|
|
|
void ipi_call_lock(void)
|
|
|
|
{
|
|
|
|
spin_lock(&call_function_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ipi_call_unlock(void)
|
|
|
|
{
|
|
|
|
spin_unlock(&call_function_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ipi_call_lock_irq(void)
|
|
|
|
{
|
|
|
|
spin_lock_irq(&call_function_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ipi_call_unlock_irq(void)
|
|
|
|
{
|
|
|
|
spin_unlock_irq(&call_function_lock);
|
|
|
|
}
|