linux/drivers/clk/ti/Makefile

ifneq ($(CONFIG_OF),)
obj-y					+= clk.o autoidle.o clockdomain.o
clk-common				= dpll.o composite.o divider.o gate.o \
					  fixed-factor.o mux.o apll.o
obj-$(CONFIG_SOC_AM33XX)		+= $(clk-common) clk-33xx.o
obj-$(CONFIG_SOC_TI81XX)		+= $(clk-common) fapll.o
obj-$(CONFIG_ARCH_OMAP2)		+= $(clk-common) interface.o clk-2xxx.o
obj-$(CONFIG_ARCH_OMAP3)		+= $(clk-common) interface.o clk-3xxx.o
obj-$(CONFIG_ARCH_OMAP4)		+= $(clk-common) clk-44xx.o
obj-$(CONFIG_SOC_OMAP5)			+= $(clk-common) clk-54xx.o
obj-$(CONFIG_SOC_DRA7XX)		+= $(clk-common) clk-7xx.o \
					   clk-dra7-atl.o
obj-$(CONFIG_SOC_AM43XX)		+= $(clk-common) clk-43xx.o
endif
CLK: TI: add DT alias clock registration mechanism Some devices require their clocks to be available with a specific dev-id con-id mapping. With DT, the clocks can be found by default only with their name, or alternatively through the device node of the consumer. With drivers, that don't support DT fully yet, add mechanism to register specific clock names. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-18 16:52:33 +08:00			`ifneq ($(CONFIG_OF),)`
CLK: TI: add support for clockdomain binding Some OMAP clocks require knowledge about their parent clockdomain for book keeping purposes. This patch creates a new DT binding for TI clockdomains, which act as a collection of device clocks. Clockdomain itself is rather misleading name for the hardware functionality, as at least on OMAP4 / OMAP5 / DRA7 the clockdomains can be collections of either clocks and/or IP blocks, thus idle-domain or such might be more appropriate. For most cases on these SoCs, the kernel doesn't even need the information and the mappings can be ignored. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-08-22 00:39:15 +08:00			`obj-y += clk.o autoidle.o clockdomain.o`
CLK: TI: add support for gate clock This patch adds support for TI specific gate clocks. These behave as basic gate-clock, but have different ops / hw-ops for controlling the actual gate, for example waiting until the clock is ready. Several sub-types are supported: - ti,gate-clock: basic gate clock with default ops/hwops - ti,clkdm-gate-clock: clockdomain level gate control - ti,dss-gate-clock: gate clock with DSS specific hardware handling - ti,am35xx-gate-clock: gate clock with AM35xx specific hardware handling - ti,hsdiv-gate-clock: gate clock with OMAP36xx hardware errata handling Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-06-18 23:55:59 +08:00			`clk-common = dpll.o composite.o divider.o gate.o \`
CLK: TI: DRA7: Add APLL support The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-23 14:35:37 +08:00			`fixed-factor.o mux.o apll.o`
CLK: TI: add am33xx clock init file clk-33xx.c now contains the clock init functionality for am33xx, including DT clock registration and adding of static clkdev entries. This patch also moves the omap2_clk_enable_init_clocks declaration to the driver include, as this is needed by the am33xx clock init code. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-19 16:36:01 +08:00			`obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o`
clk: ti: Add support for FAPLL on dm816x On dm816x the clocks are sourced from a FAPLL (Flying Adder PLL) that does not seem to be used on the other omap variants. There are four instances of the FAPLL on dm816x that each have three to seven child synthesizers. I've set up the FAPLL as a single fapll.c driver. Later on we could potentially have the PLL code generic. To do that, we would have to consider the following: 1. Setting the PLL to bypass mode also sets the child synthesizers into bypass mode. As the bypass rate can also be generated by the PLL in regular mode, there's no way for the child synthesizers to detect the bypass mode based on the parent clock rate. 2. The PLL registers control the power for each of the child syntheriser. Note that the clocks are currently still missing the set_rate implementation so things are still running based on the bootloader values. That's OK for now as most of the outputs have dividers and those can be set using the existing TI component clock code. I have verified that the extclk rates are correct for a few clocks, so adding the set_rate support should be fairly trivial later on. This code is partially based on the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org> 2015-01-14 06:51:27 +08:00			`obj-$(CONFIG_SOC_TI81XX) += $(clk-common) fapll.o`
CLK: TI: OMAP2: add clock init support Adds support for registering the alias clocks, boot time clock-enable list and disabling autoidle of clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> 2014-02-24 23:52:57 +08:00			`obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o`
CLK: TI: add omap3 clock init file clk-3xxx.c now contains the clock init functionality for omap3, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-08-02 19:04:19 +08:00			`obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o clk-3xxx.o`
CLK: TI: add omap4 clock init file clk-44xx.c now contains the clock init functionality for omap4, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-18 20:57:51 +08:00			`obj-$(CONFIG_ARCH_OMAP4) += $(clk-common) clk-44xx.o`
CLK: TI: add omap5 clock init file clk-54xx.c now contains the clock init functionality for omap5, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-18 22:15:51 +08:00			`obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o`
CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic) Audio Tracking Logic is designed to be used by HD Radio applications to synchronize the audio output clocks to the baseband clock. ATL can be also used to track errors between two reference clocks (BWS, AWS) and generate a modulated clock output which averages to some desired frequency. In essence ATL is generating a clock to be used by an audio codec and also to be used by the SoC as MCLK. To be able to integrate the ATL provided clocks to the clock tree we need two types of DT binding: - DT clock nodes to represent the ATL clocks towards the CCF - binding for the ATL IP itself which is going to handle the hw configuration The reason for this type of setup is that ATL itself is a separate device in the SoC, it has it's own address space and clock domain. Other IPs can use the ATL generated clock as their functional clock (McASPs for example) and external components like audio codecs can also use the very same clock as their MCLK. The ATL IP in DRA7 contains 4 ATL instences. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> 2014-05-07 18:20:47 +08:00			`obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \`
			`clk-dra7-atl.o`
CLK: TI: add am43xx clock init file clk-43xx.c now contains the clock init functionality for am43xx, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-09-20 22:02:40 +08:00			`obj-$(CONFIG_SOC_AM43XX) += $(clk-common) clk-43xx.o`
CLK: TI: add DT alias clock registration mechanism Some devices require their clocks to be available with a specific dev-id con-id mapping. With DT, the clocks can be found by default only with their name, or alternatively through the device node of the consumer. With drivers, that don't support DT fully yet, add mechanism to register specific clock names. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> 2013-07-18 16:52:33 +08:00			`endif`