2016-03-23 11:34:13 +08:00
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/*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* AM335x ICE V2 board
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* http://www.ti.com/tool/tmdsice3359
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "TI AM3359 ICE-V2";
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compatible = "ti,am3359-icev2", "ti,am33xx";
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2016-08-31 18:35:30 +08:00
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memory@80000000 {
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2016-03-23 11:34:13 +08:00
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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2017-01-18 12:03:23 +08:00
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chosen {
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stdout-path = &uart3;
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};
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2016-08-02 00:46:58 +08:00
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vbat: fixedregulator0 {
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2016-03-23 11:34:13 +08:00
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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2016-08-02 00:46:58 +08:00
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vtt_fixed: fixedregulator1 {
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2016-03-23 11:34:13 +08:00
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compatible = "regulator-fixed";
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regulator-name = "vtt";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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};
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2016-10-07 22:44:23 +08:00
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leds-iio {
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status = "disabled";
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2016-03-23 11:34:13 +08:00
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compatible = "gpio-leds";
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2016-10-07 22:44:23 +08:00
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led-out0 {
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2016-03-23 11:34:13 +08:00
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label = "out0";
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gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out1 {
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2016-03-23 11:34:13 +08:00
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label = "out1";
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gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out2 {
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2016-03-23 11:34:13 +08:00
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label = "out2";
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gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out3 {
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2016-03-23 11:34:13 +08:00
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label = "out3";
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gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out4 {
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2016-03-23 11:34:13 +08:00
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label = "out4";
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gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out5 {
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2016-03-23 11:34:13 +08:00
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label = "out5";
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gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out6 {
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2016-03-23 11:34:13 +08:00
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label = "out6";
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gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-10-07 22:44:23 +08:00
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led-out7 {
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2016-03-23 11:34:13 +08:00
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label = "out7";
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gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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/* Tricolor status LEDs */
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2016-08-02 00:47:03 +08:00
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leds1 {
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2016-03-23 11:34:13 +08:00
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds>;
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2016-08-02 00:47:03 +08:00
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led0 {
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2016-03-23 11:34:13 +08:00
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label = "status0:red:cpu0";
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gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "cpu0";
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};
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2016-08-02 00:47:03 +08:00
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led1 {
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2016-03-23 11:34:13 +08:00
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label = "status0:green:usr";
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gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led2 {
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2016-03-23 11:34:13 +08:00
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label = "status0:yellow:usr";
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gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led3 {
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2016-03-23 11:34:13 +08:00
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label = "status1:red:mmc0";
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gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "mmc0";
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};
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2016-08-02 00:47:03 +08:00
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led4 {
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2016-03-23 11:34:13 +08:00
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label = "status1:green:usr";
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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2016-08-02 00:47:03 +08:00
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led5 {
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2016-03-23 11:34:13 +08:00
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label = "status1:yellow:usr";
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gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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2016-08-24 15:58:59 +08:00
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gpio-decoder {
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compatible = "gpio-decoder";
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gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
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<&pca9536 2 GPIO_ACTIVE_HIGH>,
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<&pca9536 1 GPIO_ACTIVE_HIGH>,
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<&pca9536 0 GPIO_ACTIVE_HIGH>;
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linux,axis = <0>; /* ABS_X */
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decoder-max-value = <9>;
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};
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2016-03-23 11:34:13 +08:00
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};
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&am33xx_pinmux {
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user_leds: user_leds {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
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AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
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AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
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AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
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AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
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AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
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>;
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};
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mmc0_pins_default: mmc0_pins_default {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
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AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
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AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
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AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
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AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
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AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
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>;
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};
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i2c0_pins_default: i2c0_pins_default {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
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AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
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>;
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};
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spi0_pins_default: spi0_pins_default {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
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AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
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AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
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AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
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2016-10-07 22:44:22 +08:00
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AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
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AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
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2016-03-23 11:34:13 +08:00
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>;
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};
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uart3_pins_default: uart3_pins_default {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
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AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
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>;
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};
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2017-03-14 20:50:21 +08:00
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1, RMII mode */
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AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
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AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
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AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
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AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
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AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
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AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
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AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
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AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
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/* Slave 2, RMII mode */
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AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
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AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
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AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
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AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
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AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
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AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
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AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
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AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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/* Slave 2 reset value */
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AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
|
|
|
|
|
/* MDIO */
|
|
|
|
|
AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
|
|
|
|
|
AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
davinci_mdio_sleep: davinci_mdio_sleep {
|
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
|
/* MDIO reset value */
|
|
|
|
|
AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
|
|
|
|
|
AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
|
|
|
|
|
>;
|
|
|
|
|
};
|
2016-03-23 11:34:13 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c0 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&i2c0_pins_default>;
|
|
|
|
|
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
tps: power-controller@2d {
|
|
|
|
|
reg = <0x2d>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
tpic2810: gpio@60 {
|
|
|
|
|
compatible = "ti,tpic2810";
|
|
|
|
|
reg = <0x60>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
};
|
2016-05-19 14:47:30 +08:00
|
|
|
|
|
|
|
|
pca9536: gpio@41 {
|
|
|
|
|
compatible = "ti,pca9536";
|
|
|
|
|
reg = <0x41>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
};
|
2016-03-23 11:34:13 +08:00
|
|
|
};
|
|
|
|
|
|
2016-10-07 22:44:22 +08:00
|
|
|
&spi0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&spi0_pins_default>;
|
|
|
|
|
|
|
|
|
|
sn65hvs882@1 {
|
|
|
|
|
compatible = "pisosr-gpio";
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
|
|
load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
|
|
|
|
|
|
|
|
|
|
reg = <1>;
|
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
|
spi-cpol;
|
|
|
|
|
};
|
2017-03-08 05:57:51 +08:00
|
|
|
|
|
|
|
|
spi_nor: flash@0 {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
compatible = "winbond,w25q64", "jedec,spi-nor";
|
|
|
|
|
spi-max-frequency = <80000000>;
|
|
|
|
|
m25p,fast-read;
|
|
|
|
|
reg = <0>;
|
|
|
|
|
|
|
|
|
|
partition@0 {
|
|
|
|
|
label = "u-boot-spl";
|
|
|
|
|
reg = <0x0 0x80000>;
|
|
|
|
|
read-only;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
partition@1 {
|
|
|
|
|
label = "u-boot";
|
|
|
|
|
reg = <0x80000 0x100000>;
|
|
|
|
|
read-only;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
partition@2 {
|
|
|
|
|
label = "u-boot-env";
|
|
|
|
|
reg = <0x180000 0x20000>;
|
|
|
|
|
read-only;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
partition@3 {
|
|
|
|
|
label = "misc";
|
|
|
|
|
reg = <0x1A0000 0x660000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2016-10-07 22:44:22 +08:00
|
|
|
};
|
|
|
|
|
|
2016-10-07 22:44:24 +08:00
|
|
|
&tscadc {
|
|
|
|
|
status = "okay";
|
|
|
|
|
adc {
|
|
|
|
|
ti,adc-channels = <1 2 3 4 5 6 7>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2016-03-23 11:34:13 +08:00
|
|
|
#include "tps65910.dtsi"
|
|
|
|
|
|
|
|
|
|
&tps {
|
|
|
|
|
vcc1-supply = <&vbat>;
|
|
|
|
|
vcc2-supply = <&vbat>;
|
|
|
|
|
vcc3-supply = <&vbat>;
|
|
|
|
|
vcc4-supply = <&vbat>;
|
|
|
|
|
vcc5-supply = <&vbat>;
|
|
|
|
|
vcc6-supply = <&vbat>;
|
|
|
|
|
vcc7-supply = <&vbat>;
|
|
|
|
|
vccio-supply = <&vbat>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
vrtc_reg: regulator@0 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vio_reg: regulator@1 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd1_reg: regulator@2 {
|
|
|
|
|
regulator-name = "vdd_mpu";
|
|
|
|
|
regulator-min-microvolt = <912500>;
|
|
|
|
|
regulator-max-microvolt = <1326000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd2_reg: regulator@3 {
|
|
|
|
|
regulator-name = "vdd_core";
|
|
|
|
|
regulator-min-microvolt = <912500>;
|
|
|
|
|
regulator-max-microvolt = <1144000>;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd3_reg: regulator@4 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdig1_reg: regulator@5 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdig2_reg: regulator@6 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vpll_reg: regulator@7 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdac_reg: regulator@8 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux1_reg: regulator@9 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux2_reg: regulator@10 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vaux33_reg: regulator@11 {
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vmmc_reg: regulator@12 {
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mmc1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
vmmc-supply = <&vmmc_reg>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&mmc0_pins_default>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&gpio0 {
|
|
|
|
|
/* Do not idle the GPIO used for holding the VTT regulator */
|
|
|
|
|
ti,no-reset-on-init;
|
|
|
|
|
ti,no-idle-on-init;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart3 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&uart3_pins_default>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
2017-03-14 20:50:21 +08:00
|
|
|
|
|
|
|
|
&gpio3 {
|
|
|
|
|
p4 {
|
|
|
|
|
gpio-hog;
|
|
|
|
|
gpios = <4 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
output-high;
|
|
|
|
|
line-name = "PR1_MII_CTRL";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
p10 {
|
|
|
|
|
gpio-hog;
|
|
|
|
|
gpios = <10 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
|
|
|
|
|
output-high;
|
|
|
|
|
line-name = "MUX_MII_CTL1";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&cpsw_emac0 {
|
|
|
|
|
phy-handle = <ðphy0>;
|
|
|
|
|
phy-mode = "rmii";
|
|
|
|
|
dual_emac_res_vlan = <1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&cpsw_emac1 {
|
|
|
|
|
phy-handle = <ðphy1>;
|
|
|
|
|
phy-mode = "rmii";
|
|
|
|
|
dual_emac_res_vlan = <2>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mac {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&cpsw_default>;
|
|
|
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
dual_emac;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&phy_sel {
|
|
|
|
|
rmii-clock-ext;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&davinci_mdio {
|
|
|
|
|
pinctrl-names = "default", "sleep";
|
|
|
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
|
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
|
|
|
|
|
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
|
|
|
|
|
|
|
|
|
|
ethphy0: ethernet-phy@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ethphy1: ethernet-phy@3 {
|
|
|
|
|
reg = <3>;
|
|
|
|
|
};
|
|
|
|
|
};
|
