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linux/drivers/net/ethernet/sfc/ef100_nic.h

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sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
/* SPDX-License-Identifier: GPL-2.0-only */
/****************************************************************************
* Driver for Solarflare network controllers and boards
* Copyright 2018 Solarflare Communications Inc.
* Copyright 2019-2020 Xilinx Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation, incorporated herein by reference.
*/
#include "net_driver.h"
#include "nic_common.h"
extern const struct efx_nic_type ef100_pf_nic_type;
sfc_ef100: add nic-type for VFs, and bind to them We don't yet have a .sriov_configure() to create them, though. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:40:01 +08:00
extern const struct efx_nic_type ef100_vf_nic_type;
sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
int ef100_probe_pf(struct efx_nic *efx);
sfc_ef100: add nic-type for VFs, and bind to them We don't yet have a .sriov_configure() to create them, though. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:40:01 +08:00
int ef100_probe_vf(struct efx_nic *efx);
sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
void ef100_remove(struct efx_nic *efx);
sfc_ef100: statistics gathering MAC stats work much the same as on EF10, with a periodic DMA to a region specified via an MCDI. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:37:20 +08:00
enum {
EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
EF100_STAT_port_tx_packets,
EF100_STAT_port_tx_pause,
EF100_STAT_port_tx_unicast,
EF100_STAT_port_tx_multicast,
EF100_STAT_port_tx_broadcast,
EF100_STAT_port_tx_lt64,
EF100_STAT_port_tx_64,
EF100_STAT_port_tx_65_to_127,
EF100_STAT_port_tx_128_to_255,
EF100_STAT_port_tx_256_to_511,
EF100_STAT_port_tx_512_to_1023,
EF100_STAT_port_tx_1024_to_15xx,
EF100_STAT_port_tx_15xx_to_jumbo,
EF100_STAT_port_rx_bytes,
EF100_STAT_port_rx_packets,
EF100_STAT_port_rx_good,
EF100_STAT_port_rx_bad,
EF100_STAT_port_rx_pause,
EF100_STAT_port_rx_unicast,
EF100_STAT_port_rx_multicast,
EF100_STAT_port_rx_broadcast,
EF100_STAT_port_rx_lt64,
EF100_STAT_port_rx_64,
EF100_STAT_port_rx_65_to_127,
EF100_STAT_port_rx_128_to_255,
EF100_STAT_port_rx_256_to_511,
EF100_STAT_port_rx_512_to_1023,
EF100_STAT_port_rx_1024_to_15xx,
EF100_STAT_port_rx_15xx_to_jumbo,
EF100_STAT_port_rx_gtjumbo,
EF100_STAT_port_rx_bad_gtjumbo,
EF100_STAT_port_rx_align_error,
EF100_STAT_port_rx_length_error,
EF100_STAT_port_rx_overflow,
EF100_STAT_port_rx_nodesc_drops,
EF100_STAT_COUNT
};
sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
struct ef100_nic_data {
struct efx_nic *efx;
sfc_ef100: implement MCDI transport Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:57:09 +08:00
struct efx_buffer mcdi_buf;
sfc_ef100: read datapath caps, implement check_caps Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:58:26 +08:00
u32 datapath_caps;
u32 datapath_caps2;
sfc_ef100: extend ef100_check_caps to cover datapath_caps3 MC_CMD_GET_CAPABILITIES now has a third word of flags; extend the efx_has_cap() machinery to cover it. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:59:18 +08:00
u32 datapath_caps3;
sfc_ef100: read pf_index at probe time We'll need it later, for VF representors. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:38:49 +08:00
unsigned int pf_index;
sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
u16 warm_boot_count;
sfc_ef100: read device MAC address at probe time Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 20:05:31 +08:00
u8 port_id[ETH_ALEN];
sfc_ef100: implement ndo_open/close and EVQ probing Channels are probed, but actual event handling is still stubbed out. Stub implementation of check_caps is needed because ptp.c will call into it from efx_ptp_use_mac_tx_timestamps() to decide if it wants TXQs. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:57:34 +08:00
DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
sfc_ef100: statistics gathering MAC stats work much the same as on EF10, with a periodic DMA to a region specified via an MCDI. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:37:20 +08:00
u64 stats[EF100_STAT_COUNT];
sfc_ef100: read Design Parameters at probe time Several parts of the EF100 architecture are parameterised (to allow varying capabilities on FPGAs according to resource constraints), and these parameters are exposed to the driver through a TLV-encoded region of the BAR. For the most part we either don't care about these values at all or just need to sanity-check them against the driver's assumptions, but there are a number of TSO limits which we record so that we will be able to check against them in the TX path when handling GSO skbs. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-04 04:33:20 +08:00
u16 tso_max_hdr_len;
u16 tso_max_payload_num_segs;
u16 tso_max_frames;
unsigned int tso_max_payload_len;
sfc: skeleton EF100 PF driver No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-27 19:55:55 +08:00
};
#define efx_ef100_has_cap(caps, flag) \
(!!((caps) & BIT_ULL(MC_CMD_GET_CAPABILITIES_V4_OUT_ ## flag ## _LBN)))