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linux/drivers/usb/dwc2/platform.c

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USB: add SPDX identifiers to all remaining files in drivers/usb/ It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Update the drivers/usb/ and include/linux/usb* files with the correct SPDX license identifier based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com> Acked-by: Johan Hovold <johan@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-03 18:28:30 +08:00
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
/*
* platform.c - DesignWare HS OTG Controller platform driver
*
* Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The names of the above-listed copyright holders may not be used
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
#include <linux/clk.h>
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
#include <linux/device.h>
#include <linux/dma-mapping.h>
staging: dwc2: set up all module params The DWC2 USB controller in the BCM2835 (Raspberry Pi) needs some non- default parameters. Select these based on the compatible value from the DT node. For all other HW, fall back to the default parameters currently in use. The values in params_bcm2835[] were posted to the mailing list by Paul quite some time ago. I made a couple of minor modifications since then; to set ahbcfg instead of ahb_single, and to set uframe_sched. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-11-27 09:58:01 +08:00
#include <linux/of_device.h>
usb: dwc2: gadget: add mutex to serialize init/deinit calls This patch adds mutex, which protects initialization and deinitialization procedures against suspend/resume methods. This mutex will be needed by the updated suspend/resume calls, which tracks gadget state. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-21 22:14:48 +08:00
#include <linux/mutex.h>
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
#include <linux/platform_device.h>
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
#include <linux/phy/phy.h>
#include <linux/platform_data/s3c-hsotg.h>
usb: dwc2: Add reset control to dwc2 Allow for platforms that have a reset controller driver in place to bring the USB IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-10 21:53:34 +08:00
#include <linux/reset.h>
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
usb: dwc2: add 'mode' which based on Kconfig select or dts setting According to the "dr_mode", the otg controller can work as device role and host role. Some boards always want to use host mode and some other boards want to use gadget mode. We use the dts setting to set dwc2's mode, rather than fixing it to whatever hardware says. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-08-06 09:01:50 +08:00
#include <linux/usb/of.h>
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
#include "core.h"
#include "hcd.h"
usb: dwc2: move debugfs code to a separate file Prepare to add more debug code. Moreover, don't save dentry * for each file in struct dwc2_hsotg as clean up is done with debugfs_remove_recursive(). s3c_hsotg_delete_debug() is removed altogether for the same reason. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-04-30 04:08:59 +08:00
#include "debug.h"
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
static const char dwc2_driver_name[] = "dwc2";
usb: dwc2: Fix dr_mode validation The dr_mode parameter was being checked against how the dwc2 module was being configured at compile time. But it wasn't checked against the hardware capabilities, nor were the hardware capabilities checked against the compilation parameters. This commit adds those checks and adjusts dr_mode to an appropriate value, if needed. If the hardware capabilities and module compilation do not match then we fail as it wouldn't be possible to run properly. The hardware, module, and dr_mode, can each be set to host, device, or otg. Check that all these values are compatible and adjust the value of dr_mode if possible. The following table summarizes the behavior: actual HW MOD dr_mode dr_mode ------------------------------ HST HST any : HST HST DEV any : --- HST OTG any : HST DEV HST any : --- DEV DEV any : DEV DEV OTG any : DEV OTG HST any : HST OTG DEV any : DEV OTG OTG any : dr_mode Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:16:31 +08:00
/*
* Check the dr_mode against the module configuration and hardware
* capabilities.
*
* The hardware, module, and dr_mode, can each be set to host, device,
* or otg. Check that all these values are compatible and adjust the
* value of dr_mode if possible.
*
* actual
* HW MOD dr_mode dr_mode
* ------------------------------
* HST HST any : HST
* HST DEV any : ---
* HST OTG any : HST
*
* DEV HST any : ---
* DEV DEV any : DEV
* DEV OTG any : DEV
*
* OTG HST any : HST
* OTG DEV any : DEV
* OTG OTG any : dr_mode
*/
static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
{
enum usb_dr_mode mode;
hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
hsotg->dr_mode = USB_DR_MODE_OTG;
mode = hsotg->dr_mode;
if (dwc2_hw_is_device(hsotg)) {
if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
dev_err(hsotg->dev,
"Controller does not support host mode.\n");
return -EINVAL;
}
mode = USB_DR_MODE_PERIPHERAL;
} else if (dwc2_hw_is_host(hsotg)) {
if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
dev_err(hsotg->dev,
"Controller does not support device mode.\n");
return -EINVAL;
}
mode = USB_DR_MODE_HOST;
} else {
if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
mode = USB_DR_MODE_HOST;
else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
mode = USB_DR_MODE_PERIPHERAL;
}
if (mode != hsotg->dr_mode) {
dev_warn(hsotg->dev,
usb: dwc2: Cleanup some checkpatch issues This commmit is the result of running checkpatch --fix. The results were verified for correctness. Some of the fixes result in line over 80 char which we will fix manually later. The following is a summary of what was done by checkpatch: * Remove externs on function prototypes. * Replace symbolic permissions with octal. * Align code to open parens. * Replace 'unsigned' with 'unsigned int'. * Remove unneccessary blank lines. * Add blank lines after declarations. * Add spaces around operators. * Remove unnecessary spaces after casts. * Replace 'x == NULL' with '!x'. * Replace kzalloc() with kcalloc(). * Concatenate multi-line strings. * Use the BIT() macro. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:30:27 +08:00
"Configuration mismatch. dr_mode forced to %s\n",
usb: dwc2: Fix dr_mode validation The dr_mode parameter was being checked against how the dwc2 module was being configured at compile time. But it wasn't checked against the hardware capabilities, nor were the hardware capabilities checked against the compilation parameters. This commit adds those checks and adjusts dr_mode to an appropriate value, if needed. If the hardware capabilities and module compilation do not match then we fail as it wouldn't be possible to run properly. The hardware, module, and dr_mode, can each be set to host, device, or otg. Check that all these values are compatible and adjust the value of dr_mode if possible. The following table summarizes the behavior: actual HW MOD dr_mode dr_mode ------------------------------ HST HST any : HST HST DEV any : --- HST OTG any : HST DEV HST any : --- DEV DEV any : DEV DEV OTG any : DEV OTG HST any : HST OTG DEV any : DEV OTG OTG any : dr_mode Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:16:31 +08:00
mode == USB_DR_MODE_HOST ? "host" : "device");
hsotg->dr_mode = mode;
}
return 0;
}
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
struct platform_device *pdev = to_platform_device(hsotg->dev);
int ret;
ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
hsotg->supplies);
if (ret)
return ret;
usb: dwc2: make otg clk optional Fixes commit 09a75e857790 ("usb: dwc2: refactor common low-level hw code to platform.c") The above commit consolidated the low-level phy access into a common location. This change made the otg clk a requirement and broke some platforms when it was moved into platform.c. So make clk handling optional again. Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Fixes: 09a75e857790 ("usb: dwc2: refactor common low-level hw code to platform.c") Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-14 01:02:12 +08:00
if (hsotg->clk) {
ret = clk_prepare_enable(hsotg->clk);
if (ret)
return ret;
}
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
if (hsotg->uphy) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = usb_phy_init(hsotg->uphy);
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
} else if (hsotg->plat && hsotg->plat->phy_init) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
} else {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = phy_power_on(hsotg->phy);
if (ret == 0)
ret = phy_init(hsotg->phy);
}
return ret;
}
/**
* dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
* @hsotg: The driver state
*
* A wrapper for platform code responsible for controlling
* low-level USB platform resources (phy, clock, regulators)
*/
int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
int ret = __dwc2_lowlevel_hw_enable(hsotg);
if (ret == 0)
hsotg->ll_hw_enabled = true;
return ret;
}
static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
struct platform_device *pdev = to_platform_device(hsotg->dev);
int ret = 0;
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
if (hsotg->uphy) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
usb_phy_shutdown(hsotg->uphy);
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
} else if (hsotg->plat && hsotg->plat->phy_exit) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
usb: dwc2: Fix brace usage * Remove braces for one-line statements * Add missing braces where another arm in if-statement uses braces Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-18 12:31:43 +08:00
} else {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = phy_exit(hsotg->phy);
if (ret == 0)
ret = phy_power_off(hsotg->phy);
}
if (ret)
return ret;
usb: dwc2: make otg clk optional Fixes commit 09a75e857790 ("usb: dwc2: refactor common low-level hw code to platform.c") The above commit consolidated the low-level phy access into a common location. This change made the otg clk a requirement and broke some platforms when it was moved into platform.c. So make clk handling optional again. Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Fixes: 09a75e857790 ("usb: dwc2: refactor common low-level hw code to platform.c") Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-14 01:02:12 +08:00
if (hsotg->clk)
clk_disable_unprepare(hsotg->clk);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
hsotg->supplies);
return ret;
}
/**
* dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
* @hsotg: The driver state
*
* A wrapper for platform code responsible for controlling
* low-level USB platform resources (phy, clock, regulators)
*/
int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
int ret = __dwc2_lowlevel_hw_disable(hsotg);
if (ret == 0)
hsotg->ll_hw_enabled = false;
return ret;
}
static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
{
int i, ret;
usb: dwc2: Add reset control to dwc2 Allow for platforms that have a reset controller driver in place to bring the USB IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-10 21:53:34 +08:00
hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
if (IS_ERR(hsotg->reset)) {
ret = PTR_ERR(hsotg->reset);
usb: dwc2: simplify optional reset handling As of commit bb475230b8e5 ("reset: make optional functions really optional"), the reset framework API calls use NULL pointers to describe optional, non-present reset controls. This allows to return errors from devm_reset_control_get_optional and to call reset_control_(de)assert unconditionally. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-03-15 19:31:53 +08:00
dev_err(hsotg->dev, "error getting reset control %d\n", ret);
return ret;
usb: dwc2: Add reset control to dwc2 Allow for platforms that have a reset controller driver in place to bring the USB IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-10 21:53:34 +08:00
}
usb: dwc2: simplify optional reset handling As of commit bb475230b8e5 ("reset: make optional functions really optional"), the reset framework API calls use NULL pointers to describe optional, non-present reset controls. This allows to return errors from devm_reset_control_get_optional and to call reset_control_(de)assert unconditionally. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-03-15 19:31:53 +08:00
reset_control_deassert(hsotg->reset);
usb: dwc2: Add reset control to dwc2 Allow for platforms that have a reset controller driver in place to bring the USB IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-10 21:53:34 +08:00
usb: dwc2: add optional usb ecc reset bit The dwc2 USB controller in Stratix10 has an additional ECC reset bit that needs to get de-asserted in order for the controller to work properly. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-11-01 23:34:53 +08:00
hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc");
if (IS_ERR(hsotg->reset_ecc)) {
ret = PTR_ERR(hsotg->reset_ecc);
dev_err(hsotg->dev, "error getting reset control for ecc %d\n", ret);
return ret;
}
reset_control_deassert(hsotg->reset_ecc);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
/*
* Attempt to find a generic PHY, then look for an old style
* USB PHY and then fall back to pdata
*/
hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
if (IS_ERR(hsotg->phy)) {
usb: dwc2: Return errors from PHY When searching for PHYs, any error was treated as if the PHY did not exist or was not specified. Thus the probe function did not correctly return error conditions such as -EPROBE_DEFER. Fixed so that only a non-existing PHY is ignored and any other error is returned. Acked-by: Eric Anholt <eric@anholt.net> Reported-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-14 01:02:11 +08:00
ret = PTR_ERR(hsotg->phy);
switch (ret) {
case -ENODEV:
case -ENOSYS:
hsotg->phy = NULL;
break;
case -EPROBE_DEFER:
return ret;
default:
dev_err(hsotg->dev, "error getting phy %d\n", ret);
return ret;
}
}
if (!hsotg->phy) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
usb: dwc2: Return errors from PHY When searching for PHYs, any error was treated as if the PHY did not exist or was not specified. Thus the probe function did not correctly return error conditions such as -EPROBE_DEFER. Fixed so that only a non-existing PHY is ignored and any other error is returned. Acked-by: Eric Anholt <eric@anholt.net> Reported-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-14 01:02:11 +08:00
if (IS_ERR(hsotg->uphy)) {
ret = PTR_ERR(hsotg->uphy);
switch (ret) {
case -ENODEV:
case -ENXIO:
hsotg->uphy = NULL;
break;
case -EPROBE_DEFER:
return ret;
default:
dev_err(hsotg->dev, "error getting usb phy %d\n",
ret);
return ret;
}
}
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
}
usb: dwc2: Return errors from PHY When searching for PHYs, any error was treated as if the PHY did not exist or was not specified. Thus the probe function did not correctly return error conditions such as -EPROBE_DEFER. Fixed so that only a non-existing PHY is ignored and any other error is returned. Acked-by: Eric Anholt <eric@anholt.net> Reported-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-14 01:02:11 +08:00
hsotg->plat = dev_get_platdata(hsotg->dev);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
/* Clock */
usb: dwc2: get optional clock by devm_clk_get_optional() When the driver tries to get optional clock, it ignores all errors, but if only ignores -ENOENT, it will cover some real errors, such as -EPROBE_DEFER, so use devm_clk_get_optional() to get optional clock. Cc: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-04-17 16:28:19 +08:00
hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
if (IS_ERR(hsotg->clk)) {
usb: dwc2: get optional clock by devm_clk_get_optional() When the driver tries to get optional clock, it ignores all errors, but if only ignores -ENOENT, it will cover some real errors, such as -EPROBE_DEFER, so use devm_clk_get_optional() to get optional clock. Cc: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-04-17 16:28:19 +08:00
dev_err(hsotg->dev, "cannot get otg clock\n");
return PTR_ERR(hsotg->clk);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
}
/* Regulators */
for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
hsotg->supplies);
if (ret) {
usb: dwc2: Silence warning about supplies during deferred probe Don't confuse user with meaningless warning about the failure in getting supplies in case of deferred probe. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-02-28 17:25:57 +08:00
if (ret != -EPROBE_DEFER)
dev_err(hsotg->dev, "failed to request supplies: %d\n",
ret);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
return ret;
}
return 0;
}
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
/**
* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
* DWC_otg driver
*
* @dev: Platform device
*
* This routine is called, for example, when the rmmod command is executed. The
* device may or may not be electrically present. If it is present, the driver
* stops device processing. Any resources used on behalf of this device are
* freed.
*/
static int dwc2_driver_remove(struct platform_device *dev)
{
struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
usb: dwc2: move debugfs code to a separate file Prepare to add more debug code. Moreover, don't save dentry * for each file in struct dwc2_hsotg as clean up is done with debugfs_remove_recursive(). s3c_hsotg_delete_debug() is removed altogether for the same reason. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-04-30 04:08:59 +08:00
dwc2_debugfs_exit(hsotg);
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
if (hsotg->hcd_enabled)
dwc2_hcd_remove(hsotg);
if (hsotg->gadget_enabled)
usb: dwc2: rename all s3c_* to dwc2_* this driver has long ago became dwc2.ko with both peripheral and host roles, there's no point in keeping the old function names. Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-08-07 07:11:54 +08:00
dwc2_hsotg_remove(hsotg);
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
if (hsotg->params.activate_stm_id_vb_detection)
regulator_disable(hsotg->usb33d);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
if (hsotg->ll_hw_enabled)
dwc2_lowlevel_hw_disable(hsotg);
usb: dwc2: simplify optional reset handling As of commit bb475230b8e5 ("reset: make optional functions really optional"), the reset framework API calls use NULL pointers to describe optional, non-present reset controls. This allows to return errors from devm_reset_control_get_optional and to call reset_control_(de)assert unconditionally. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-03-15 19:31:53 +08:00
reset_control_assert(hsotg->reset);
usb: dwc2: add optional usb ecc reset bit The dwc2 USB controller in Stratix10 has an additional ECC reset bit that needs to get de-asserted in order for the controller to work properly. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-11-01 23:34:53 +08:00
reset_control_assert(hsotg->reset_ecc);
usb: dwc2: Add reset control to dwc2 Allow for platforms that have a reset controller driver in place to bring the USB IP out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-10 21:53:34 +08:00
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
return 0;
}
usb: dwc2: add shutdown callback to platform variant In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-19 02:30:59 +08:00
/**
* dwc2_driver_shutdown() - Called on device shutdown
*
* @dev: Platform device
*
* In specific conditions (involving usb hubs) dwc2 devices can create a
* lot of interrupts, even to the point of overwhelming devices running
* at low frequencies. Some devices need to do special clock handling
* at shutdown-time which may bring the system clock below the threshold
* of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
* prevents reboots/poweroffs from getting stuck in such cases.
*/
static void dwc2_driver_shutdown(struct platform_device *dev)
{
struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
disable_irq(hsotg->irq);
}
usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic. Declared dwc2_check_core_endianness() function for dynamicly check core endianness. Added needs_byte_swap flag to hsotg structure, and depending on flag swap value inside dwc2_readl/writel functions. Signed-off-by: Gevorg Sahakyan <sahakyan@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-07-27 16:26:29 +08:00
/**
* dwc2_check_core_endianness() - Returns true if core and AHB have
* opposite endianness.
* @hsotg: Programming view of the DWC_otg controller.
*/
static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg)
{
u32 snpsid;
snpsid = ioread32(hsotg->regs + GSNPSID);
if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID ||
(snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID ||
(snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID)
return false;
return true;
}
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
/**
* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
* driver
*
* @dev: Platform device
*
* This routine creates the driver components required to control the device
* (core, HCD, and PCD) and initializes the device. The driver components are
* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
* in the device private data. This allows the driver to access the dwc2_hsotg
* structure on subsequent calls to driver methods for this device.
*/
static int dwc2_driver_probe(struct platform_device *dev)
{
struct dwc2_hsotg *hsotg;
struct resource *res;
int retval;
hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
if (!hsotg)
return -ENOMEM;
hsotg->dev = &dev->dev;
staging: dwc2: Fix dma-enabled platform devices using a default dma_mask Platform devices added through OF usually do not have any dma_mask pointer set. If the hardware advertises DMA support, the driver will expect DMA buffers to be passed in, but the USB core will not do this due to lack of a dma mask, breaking all connectiviy. To fix this, set a default dma_mask by pointing it at the coherent_dma_mask and set their value to a 32 bit mask. This still allows any platform code to set any more specific mask if needed, but makes the driver work for most dma-enabled hardware. It would be great if this patch could be included in 3.10, since it is needed to make the dwc2 driver work on the ralink rt3052 target. Before, the plan was to set up the dma mask in MIPS platform code, but because of a similar change in ehci and the uglyness of the code for that, the plan for that infrastructure was dropped. This patch makes the setting of the dma_mask happen in the same way as the patch Stephen Warren (set device dma_mask without reference to global data). Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-05-17 16:52:55 +08:00
/*
* Use reasonable defaults so platforms don't have to provide these.
*/
if (!dev->dev.dma_mask)
dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
DMA-API: staging: use dma_set_coherent_mask() The correct way for a driver to specify the coherent DMA mask is not to directly access the field in the struct device, but to use dma_set_coherent_mask(). Only arch and bus code should access this member directly. Convert all direct write accesses to using the correct API. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-10 23:56:16 +08:00
retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
usb: dwc2: Print error if unable to set DMA coherent mask We better print an error in case probing of dwc2 fails on setting the DMA coherent mask. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-02-13 04:20:08 +08:00
if (retval) {
dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval);
DMA-API: staging: use dma_set_coherent_mask() The correct way for a driver to specify the coherent DMA mask is not to directly access the field in the struct device, but to use dma_set_coherent_mask(). Only arch and bus code should access this member directly. Convert all direct write accesses to using the correct API. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-10 23:56:16 +08:00
return retval;
usb: dwc2: Print error if unable to set DMA coherent mask We better print an error in case probing of dwc2 fails on setting the DMA coherent mask. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-02-13 04:20:08 +08:00
}
staging: dwc2: Fix dma-enabled platform devices using a default dma_mask Platform devices added through OF usually do not have any dma_mask pointer set. If the hardware advertises DMA support, the driver will expect DMA buffers to be passed in, but the USB core will not do this due to lack of a dma mask, breaking all connectiviy. To fix this, set a default dma_mask by pointing it at the coherent_dma_mask and set their value to a 32 bit mask. This still allows any platform code to set any more specific mask if needed, but makes the driver work for most dma-enabled hardware. It would be great if this patch could be included in 3.10, since it is needed to make the dwc2 driver work on the ralink rt3052 target. Before, the plan was to set up the dma mask in MIPS platform code, but because of a similar change in ehci and the uglyness of the code for that, the plan for that infrastructure was dropped. This patch makes the setting of the dma_mask happen in the same way as the patch Stephen Warren (set device dma_mask without reference to global data). Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-05-17 16:52:55 +08:00
usb: dwc2: convert to devm_platform_get_and_ioremap_resource Use devm_platform_get_and_ioremap_resource() to simplify code, which contains platform_get_resource() and devm_ioremap_resource(), it also get the resource for use by the following code. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Link: https://lore.kernel.org/r/20200323160612.17277-5-zhengdejin5@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-24 00:06:11 +08:00
hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res);
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
if (IS_ERR(hsotg->regs))
return PTR_ERR(hsotg->regs);
dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
(unsigned long)res->start, hsotg->regs);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
retval = dwc2_lowlevel_hw_init(hsotg);
usb: dwc2: set parameter values in probe function So the parameters can be used in both host and gadget modes. Also consolidate param functions in the core.h Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-04-30 04:09:05 +08:00
if (retval)
return retval;
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
spin_lock_init(&hsotg->lock);
usb: dwc2: add shutdown callback to platform variant In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-19 02:30:59 +08:00
hsotg->irq = platform_get_irq(dev, 0);
usb: Remove dev_err() usage after platform_get_irq() We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-47-swboyd@chromium.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-31 02:15:46 +08:00
if (hsotg->irq < 0)
usb: dwc2: add shutdown callback to platform variant In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-19 02:30:59 +08:00
return hsotg->irq;
usb: dwc2: fix kernel oops during driver probe This patch make sure that all necessary members of dwc2_hsotg are initialized before the irq handler is requested. So the kernel oops triggered by dwc2_handle_common_intr has been fixed. dwc2 20980000.usb: Configuration mismatch. Forcing host mode dwc2 20980000.usb: no platform data or transceiver defined Unable to handle kernel paging request at virtual address cc860040 pgd = c0004000 [cc860040] *pgd=0b41e811, *pte=00000000, *ppte=00000000 Internal error: Oops: 7 [#1] ARM CPU: 0 PID: 1 Comm: swapper Not tainted 4.3.0-rc3+ #19 Hardware name: BCM2835 task: cb494000 ti: cb4d0000 task.ti: cb4d0000 PC is at dwc2_is_controller_alive+0x18/0x34 LR is at dwc2_handle_common_intr+0x24/0xb60 Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-13 05:08:34 +08:00
dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
usb: dwc2: add shutdown callback to platform variant In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-19 02:30:59 +08:00
hsotg->irq);
retval = devm_request_irq(hsotg->dev, hsotg->irq,
usb: dwc2: fix kernel oops during driver probe This patch make sure that all necessary members of dwc2_hsotg are initialized before the irq handler is requested. So the kernel oops triggered by dwc2_handle_common_intr has been fixed. dwc2 20980000.usb: Configuration mismatch. Forcing host mode dwc2 20980000.usb: no platform data or transceiver defined Unable to handle kernel paging request at virtual address cc860040 pgd = c0004000 [cc860040] *pgd=0b41e811, *pte=00000000, *ppte=00000000 Internal error: Oops: 7 [#1] ARM CPU: 0 PID: 1 Comm: swapper Not tainted 4.3.0-rc3+ #19 Hardware name: BCM2835 task: cb494000 ti: cb4d0000 task.ti: cb4d0000 PC is at dwc2_is_controller_alive+0x18/0x34 LR is at dwc2_handle_common_intr+0x24/0xb60 Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-13 05:08:34 +08:00
dwc2_handle_common_intr, IRQF_SHARED,
dev_name(hsotg->dev), hsotg);
if (retval)
return retval;
usb: dwc2: get optional vbus-supply regulator once Move devm_regulator_get_optional() call to probe routine. This avoids 'vbus-supply' regulator to be requested lots of times, upon each call to dwc2_vbus_supply_init(), e.g. like with runtime pm. Fixes: 531ef5ebea96 ("usb: dwc2: add support for host mode external vbus supply") Tested-by: Artur Petrosyan <arturp@synopsys.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-09-05 19:40:02 +08:00
hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
if (IS_ERR(hsotg->vbus_supply)) {
retval = PTR_ERR(hsotg->vbus_supply);
hsotg->vbus_supply = NULL;
if (retval != -ENODEV)
return retval;
}
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
retval = dwc2_lowlevel_hw_enable(hsotg);
if (retval)
return retval;
usb: dwc2: Fix call location of dwc2_check_core_endianness Some SoC/IP as STM32F469, the snpsid can only be read after clock is enabled, otherwise it will read as 0, and the dwc2_check_core_endianness will assume the core and AHB have opposite endianness, leading to the following error: [ 1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator [ 1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0 [ 1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator [ 2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE [ 2.015176] dwc2: probe of 50000000.usb failed with error -16 The proposed patch changes the location where dwc2_check_core_endianness is called, allowing the clock peripheral to be enabled first. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Bruno Meirelles Herrera <bmh@certi.org.br> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-08-28 05:36:38 +08:00
hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
usb: dwc2: Fix dr_mode validation The dr_mode parameter was being checked against how the dwc2 module was being configured at compile time. But it wasn't checked against the hardware capabilities, nor were the hardware capabilities checked against the compilation parameters. This commit adds those checks and adjusts dr_mode to an appropriate value, if needed. If the hardware capabilities and module compilation do not match then we fail as it wouldn't be possible to run properly. The hardware, module, and dr_mode, can each be set to host, device, or otg. Check that all these values are compatible and adjust the value of dr_mode if possible. The following table summarizes the behavior: actual HW MOD dr_mode dr_mode ------------------------------ HST HST any : HST HST DEV any : --- HST OTG any : HST DEV HST any : --- DEV DEV any : DEV DEV OTG any : DEV OTG HST any : HST OTG DEV any : DEV OTG OTG any : dr_mode Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:16:31 +08:00
retval = dwc2_get_dr_mode(hsotg);
if (retval)
usb: dwc2: Proper cleanup on dr_mode failure Cleanup in probe if we fail to get dr_mode. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-04-28 11:20:56 +08:00
goto error;
usb: dwc2: Fix dr_mode validation The dr_mode parameter was being checked against how the dwc2 module was being configured at compile time. But it wasn't checked against the hardware capabilities, nor were the hardware capabilities checked against the compilation parameters. This commit adds those checks and adjusts dr_mode to an appropriate value, if needed. If the hardware capabilities and module compilation do not match then we fail as it wouldn't be possible to run properly. The hardware, module, and dr_mode, can each be set to host, device, or otg. Check that all these values are compatible and adjust the value of dr_mode if possible. The following table summarizes the behavior: actual HW MOD dr_mode dr_mode ------------------------------ HST HST any : HST HST DEV any : --- HST OTG any : HST DEV HST any : --- DEV DEV any : DEV DEV OTG any : DEV OTG HST any : HST OTG DEV any : DEV OTG OTG any : dr_mode Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:16:31 +08:00
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
hsotg->need_phy_for_wake =
of_property_read_bool(dev->dev.of_node,
"snps,need-phy-for-wake");
Revert "usb: dwc2: Move reset into dwc2_get_hwparams()" This reverts commit 263b7fb557f7 ("usb: dwc2: Move reset into dwc2_get_hwparams()") due to regression found on bcm2835 platform. USB ethernet fails, due to being unable to pick up proper parameters when performing a plain reset before reading hw params. Below shows the results of the gnptxfsiz and hptxfsiz with and before and after reverting this (from Stefan Wahren): So here is the probe result before Patch 1 is applied: [ 1.283148] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.313894] dwc2 20980000.usb: gnptxfsiz=00201000 [ 1.314104] dwc2 20980000.usb: hptxfsiz=00000000 [ 1.353908] dwc2 20980000.usb: 256 invalid for host_nperio_tx_fifo_size. Check HW configuration. [ 1.354262] dwc2 20980000.usb: 512 invalid for host_perio_tx_fifo_size. Check HW configuration. [ 1.394249] dwc2 20980000.usb: DWC OTG Controller [ 1.394561] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.394917] dwc2 20980000.usb: irq 33, io mem 0x00000000 And here is the probe result after Patch 1 is applied: [ 1.280107] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.353949] dwc2 20980000.usb: gnptxfsiz=01001000 [ 1.354166] dwc2 20980000.usb: hptxfsiz=02002000 [ 1.434301] dwc2 20980000.usb: DWC OTG Controller [ 1.434616] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.434973] dwc2 20980000.usb: irq 33, io mem 0x00000000 Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: John Youn <johnyoun@synopsys.com> Reported-by: Stefan Wahren <stefan.wahren@i2se.com> Reported-by: Remi Pommarel <repk@triplefau.lt> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2016-01-12 08:32:14 +08:00
/*
* Reset before dwc2_get_hwparams() then it could get power-on real
* reset value form registers.
*/
usb: dwc2: Force mode optimizations If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during driver probe to get the host and device specific HW parameters. Then we clear the force mode bits so that the core operates in OTG mode. The force mode bits should not be touched at any other time during the driver lifetime and they should be preserved whenever the GUSBCFG register is written to. The force mode bit values will persist across soft resets of the core. If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the force mode is set just once at probe to configure the core as either a host or peripheral. Given the above, we no longer need any other reset delays, force delays, or any forced modes anywhere else in the driver. So replace all calls to dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove all other unnecessary delays. Also remove the dwc2_force_mode_if_needed() function since the "if needed" part is already taken care of by the polling in dwc2_force_mode(). Finally, remove all other calls to dwc2_clear_force_mode(). Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-02-16 16:56:03 +08:00
retval = dwc2_core_reset(hsotg, false);
if (retval)
goto error;
Revert "usb: dwc2: Move reset into dwc2_get_hwparams()" This reverts commit 263b7fb557f7 ("usb: dwc2: Move reset into dwc2_get_hwparams()") due to regression found on bcm2835 platform. USB ethernet fails, due to being unable to pick up proper parameters when performing a plain reset before reading hw params. Below shows the results of the gnptxfsiz and hptxfsiz with and before and after reverting this (from Stefan Wahren): So here is the probe result before Patch 1 is applied: [ 1.283148] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.313894] dwc2 20980000.usb: gnptxfsiz=00201000 [ 1.314104] dwc2 20980000.usb: hptxfsiz=00000000 [ 1.353908] dwc2 20980000.usb: 256 invalid for host_nperio_tx_fifo_size. Check HW configuration. [ 1.354262] dwc2 20980000.usb: 512 invalid for host_perio_tx_fifo_size. Check HW configuration. [ 1.394249] dwc2 20980000.usb: DWC OTG Controller [ 1.394561] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.394917] dwc2 20980000.usb: irq 33, io mem 0x00000000 And here is the probe result after Patch 1 is applied: [ 1.280107] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.353949] dwc2 20980000.usb: gnptxfsiz=01001000 [ 1.354166] dwc2 20980000.usb: hptxfsiz=02002000 [ 1.434301] dwc2 20980000.usb: DWC OTG Controller [ 1.434616] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.434973] dwc2 20980000.usb: irq 33, io mem 0x00000000 Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: John Youn <johnyoun@synopsys.com> Reported-by: Stefan Wahren <stefan.wahren@i2se.com> Reported-by: Remi Pommarel <repk@triplefau.lt> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2016-01-12 08:32:14 +08:00
/* Detect config values from hardware */
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
retval = dwc2_get_hwparams(hsotg);
if (retval)
goto error;
usb: dwc2: Force mode optimizations If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during driver probe to get the host and device specific HW parameters. Then we clear the force mode bits so that the core operates in OTG mode. The force mode bits should not be touched at any other time during the driver lifetime and they should be preserved whenever the GUSBCFG register is written to. The force mode bit values will persist across soft resets of the core. If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the force mode is set just once at probe to configure the core as either a host or peripheral. Given the above, we no longer need any other reset delays, force delays, or any forced modes anywhere else in the driver. So replace all calls to dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove all other unnecessary delays. Also remove the dwc2_force_mode_if_needed() function since the "if needed" part is already taken care of by the polling in dwc2_force_mode(). Finally, remove all other calls to dwc2_clear_force_mode(). Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-02-16 16:56:03 +08:00
/*
* For OTG cores, set the force mode bits to reflect the value
* of dr_mode. Force mode bits should not be touched at any
* other time after this.
*/
usb: dwc2: Remove redundant reset in probe Reset already happens before this so just force the dr_mode. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:18:27 +08:00
dwc2_force_dr_mode(hsotg);
usb: dwc2: Move reset into dwc2_get_hwparams() The reset is required to get reset values of the hardware parameters but the force mode is not. Move the base reset into dwc2_get_hwparams() and do the reset and force mode afterwards. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-18 03:16:58 +08:00
usb: dwc2: Move parameter initialization into params.c Consolidate and move all the parameter initialization code from the probe function to params.c. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-04 08:55:55 +08:00
retval = dwc2_init_params(hsotg);
if (retval)
goto error;
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
if (hsotg->params.activate_stm_id_vb_detection) {
u32 ggpio;
hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d");
if (IS_ERR(hsotg->usb33d)) {
retval = PTR_ERR(hsotg->usb33d);
if (retval != -EPROBE_DEFER)
dev_err(hsotg->dev,
"failed to request usb33d supply: %d\n",
retval);
goto error;
}
retval = regulator_enable(hsotg->usb33d);
if (retval) {
dev_err(hsotg->dev,
"failed to enable usb33d supply: %d\n", retval);
goto error;
}
ggpio = dwc2_readl(hsotg, GGPIO);
ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
dwc2_writel(hsotg, ggpio, GGPIO);
}
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
if (hsotg->dr_mode != USB_DR_MODE_HOST) {
usb: dwc2: eliminate irq parameter from dwc2_gadget_init The irq is available in hsotg already, so there's no need to pass it as separate function parameter. Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-12-25 19:17:45 +08:00
retval = dwc2_gadget_init(hsotg);
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
if (retval)
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
goto error_init;
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
hsotg->gadget_enabled = 1;
}
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
/*
* If we need PHY for wakeup we must be wakeup capable.
* When we have a device that can wake without the PHY we
* can adjust this condition.
*/
if (hsotg->need_phy_for_wake)
device_set_wakeup_capable(&dev->dev, true);
usb: dwc2: optionally assert phy reset when waking up On the rk3288 USB host-only port (the one that's not the OTG-enabled port) the PHY can get into a bad state when a wakeup is asserted (not just a wakeup from full system suspend but also a wakeup from autosuspend). We can get the PHY out of its bad state by asserting its "port reset", but unfortunately that seems to assert a reset onto the USB bus so it could confuse things if we don't actually deenumerate / reenumerate the device. We can also get the PHY out of its bad state by fully resetting it using the reset from the CRU (clock reset unit), which does a more full reset. The CRU-based reset appears to actually cause devices on the bus to be removed and reinserted, which fixes the problem (albeit in a hacky way). It's unfortunate that we need to do a full re-enumeration of devices at wakeup time, but this is better than alternative of letting the bus get wedged. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-04-17 05:53:49 +08:00
hsotg->reset_phy_on_wake =
of_property_read_bool(dev->dev.of_node,
"snps,reset-phy-on-wake");
if (hsotg->reset_phy_on_wake && !hsotg->phy) {
dev_warn(hsotg->dev,
"Quirk reset-phy-on-wake only supports generic PHYs\n");
hsotg->reset_phy_on_wake = false;
}
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
usb: dwc2: eliminate irq parameter from dwc2_hcd_init The irq is available in hsotg already, so there's no need to pass it as separate function parameter. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-01-26 06:13:37 +08:00
retval = dwc2_hcd_init(hsotg);
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
if (retval) {
if (hsotg->gadget_enabled)
usb: dwc2: rename all s3c_* to dwc2_* this driver has long ago became dwc2.ko with both peripheral and host roles, there's no point in keeping the old function names. Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-08-07 07:11:54 +08:00
dwc2_hsotg_remove(hsotg);
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
goto error_init;
usb: dwc2: rework initialization of host and gadget in dual-role mode If device is configured to work only in HOST or DEVICE mode, there is no point in initializing both subdrivers. This patch also fixes resource leakage if host subdriver fails to initialize. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 20:41:10 +08:00
}
hsotg->hcd_enabled = 1;
}
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
platform_set_drvdata(dev, hsotg);
usb: dwc2: core: Add hibernated flag Added a flag to indicate that core is in hibernation, it is used to determine the hibernation state of the core. Signed-off-by: Vardan Mikayelyan <mvardan@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-02-16 18:08:27 +08:00
hsotg->hibernated = 0;
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
usb: dwc2: move debugfs code to a separate file Prepare to add more debug code. Moreover, don't save dentry * for each file in struct dwc2_hsotg as clean up is done with debugfs_remove_recursive(). s3c_hsotg_delete_debug() is removed altogether for the same reason. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-04-30 04:08:59 +08:00
dwc2_debugfs_init(hsotg);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
/* Gadget code manages lowlevel hw on its own */
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
dwc2_lowlevel_hw_disable(hsotg);
return 0;
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
error_init:
if (hsotg->params.activate_stm_id_vb_detection)
regulator_disable(hsotg->usb33d);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
error:
dwc2_lowlevel_hw_disable(hsotg);
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
return retval;
}
usb: dwc2: Fix build warning when CONFIG_PM_SLEEP=n Building with bcm2835_defconfig, which has CONFIG_PM_SLEEP=n causes the following build warning: drivers/usb/dwc2/platform.c:227:12: warning: 'dwc2_suspend' defined but not used [-Wunused-function] drivers/usb/dwc2/platform.c:237:12: warning: 'dwc2_resume' defined but not used [-Wunused-function] Annotate these functions with '__maybe_unused' to prevent the warnings. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-19 22:37:53 +08:00
static int __maybe_unused dwc2_suspend(struct device *dev)
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
{
usb: dwc2: convert to use dev_pm_ops API Update suspend/resume to use dev_pm_ops API. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:35 +08:00
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
bool is_device_mode = dwc2_is_device_mode(dwc2);
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
int ret = 0;
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
if (is_device_mode)
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
dwc2_hsotg_suspend(dwc2);
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
if (dwc2->params.activate_stm_id_vb_detection) {
unsigned long flags;
u32 ggpio, gotgctl;
/*
* Need to force the mode to the current mode to avoid Mode
* Mismatch Interrupt when ID detection will be disabled.
*/
dwc2_force_mode(dwc2, !is_device_mode);
spin_lock_irqsave(&dwc2->lock, flags);
gotgctl = dwc2_readl(dwc2, GOTGCTL);
/* bypass debounce filter, enable overrides */
gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN;
/* Force A / B session if needed */
if (gotgctl & GOTGCTL_ASESVLD)
gotgctl |= GOTGCTL_AVALOVAL;
if (gotgctl & GOTGCTL_BSESVLD)
gotgctl |= GOTGCTL_BVALOVAL;
dwc2_writel(dwc2, gotgctl, GOTGCTL);
spin_unlock_irqrestore(&dwc2->lock, flags);
ggpio = dwc2_readl(dwc2, GGPIO);
ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN;
ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN;
dwc2_writel(dwc2, ggpio, GGPIO);
regulator_disable(dwc2->usb33d);
}
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
if (dwc2->ll_hw_enabled &&
(is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = __dwc2_lowlevel_hw_disable(dwc2);
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
dwc2->phy_off_for_suspend = true;
}
usb: dwc2: platform: add generic PHY framework support Get PHY parameters from devicetree and power off usb PHY during system suspend. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-12-08 17:46:26 +08:00
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
return ret;
}
usb: dwc2: Fix build warning when CONFIG_PM_SLEEP=n Building with bcm2835_defconfig, which has CONFIG_PM_SLEEP=n causes the following build warning: drivers/usb/dwc2/platform.c:227:12: warning: 'dwc2_suspend' defined but not used [-Wunused-function] drivers/usb/dwc2/platform.c:237:12: warning: 'dwc2_resume' defined but not used [-Wunused-function] Annotate these functions with '__maybe_unused' to prevent the warnings. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-19 22:37:53 +08:00
static int __maybe_unused dwc2_resume(struct device *dev)
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
{
usb: dwc2: convert to use dev_pm_ops API Update suspend/resume to use dev_pm_ops API. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:35 +08:00
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
int ret = 0;
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
ret = __dwc2_lowlevel_hw_enable(dwc2);
if (ret)
return ret;
}
USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled If the 'snps,need-phy-for-wake' is set in the device tree then: - We know that we can wakeup, so call device_set_wakeup_capable(). The USB core will use this knowledge to enable wakeup by default. - We know that we should keep the PHY on during suspend if something on our root hub needs remote wakeup. This requires the patch (USB: Export usb_wakeup_enabled_descendants()). Note that we don't keep the PHY on at suspend time if it's not needed because it would be a power draw. If we later find some users of dwc2 that can support wakeup without keeping the PHY on we may want to add a way to call device_set_wakeup_capable() without keeping the PHY on at suspend time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2019-05-21 01:56:04 +08:00
dwc2->phy_off_for_suspend = false;
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
usb: dwc2: add support for STM32MP15 SoCs USB OTG HS and FS This patch introduces a new parameter to activate external ID pin and valid vbus level detection, required on STM32MP15 SoC to support dual role, either in HS or FS. The STM32MP15 SoC uses the GGPIO register to enable the level detection. The level detector requires to be powered. Also adds the params structures for STM32MP15 OTG HS and STM32MP1 OTG FS. Acked-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-01-24 16:41:31 +08:00
if (dwc2->params.activate_stm_id_vb_detection) {
unsigned long flags;
u32 ggpio, gotgctl;
ret = regulator_enable(dwc2->usb33d);
if (ret)
return ret;
ggpio = dwc2_readl(dwc2, GGPIO);
ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
dwc2_writel(dwc2, ggpio, GGPIO);
/* ID/VBUS detection startup time */
usleep_range(5000, 7000);
spin_lock_irqsave(&dwc2->lock, flags);
gotgctl = dwc2_readl(dwc2, GOTGCTL);
gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS;
gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN |
GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL);
dwc2_writel(dwc2, gotgctl, GOTGCTL);
spin_unlock_irqrestore(&dwc2->lock, flags);
}
/* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
dwc2_force_dr_mode(dwc2);
usb: dwc2: refactor common low-level hw code to platform.c DWC2 module on some platforms needs three additional hardware resources: phy controller, clock and power supply. All of them must be enabled/activated to properly initialize and operate. This was initially handled in s3c-hsotg driver, which has been converted to 'gadget' part of dwc2 driver. Unfortunately, not all of this code got moved to common platform code, what resulted in accessing DWC2 registers without enabling low-level hardware resources. This fails for example on Exynos SoCs. This patch moves all the code for managing those resources to common platform.c file and provides convenient wrappers for controlling them. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-14 14:52:29 +08:00
if (dwc2_is_device_mode(dwc2))
usb: dwc2: rename all s3c_* to dwc2_* this driver has long ago became dwc2.ko with both peripheral and host roles, there's no point in keeping the old function names. Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-08-07 07:11:54 +08:00
ret = dwc2_hsotg_resume(dwc2);
usb: dwc2: platform: add generic PHY framework support Get PHY parameters from devicetree and power off usb PHY during system suspend. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-12-08 17:46:26 +08:00
usb: dwc2: Move gadget probe function into platform code This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:34 +08:00
return ret;
}
usb: dwc2: convert to use dev_pm_ops API Update suspend/resume to use dev_pm_ops API. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:35 +08:00
static const struct dev_pm_ops dwc2_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
};
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
static struct platform_driver dwc2_platform_driver = {
.driver = {
staging: Remove superfluous name casts device_driver.name is "const char *" Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-11-13 03:07:19 +08:00
.name = dwc2_driver_name,
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
.of_match_table = dwc2_of_match_table,
usb: dwc2: convert to use dev_pm_ops API Update suspend/resume to use dev_pm_ops API. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-12 01:13:35 +08:00
.pm = &dwc2_dev_pm_ops,
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
},
.probe = dwc2_driver_probe,
.remove = dwc2_driver_remove,
usb: dwc2: add shutdown callback to platform variant In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-12-19 02:30:59 +08:00
.shutdown = dwc2_driver_shutdown,
staging: dwc2: add platform device bindings This adds a dwc_platform.ko module that can be loaded by using compatible = "snps,dwc2" in a device tree. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-23 05:00:19 +08:00
};
module_platform_driver(dwc2_platform_driver);
MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
MODULE_LICENSE("Dual BSD/GPL");