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linux/arch/powerpc/kernel/module.lds

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powerpc/modules: Fix alignment of .toc section in kernel modules powerpc64 gcc can generate code that offsets an address, to access part of an object in memory. If the address is a -mcmodel=medium toc pointer relative address then code like the following is possible. addis r9,r2,var@toc@ha ld r3,var@toc@l(r9) ld r4,(var+8)@toc@l(r9) This works fine so long as var is naturally aligned, *and* r2 is sufficiently aligned. If not, there is a possibility that the offset added to access var+8 wraps over a n*64k+32k boundary. Modules don't have any guarantee that r2 is sufficiently aligned. Moreover, code generated by older compilers generates a .toc section with 2**0 alignment, which can result in relocation failures at module load time even without the wrap problem. Thus, this patch links modules with an aligned .toc section (Makefile and module.lds changes), and forces alignment for out of tree modules or those without a .toc section (module_64.c changes). Signed-off-by: Alan Modra <amodra@gmail.com> [desnesn: updated patch to apply to powerpc-next kernel v4.15 ] Signed-off-by: Desnes A. Nunes do Rosario <desnesn@linux.vnet.ibm.com> [mpe: Fix out-of-tree build, swap -256 for ~0xff, reflow comment] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-12-07 03:12:28 +08:00
/* Force alignment of .toc section. */
SECTIONS
{
.toc 0 : ALIGN(256)
{
*(.got .toc)
}
}