2012-05-31 05:02:49 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/init.h>
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2014-10-21 03:03:53 +08:00
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#include <linux/irqchip/mips-gic.h>
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2012-05-31 05:02:49 +08:00
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#include <linux/serial_8250.h>
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2014-09-19 05:47:24 +08:00
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#include <asm/mips-boards/sead3int.h>
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#define UART(base) \
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2012-05-31 05:02:49 +08:00
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{ \
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.mapbase = base, \
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2014-09-19 05:47:24 +08:00
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.irq = -1, \
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2012-05-31 05:02:49 +08:00
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.uartclk = 14745600, \
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.iotype = UPIO_MEM32, \
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, \
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.regshift = 2, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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2014-09-19 05:47:24 +08:00
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UART(0x1f000900), /* ttyS0 = USB */
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UART(0x1f000800), /* ttyS1 = RS232 */
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2012-05-31 05:02:49 +08:00
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM2,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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2014-09-19 05:47:24 +08:00
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if (gic_present) {
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uart8250_data[0].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART0;
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uart8250_data[1].irq = MIPS_GIC_IRQ_BASE + GIC_INT_UART1;
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} else {
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uart8250_data[0].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART0;
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uart8250_data[1].irq = MIPS_CPU_IRQ_BASE + CPU_INT_UART1;
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}
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2012-05-31 05:02:49 +08:00
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return platform_device_register(&uart8250_device);
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}
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2015-04-02 22:20:04 +08:00
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device_initcall(uart8250_init);
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