2018-03-20 22:58:06 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_OSDEP_H_
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#define _ICE_OSDEP_H_
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#include <linux/types.h>
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#include <linux/io.h>
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#ifndef CONFIG_64BIT
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#include <linux/io-64-nonatomic-lo-hi.h>
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#endif
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#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
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#define rd32(a, reg) readl((a)->hw_addr + (reg))
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#define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
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#define rd64(a, reg) readq((a)->hw_addr + (reg))
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2018-03-20 22:58:07 +08:00
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#define ice_flush(a) rd32((a), GLGEN_STAT)
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2018-03-20 22:58:06 +08:00
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#define ICE_M(m, s) ((m) << (s))
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struct ice_dma_mem {
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void *va;
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dma_addr_t pa;
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size_t size;
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};
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#define ice_hw_to_dev(ptr) \
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(&(container_of((ptr), struct ice_pf, hw))->pdev->dev)
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#ifdef CONFIG_DYNAMIC_DEBUG
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#define ice_debug(hw, type, fmt, args...) \
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dev_dbg(ice_hw_to_dev(hw), fmt, ##args)
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#define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
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print_hex_dump_debug(KBUILD_MODNAME " ", \
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DUMP_PREFIX_OFFSET, rowsize, \
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groupsize, buf, len, false)
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#else
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#define ice_debug(hw, type, fmt, args...) \
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do { \
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if ((type) & (hw)->debug_mask) \
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dev_info(ice_hw_to_dev(hw), fmt, ##args); \
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} while (0)
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#ifdef DEBUG
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#define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
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do { \
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if ((type) & (hw)->debug_mask) \
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print_hex_dump_debug(KBUILD_MODNAME, \
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DUMP_PREFIX_OFFSET, \
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rowsize, groupsize, buf, \
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len, false); \
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} while (0)
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#else
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#define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
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do { \
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struct ice_hw *hw_l = hw; \
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if ((type) & (hw_l)->debug_mask) { \
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u16 len_l = len; \
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u8 *buf_l = buf; \
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int i; \
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for (i = 0; i < (len_l - 16); i += 16) \
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ice_debug(hw_l, type, "0x%04X %16ph\n",\
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i, ((buf_l) + i)); \
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if (i < len_l) \
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ice_debug(hw_l, type, "0x%04X %*ph\n", \
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i, ((len_l) - i), ((buf_l) + i));\
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} \
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} while (0)
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#endif /* DEBUG */
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#endif /* CONFIG_DYNAMIC_DEBUG */
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#endif /* _ICE_OSDEP_H_ */
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