linux/drivers/tty/serial/8250/8250_mid.c

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tty: add SPDX identifiers to all remaining files in drivers/tty/ It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Update the drivers/tty files files with the correct SPDX license identifier based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Jiri Slaby <jslaby@suse.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: Jiri Kosina <jikos@kernel.org> Cc: David Sterba <dsterba@suse.com> Cc: James Hogan <jhogan@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Eric Anholt <eric@anholt.net> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Joachim Eastwood <manabian@gmail.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tobias Klauser <tklauser@distanz.ch> Cc: Russell King <linux@armlinux.org.uk> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Richard Genoud <richard.genoud@gmail.com> Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Baruch Siach <baruch@tkos.co.il> Cc: "Maciej W. Rozycki" <macro@linux-mips.org> Cc: "Uwe Kleine-König" <kernel@pengutronix.de> Cc: Pat Gefre <pfg@sgi.com> Cc: "Guilherme G. Piccoli" <gpiccoli@linux.vnet.ibm.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: "Andreas Färber" <afaerber@suse.de> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Barry Song <baohua@kernel.org> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Timur Tabi <timur@tabi.org> Cc: Tony Prisk <linux@prisktech.co.nz> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Jiri Slaby <jslaby@suse.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-07 01:11:51 +08:00
// SPDX-License-Identifier: GPL-2.0
/*
* 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
*
* Copyright (C) 2015 Intel Corporation
* Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
*/
#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/rational.h>
#include <linux/dma/hsu.h>
#include <linux/8250_pci.h>
#include "8250.h"
#define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
#define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
#define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
#define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
#define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
#define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
/* Intel MID Specific registers */
#define INTEL_MID_UART_FISR 0x08
#define INTEL_MID_UART_PS 0x30
#define INTEL_MID_UART_MUL 0x34
#define INTEL_MID_UART_DIV 0x38
struct mid8250;
struct mid8250_board {
unsigned int flags;
unsigned long freq;
unsigned int base_baud;
int (*setup)(struct mid8250 *, struct uart_port *p);
void (*exit)(struct mid8250 *);
};
struct mid8250 {
int line;
int dma_index;
struct pci_dev *dma_dev;
struct uart_8250_dma dma;
struct mid8250_board *board;
struct hsu_dma_chip dma_chip;
};
/*****************************************************************************/
static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
{
struct pci_dev *pdev = to_pci_dev(p->dev);
switch (pdev->device) {
case PCI_DEVICE_ID_INTEL_PNW_UART1:
mid->dma_index = 0;
break;
case PCI_DEVICE_ID_INTEL_PNW_UART2:
mid->dma_index = 1;
break;
case PCI_DEVICE_ID_INTEL_PNW_UART3:
mid->dma_index = 2;
break;
default:
return -EINVAL;
}
mid->dma_dev = pci_get_slot(pdev->bus,
PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
return 0;
}
serial: 8250_mid: handle interrupt correctly in DMA case Starting from Tangier B0 and continuing on Anniedale the HSU DMA interrupt line is actually shared with UART. Handling them independently is racy and quite often comes with the following traceback. irq 54: nobody cared (try booting with the "irqpoll" option) CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.0-rc6-edison64-86244934+ #1 Hardware name: Intel Corporation Merrifield/BODEGA BAY, BIOS 542 2015.01.21:18.19.48 ffff88003f203eb0 ffffffff8130e718 ffff880032627000 ffff88003262709c ffff88003f203ed8 ffffffff810a3960 ffff880032627000 0000000000000000 ffff880032627000 ffff88003f203f10 ffffffff810a3cc7 ffff880032627000 Call Trace: <IRQ> [<ffffffff8130e718>] dump_stack+0x4d/0x65 [<ffffffff810a3960>] __report_bad_irq+0x30/0xc0 [<ffffffff810a3cc7>] note_interrupt+0x227/0x270 [<ffffffff810a1380>] handle_irq_event_percpu+0x40/0x50 [<ffffffff810a13b7>] handle_irq_event+0x27/0x50 [<ffffffff810a42d5>] handle_fasteoi_irq+0x85/0x150 [<ffffffff8101d7fe>] handle_irq+0x6e/0x120 [<ffffffff8105b8bc>] ? _local_bh_enable+0x1c/0x50 [<ffffffff8101d0d6>] do_IRQ+0x46/0xd0 [<ffffffff818cef3f>] common_interrupt+0x7f/0x7f <EOI> [<ffffffff818cdead>] ? mwait_idle+0x7d/0x140 [<ffffffff81024c9a>] arch_cpu_idle+0xa/0x10 [<ffffffff818ce150>] default_idle_call+0x20/0x30 [<ffffffff810908fd>] cpu_startup_entry+0x16d/0x1d0 [<ffffffff818c882d>] rest_init+0x6d/0x70 [<ffffffff81f93e8f>] start_kernel+0x3e2/0x3ef [<ffffffff81f9343d>] x86_64_start_reservations+0x38/0x3a [<ffffffff81f93529>] x86_64_start_kernel+0xea/0xed handlers: [<ffffffff81411670>] serial8250_interrupt Disabling IRQ #54 Fix this by handling interrupt only in one place. The issue is discussed here: https://github.com/andy-shev/linux/issues/5 Moreover this also fixes another bug when Rx DMA returns wrong residue and we can't rely on it. Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-11 22:31:35 +08:00
static int tng_handle_irq(struct uart_port *p)
{
struct mid8250 *mid = p->private_data;
struct uart_8250_port *up = up_to_u8250p(p);
struct hsu_dma_chip *chip;
u32 status;
int ret = 0;
int err;
chip = pci_get_drvdata(mid->dma_dev);
/* Rx DMA */
err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
if (err > 0) {
serial8250_rx_dma_flush(up);
ret |= 1;
} else if (err == 0)
ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
/* Tx DMA */
err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
if (err > 0)
ret |= 1;
else if (err == 0)
ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
/* UART */
ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
return IRQ_RETVAL(ret);
}
static int tng_setup(struct mid8250 *mid, struct uart_port *p)
{
struct pci_dev *pdev = to_pci_dev(p->dev);
int index = PCI_FUNC(pdev->devfn);
/*
* Device 0000:00:04.0 is not a real HSU port. It provides a global
* register set for all HSU ports, although it has the same PCI ID.
* Skip it here.
*/
if (index-- == 0)
return -ENODEV;
mid->dma_index = index;
mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
serial: 8250_mid: handle interrupt correctly in DMA case Starting from Tangier B0 and continuing on Anniedale the HSU DMA interrupt line is actually shared with UART. Handling them independently is racy and quite often comes with the following traceback. irq 54: nobody cared (try booting with the "irqpoll" option) CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.0-rc6-edison64-86244934+ #1 Hardware name: Intel Corporation Merrifield/BODEGA BAY, BIOS 542 2015.01.21:18.19.48 ffff88003f203eb0 ffffffff8130e718 ffff880032627000 ffff88003262709c ffff88003f203ed8 ffffffff810a3960 ffff880032627000 0000000000000000 ffff880032627000 ffff88003f203f10 ffffffff810a3cc7 ffff880032627000 Call Trace: <IRQ> [<ffffffff8130e718>] dump_stack+0x4d/0x65 [<ffffffff810a3960>] __report_bad_irq+0x30/0xc0 [<ffffffff810a3cc7>] note_interrupt+0x227/0x270 [<ffffffff810a1380>] handle_irq_event_percpu+0x40/0x50 [<ffffffff810a13b7>] handle_irq_event+0x27/0x50 [<ffffffff810a42d5>] handle_fasteoi_irq+0x85/0x150 [<ffffffff8101d7fe>] handle_irq+0x6e/0x120 [<ffffffff8105b8bc>] ? _local_bh_enable+0x1c/0x50 [<ffffffff8101d0d6>] do_IRQ+0x46/0xd0 [<ffffffff818cef3f>] common_interrupt+0x7f/0x7f <EOI> [<ffffffff818cdead>] ? mwait_idle+0x7d/0x140 [<ffffffff81024c9a>] arch_cpu_idle+0xa/0x10 [<ffffffff818ce150>] default_idle_call+0x20/0x30 [<ffffffff810908fd>] cpu_startup_entry+0x16d/0x1d0 [<ffffffff818c882d>] rest_init+0x6d/0x70 [<ffffffff81f93e8f>] start_kernel+0x3e2/0x3ef [<ffffffff81f9343d>] x86_64_start_reservations+0x38/0x3a [<ffffffff81f93529>] x86_64_start_kernel+0xea/0xed handlers: [<ffffffff81411670>] serial8250_interrupt Disabling IRQ #54 Fix this by handling interrupt only in one place. The issue is discussed here: https://github.com/andy-shev/linux/issues/5 Moreover this also fixes another bug when Rx DMA returns wrong residue and we can't rely on it. Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-11 22:31:35 +08:00
p->handle_irq = tng_handle_irq;
return 0;
}
static int dnv_handle_irq(struct uart_port *p)
{
struct mid8250 *mid = p->private_data;
struct uart_8250_port *up = up_to_u8250p(p);
unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
u32 status;
int ret = 0;
int err;
if (fisr & BIT(2)) {
err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
if (err > 0) {
serial8250_rx_dma_flush(up);
ret |= 1;
} else if (err == 0)
ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
}
if (fisr & BIT(1)) {
err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
if (err > 0)
ret |= 1;
else if (err == 0)
ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
}
if (fisr & BIT(0))
ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
return IRQ_RETVAL(ret);
}
#define DNV_DMA_CHAN_OFFSET 0x80
static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
{
struct hsu_dma_chip *chip = &mid->dma_chip;
struct pci_dev *pdev = to_pci_dev(p->dev);
unsigned int bar = FL_GET_BASE(mid->board->flags);
int ret;
pci_set_master(pdev);
ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
if (ret < 0)
return ret;
p->irq = pci_irq_vector(pdev, 0);
chip->dev = &pdev->dev;
chip->irq = pci_irq_vector(pdev, 0);
chip->regs = p->membase;
chip->length = pci_resource_len(pdev, bar);
chip->offset = DNV_DMA_CHAN_OFFSET;
/* Falling back to PIO mode if DMA probing fails */
ret = hsu_dma_probe(chip);
if (ret)
return 0;
mid->dma_dev = pdev;
p->handle_irq = dnv_handle_irq;
return 0;
}
static void dnv_exit(struct mid8250 *mid)
{
if (!mid->dma_dev)
return;
hsu_dma_remove(&mid->dma_chip);
}
/*****************************************************************************/
static void mid8250_set_termios(struct uart_port *p,
struct ktermios *termios,
struct ktermios *old)
{
unsigned int baud = tty_termios_baud_rate(termios);
struct mid8250 *mid = p->private_data;
unsigned short ps = 16;
unsigned long fuart = baud * ps;
unsigned long w = BIT(24) - 1;
unsigned long mul, div;
/* Gracefully handle the B0 case: fall back to B9600 */
fuart = fuart ? fuart : 9600 * 16;
if (mid->board->freq < fuart) {
/* Find prescaler value that satisfies Fuart < Fref */
if (mid->board->freq > baud)
ps = mid->board->freq / baud; /* baud rate too high */
else
ps = 1; /* PLL case */
fuart = baud * ps;
} else {
/* Get Fuart closer to Fref */
fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
}
rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
writel(div, p->membase + INTEL_MID_UART_DIV);
serial8250_do_set_termios(p, termios, old);
}
static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
{
struct hsu_dma_slave *s = param;
if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
return false;
chan->private = s;
return true;
}
static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
{
struct uart_8250_dma *dma = &mid->dma;
struct device *dev = port->port.dev;
struct hsu_dma_slave *rx_param;
struct hsu_dma_slave *tx_param;
if (!mid->dma_dev)
return 0;
rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
if (!rx_param)
return -ENOMEM;
tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
if (!tx_param)
return -ENOMEM;
rx_param->chan_id = mid->dma_index * 2 + 1;
tx_param->chan_id = mid->dma_index * 2;
dma->rxconf.src_maxburst = 64;
dma->txconf.dst_maxburst = 64;
rx_param->dma_dev = &mid->dma_dev->dev;
tx_param->dma_dev = &mid->dma_dev->dev;
dma->fn = mid8250_dma_filter;
dma->rx_param = rx_param;
dma->tx_param = tx_param;
port->dma = dma;
return 0;
}
static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct uart_8250_port uart;
struct mid8250 *mid;
unsigned int bar;
int ret;
ret = pcim_enable_device(pdev);
if (ret)
return ret;
mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
if (!mid)
return -ENOMEM;
mid->board = (struct mid8250_board *)id->driver_data;
bar = FL_GET_BASE(mid->board->flags);
memset(&uart, 0, sizeof(struct uart_8250_port));
uart.port.dev = &pdev->dev;
uart.port.irq = pdev->irq;
uart.port.private_data = mid;
uart.port.type = PORT_16750;
uart.port.iotype = UPIO_MEM;
uart.port.uartclk = mid->board->base_baud * 16;
uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
uart.port.set_termios = mid8250_set_termios;
uart.port.mapbase = pci_resource_start(pdev, bar);
uart.port.membase = pcim_iomap(pdev, bar, 0);
if (!uart.port.membase)
return -ENOMEM;
if (mid->board->setup) {
ret = mid->board->setup(mid, &uart.port);
if (ret)
return ret;
}
ret = mid8250_dma_setup(mid, &uart);
if (ret)
goto err;
ret = serial8250_register_8250_port(&uart);
if (ret < 0)
goto err;
mid->line = ret;
pci_set_drvdata(pdev, mid);
return 0;
err:
if (mid->board->exit)
mid->board->exit(mid);
return ret;
}
static void mid8250_remove(struct pci_dev *pdev)
{
struct mid8250 *mid = pci_get_drvdata(pdev);
serial: 8250_mid fix calltrace when hotplug 8250 serial controller Fix the following Calltrace: [ 77.768221] WARNING: CPU: 5 PID: 645 at drivers/dma/dmaengine.c:1069 dma_async_device_unregister+0xe2/0xf0 [ 77.775058] dma_async_device_unregister called while 1 clients hold a reference [ 77.825048] CPU: 5 PID: 645 Comm: sh Not tainted 4.8.8-WR9.0.0.0_standard+ #3 [ 77.832550] Hardware name: Intel Corp. Aspen Cove/Server, BIOS HAVLCRB1.X64.0012.D58.1604140405 04/14/2016 [ 77.840396] 0000000000000000 ffffc90008adbc80 ffffffff81403456 ffffc90008adbcd0 [ 77.848245] 0000000000000000 ffffc90008adbcc0 ffffffff8105e2e1 0000042d08adbf20 [ 77.855934] ffff88046a861c18 ffff88046a85c420 ffffffff820d4200 ffff88046ae92318 [ 77.863601] Call Trace: [ 77.871113] [<ffffffff81403456>] dump_stack+0x4f/0x69 [ 77.878655] [<ffffffff8105e2e1>] __warn+0xd1/0xf0 [ 77.886102] [<ffffffff8105e34f>] warn_slowpath_fmt+0x4f/0x60 [ 77.893508] [<ffffffff814187a9>] ? find_next_bit+0x19/0x20 [ 77.900730] [<ffffffff814bf83e>] ? dma_channel_rebalance+0x23e/0x270 [ 77.907814] [<ffffffff814bfee2>] dma_async_device_unregister+0xe2/0xf0 [ 77.914992] [<ffffffff814c53aa>] hsu_dma_remove+0x1a/0x60 [ 77.921977] [<ffffffff814ee14c>] dnv_exit+0x1c/0x20 [ 77.928752] [<ffffffff814edff6>] mid8250_remove+0x26/0x40 [ 77.935607] [<ffffffff8144f1b9>] pci_device_remove+0x39/0xc0 [ 77.942292] [<ffffffff8160cfea>] __device_release_driver+0x9a/0x140 [ 77.948836] [<ffffffff8160d0b3>] device_release_driver+0x23/0x30 [ 77.955364] [<ffffffff81447dcc>] pci_stop_bus_device+0x8c/0xa0 [ 77.961769] [<ffffffff81447f0a>] pci_stop_and_remove_bus_device_locked+0x1a/0x30 [ 77.968113] [<ffffffff81450d4e>] remove_store+0x5e/0x70 [ 77.974267] [<ffffffff81607ed8>] dev_attr_store+0x18/0x30 [ 77.980243] [<ffffffff8123006a>] sysfs_kf_write+0x3a/0x50 [ 77.986180] [<ffffffff8122f5ab>] kernfs_fop_write+0x10b/0x190 [ 77.992118] [<ffffffff811bf1c8>] __vfs_write+0x18/0x40 [ 77.998032] [<ffffffff811bfdee>] vfs_write+0xae/0x190 [ 78.003747] [<ffffffff811c1016>] SyS_write+0x46/0xb0 [ 78.009234] [<ffffffff81a4c31b>] entry_SYSCALL_64_fastpath+0x13/0x8f [ 78.014809] ---[ end trace 0c36dd73b7408eb2 ]--- This happens when the 8250 serial controller is hotplugged as follows: echo 1 > /sys/bus/pci/devices/0000:00:1a.0/remove This trace happens due to the serial port still holding a reference when the dma device is unregistered. The dma unregister routine will check if there is still a reference exist, if so it will give the WARNING(here serial port still was not unregister). To fix this, We need to unregister the serial port first, then do DMA device unregister to make sure there is no reference when to DMA routine. Signed-off-by: Liwei Song <liwei.song@windriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-30 14:25:25 +08:00
serial8250_unregister_port(mid->line);
if (mid->board->exit)
mid->board->exit(mid);
}
static const struct mid8250_board pnw_board = {
.flags = FL_BASE0,
.freq = 50000000,
.base_baud = 115200,
.setup = pnw_setup,
};
static const struct mid8250_board tng_board = {
.flags = FL_BASE0,
.freq = 38400000,
.base_baud = 1843200,
.setup = tng_setup,
};
static const struct mid8250_board dnv_board = {
.flags = FL_BASE1,
.freq = 133333333,
.base_baud = 115200,
.setup = dnv_setup,
.exit = dnv_exit,
};
#define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
static const struct pci_device_id pci_ids[] = {
MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
MID_DEVICE(PCI_DEVICE_ID_INTEL_CDF_UART, dnv_board),
MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
{ },
};
MODULE_DEVICE_TABLE(pci, pci_ids);
static struct pci_driver mid8250_pci_driver = {
.name = "8250_mid",
.id_table = pci_ids,
.probe = mid8250_probe,
.remove = mid8250_remove,
};
module_pci_driver(mid8250_pci_driver);
MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel MID UART driver");