2016-06-10 13:33:49 +08:00
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/*
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* Copyright 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation (the "GPL").
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 (GPLv2) for more details.
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*
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* You should have received a copy of the GNU General Public License
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* version 2 (GPLv2) along with this source code.
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*/
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/of_mdio.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#include <linux/mdio-mux.h>
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#include <linux/delay.h>
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#define MDIO_PARAM_OFFSET 0x00
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#define MDIO_PARAM_MIIM_CYCLE 29
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#define MDIO_PARAM_INTERNAL_SEL 25
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#define MDIO_PARAM_BUS_ID 22
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#define MDIO_PARAM_C45_SEL 21
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#define MDIO_PARAM_PHY_ID 16
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#define MDIO_PARAM_PHY_DATA 0
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#define MDIO_READ_OFFSET 0x04
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#define MDIO_READ_DATA_MASK 0xffff
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#define MDIO_ADDR_OFFSET 0x08
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#define MDIO_CTRL_OFFSET 0x0C
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#define MDIO_CTRL_WRITE_OP 0x1
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#define MDIO_CTRL_READ_OP 0x2
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#define MDIO_STAT_OFFSET 0x10
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#define MDIO_STAT_DONE 1
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#define BUS_MAX_ADDR 32
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#define EXT_BUS_START_ADDR 16
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struct iproc_mdiomux_desc {
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void *mux_handle;
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void __iomem *base;
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struct device *dev;
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struct mii_bus *mii_bus;
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};
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static int iproc_mdio_wait_for_idle(void __iomem *base, bool result)
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{
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unsigned int timeout = 1000; /* loop for 1s */
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u32 val;
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do {
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val = readl(base + MDIO_STAT_OFFSET);
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if ((val & MDIO_STAT_DONE) == result)
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return 0;
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usleep_range(1000, 2000);
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} while (timeout--);
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return -ETIMEDOUT;
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}
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/* start_miim_ops- Program and start MDIO transaction over mdio bus.
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* @base: Base address
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* @phyid: phyid of the selected bus.
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* @reg: register offset to be read/written.
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* @val :0 if read op else value to be written in @reg;
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* @op: Operation that need to be carried out.
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* MDIO_CTRL_READ_OP: Read transaction.
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* MDIO_CTRL_WRITE_OP: Write transaction.
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*
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* Return value: Successful Read operation returns read reg values and write
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* operation returns 0. Failure operation returns negative error code.
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*/
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static int start_miim_ops(void __iomem *base,
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u16 phyid, u32 reg, u16 val, u32 op)
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{
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u32 param;
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int ret;
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writel(0, base + MDIO_CTRL_OFFSET);
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ret = iproc_mdio_wait_for_idle(base, 0);
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if (ret)
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goto err;
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param = readl(base + MDIO_PARAM_OFFSET);
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param |= phyid << MDIO_PARAM_PHY_ID;
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param |= val << MDIO_PARAM_PHY_DATA;
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if (reg & MII_ADDR_C45)
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param |= BIT(MDIO_PARAM_C45_SEL);
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writel(param, base + MDIO_PARAM_OFFSET);
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writel(reg, base + MDIO_ADDR_OFFSET);
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writel(op, base + MDIO_CTRL_OFFSET);
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ret = iproc_mdio_wait_for_idle(base, 1);
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if (ret)
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goto err;
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if (op == MDIO_CTRL_READ_OP)
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ret = readl(base + MDIO_READ_OFFSET) & MDIO_READ_DATA_MASK;
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err:
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return ret;
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}
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static int iproc_mdiomux_read(struct mii_bus *bus, int phyid, int reg)
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{
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struct iproc_mdiomux_desc *md = bus->priv;
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int ret;
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ret = start_miim_ops(md->base, phyid, reg, 0, MDIO_CTRL_READ_OP);
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if (ret < 0)
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dev_err(&bus->dev, "mdiomux read operation failed!!!");
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return ret;
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}
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static int iproc_mdiomux_write(struct mii_bus *bus,
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int phyid, int reg, u16 val)
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{
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struct iproc_mdiomux_desc *md = bus->priv;
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int ret;
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/* Write val at reg offset */
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ret = start_miim_ops(md->base, phyid, reg, val, MDIO_CTRL_WRITE_OP);
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if (ret < 0)
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dev_err(&bus->dev, "mdiomux write operation failed!!!");
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return ret;
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}
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static int mdio_mux_iproc_switch_fn(int current_child, int desired_child,
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void *data)
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{
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struct iproc_mdiomux_desc *md = data;
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u32 param, bus_id;
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bool bus_dir;
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/* select bus and its properties */
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bus_dir = (desired_child < EXT_BUS_START_ADDR);
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bus_id = bus_dir ? desired_child : (desired_child - EXT_BUS_START_ADDR);
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param = (bus_dir ? 1 : 0) << MDIO_PARAM_INTERNAL_SEL;
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param |= (bus_id << MDIO_PARAM_BUS_ID);
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writel(param, md->base + MDIO_PARAM_OFFSET);
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return 0;
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}
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static int mdio_mux_iproc_probe(struct platform_device *pdev)
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{
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struct iproc_mdiomux_desc *md;
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struct mii_bus *bus;
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struct resource *res;
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int rc;
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md = devm_kzalloc(&pdev->dev, sizeof(*md), GFP_KERNEL);
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if (!md)
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return -ENOMEM;
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md->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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md->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(md->base)) {
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dev_err(&pdev->dev, "failed to ioremap register\n");
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return PTR_ERR(md->base);
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}
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md->mii_bus = mdiobus_alloc();
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if (!md->mii_bus) {
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dev_err(&pdev->dev, "mdiomux bus alloc failed\n");
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return -ENOMEM;
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}
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bus = md->mii_bus;
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bus->priv = md;
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bus->name = "iProc MDIO mux bus";
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d", pdev->name, pdev->id);
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bus->parent = &pdev->dev;
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bus->read = iproc_mdiomux_read;
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bus->write = iproc_mdiomux_write;
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bus->phy_mask = ~0;
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bus->dev.of_node = pdev->dev.of_node;
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rc = mdiobus_register(bus);
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if (rc) {
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dev_err(&pdev->dev, "mdiomux registration failed\n");
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goto out;
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}
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platform_set_drvdata(pdev, md);
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rc = mdio_mux_init(md->dev, mdio_mux_iproc_switch_fn,
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&md->mux_handle, md, md->mii_bus);
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if (rc) {
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dev_info(md->dev, "mdiomux initialization failed\n");
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2017-05-09 05:48:35 +08:00
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goto out_register;
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2016-06-10 13:33:49 +08:00
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}
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dev_info(md->dev, "iProc mdiomux registered\n");
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return 0;
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2017-05-09 05:48:35 +08:00
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out_register:
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mdiobus_unregister(bus);
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2016-06-10 13:33:49 +08:00
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out:
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mdiobus_free(bus);
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return rc;
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}
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static int mdio_mux_iproc_remove(struct platform_device *pdev)
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{
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struct iproc_mdiomux_desc *md = dev_get_platdata(&pdev->dev);
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mdio_mux_uninit(md->mux_handle);
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mdiobus_unregister(md->mii_bus);
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mdiobus_free(md->mii_bus);
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return 0;
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}
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static const struct of_device_id mdio_mux_iproc_match[] = {
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{
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.compatible = "brcm,mdio-mux-iproc",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, mdio_mux_iproc_match);
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static struct platform_driver mdiomux_iproc_driver = {
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.driver = {
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.name = "mdio-mux-iproc",
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.of_match_table = mdio_mux_iproc_match,
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},
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.probe = mdio_mux_iproc_probe,
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.remove = mdio_mux_iproc_remove,
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};
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module_platform_driver(mdiomux_iproc_driver);
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MODULE_DESCRIPTION("iProc MDIO Mux Bus Driver");
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MODULE_AUTHOR("Pramod Kumar <pramod.kumar@broadcom.com>");
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MODULE_LICENSE("GPL v2");
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