2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
* linux/arch/arm/mach-sa1100/neponset.c
|
|
|
|
*/
|
2012-01-25 06:36:47 +08:00
|
|
|
#include <linux/err.h>
|
2005-04-17 06:20:36 +08:00
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/ioport.h>
|
2012-01-25 06:22:18 +08:00
|
|
|
#include <linux/irq.h>
|
2012-01-25 06:13:00 +08:00
|
|
|
#include <linux/kernel.h>
|
2012-01-25 06:10:02 +08:00
|
|
|
#include <linux/module.h>
|
2012-09-21 17:18:58 +08:00
|
|
|
#include <linux/platform_data/sa11x0-serial.h>
|
2005-10-30 02:07:23 +08:00
|
|
|
#include <linux/platform_device.h>
|
2012-01-25 07:29:47 +08:00
|
|
|
#include <linux/pm.h>
|
2012-01-25 06:13:00 +08:00
|
|
|
#include <linux/serial_core.h>
|
2012-01-25 06:10:02 +08:00
|
|
|
#include <linux/slab.h>
|
net: smc91x: use run-time configuration on all ARM machines
The smc91x driver traditionally gets configured at compile-time
for whichever hardware it runs on. This no longer works on
ARM as we continue to move to building all-in-one kernels.
Most ARM configurations with this driver already use run-time
configuration through DT or through platform_data, but a
few have not been converted yet.
I've checked all ARM boards that use this driver in their
legacy board files, and converted the ones that were using
compile-time configuration in smc91x.h to behave like the
other ones and provide the interrupt polarity along with
the MMIO configuration (width, stride) at platform device
creation time.
In particular, these combinations were previously selectable
in Kconfig but in fact broken:
- sa1100 assabet plus pleb
- msm combined with any other armv6/v7 platform
- pxa-idp combined with any non-DMA pxa variant
- LogicPD PXA270 combined with any other pxa
- nomadik combined with any other armv4/v5 platform,
e.g. versatile.
None of these seem critical enough to warrant a backport
to stable, but it would be nice to clean this up for good.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
I would like the patch to get merged through netdev, after
Robert and/or Linus have verified it on at least some hardware.
There are a few other non-ARM platforms using this driver,
I could do the same patch for those if we want to take
it further.
arch/arm/mach-msm/board-halibut.c | 8 ++++-
arch/arm/mach-msm/board-qsd8x50.c | 8 ++++-
arch/arm/mach-pxa/idp.c | 5 +++
arch/arm/mach-pxa/lpd270.c | 8 ++++-
arch/arm/mach-realview/core.c | 7 ++++
arch/arm/mach-realview/realview_eb.c | 2 +-
arch/arm/mach-sa1100/neponset.c | 6 ++++
arch/arm/mach-sa1100/pleb.c | 7 ++++
drivers/net/ethernet/smsc/smc91x.c | 9 +++--
drivers/net/ethernet/smsc/smc91x.h | 114 ++----------------------------------------------------------
10 files changed, 57 insertions(+), 117 deletions(-)
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-25 23:31:57 +08:00
|
|
|
#include <linux/smc91x.h>
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
#include <asm/mach-types.h>
|
|
|
|
#include <asm/mach/map.h>
|
|
|
|
#include <asm/hardware/sa1111.h>
|
|
|
|
#include <asm/sizes.h>
|
|
|
|
|
2012-01-25 06:13:00 +08:00
|
|
|
#include <mach/hardware.h>
|
|
|
|
#include <mach/assabet.h>
|
|
|
|
#include <mach/neponset.h>
|
2012-02-24 07:06:51 +08:00
|
|
|
#include <mach/irqs.h>
|
2012-01-25 06:13:00 +08:00
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
#define NEP_IRQ_SMC91X 0
|
|
|
|
#define NEP_IRQ_USAR 1
|
|
|
|
#define NEP_IRQ_SA1111 2
|
|
|
|
#define NEP_IRQ_NR 3
|
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
#define WHOAMI 0x00
|
|
|
|
#define LEDS 0x10
|
|
|
|
#define SWPK 0x20
|
|
|
|
#define IRR 0x24
|
|
|
|
#define KP_Y_IN 0x80
|
|
|
|
#define KP_X_OUT 0x90
|
|
|
|
#define NCR_0 0xa0
|
|
|
|
#define MDM_CTL_0 0xb0
|
|
|
|
#define MDM_CTL_1 0xb4
|
|
|
|
#define AUD_CTL 0xc0
|
|
|
|
|
|
|
|
#define IRR_ETHERNET (1 << 0)
|
|
|
|
#define IRR_USAR (1 << 1)
|
|
|
|
#define IRR_SA1111 (1 << 2)
|
|
|
|
|
|
|
|
#define MDM_CTL0_RTS1 (1 << 0)
|
|
|
|
#define MDM_CTL0_DTR1 (1 << 1)
|
|
|
|
#define MDM_CTL0_RTS2 (1 << 2)
|
|
|
|
#define MDM_CTL0_DTR2 (1 << 3)
|
|
|
|
|
|
|
|
#define MDM_CTL1_CTS1 (1 << 0)
|
|
|
|
#define MDM_CTL1_DSR1 (1 << 1)
|
|
|
|
#define MDM_CTL1_DCD1 (1 << 2)
|
|
|
|
#define MDM_CTL1_CTS2 (1 << 3)
|
|
|
|
#define MDM_CTL1_DSR2 (1 << 4)
|
|
|
|
#define MDM_CTL1_DCD2 (1 << 5)
|
|
|
|
|
|
|
|
#define AUD_SEL_1341 (1 << 0)
|
|
|
|
#define AUD_MUTE_1341 (1 << 1)
|
|
|
|
|
2012-01-26 19:50:23 +08:00
|
|
|
extern void sa1110_mb_disable(void);
|
|
|
|
|
2012-01-25 06:10:02 +08:00
|
|
|
struct neponset_drvdata {
|
2012-01-29 19:19:06 +08:00
|
|
|
void __iomem *base;
|
2012-01-25 06:36:47 +08:00
|
|
|
struct platform_device *sa1111;
|
|
|
|
struct platform_device *smc91x;
|
2012-01-25 06:22:18 +08:00
|
|
|
unsigned irq_base;
|
2012-01-25 06:10:02 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
u32 ncr0;
|
|
|
|
u32 mdm_ctl_0;
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
static void __iomem *nep_base;
|
|
|
|
|
2012-01-16 17:31:47 +08:00
|
|
|
void neponset_ncr_frob(unsigned int mask, unsigned int val)
|
|
|
|
{
|
2012-01-29 19:19:06 +08:00
|
|
|
void __iomem *base = nep_base;
|
|
|
|
|
|
|
|
if (base) {
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned v;
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
v = readb_relaxed(base + NCR_0);
|
|
|
|
writeb_relaxed((v & ~mask) | val, base + NCR_0);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
} else {
|
|
|
|
WARN(1, "nep_base unset\n");
|
|
|
|
}
|
2012-01-16 17:31:47 +08:00
|
|
|
}
|
2012-05-25 15:41:53 +08:00
|
|
|
EXPORT_SYMBOL(neponset_ncr_frob);
|
2012-01-16 17:31:47 +08:00
|
|
|
|
2012-01-25 06:13:00 +08:00
|
|
|
static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
|
|
|
|
{
|
2012-01-29 19:19:06 +08:00
|
|
|
void __iomem *base = nep_base;
|
|
|
|
u_int mdm_ctl0;
|
|
|
|
|
|
|
|
if (!base)
|
|
|
|
return;
|
2012-01-25 06:13:00 +08:00
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
|
2012-01-25 06:13:00 +08:00
|
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
|
|
mdm_ctl0 &= ~MDM_CTL0_RTS2;
|
|
|
|
else
|
|
|
|
mdm_ctl0 |= MDM_CTL0_RTS2;
|
|
|
|
|
|
|
|
if (mctrl & TIOCM_DTR)
|
|
|
|
mdm_ctl0 &= ~MDM_CTL0_DTR2;
|
|
|
|
else
|
|
|
|
mdm_ctl0 |= MDM_CTL0_DTR2;
|
|
|
|
} else if (port->mapbase == _Ser3UTCR0) {
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
|
|
mdm_ctl0 &= ~MDM_CTL0_RTS1;
|
|
|
|
else
|
|
|
|
mdm_ctl0 |= MDM_CTL0_RTS1;
|
|
|
|
|
|
|
|
if (mctrl & TIOCM_DTR)
|
|
|
|
mdm_ctl0 &= ~MDM_CTL0_DTR1;
|
|
|
|
else
|
|
|
|
mdm_ctl0 |= MDM_CTL0_DTR1;
|
|
|
|
}
|
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
|
2012-01-25 06:13:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static u_int neponset_get_mctrl(struct uart_port *port)
|
|
|
|
{
|
2012-01-29 19:19:06 +08:00
|
|
|
void __iomem *base = nep_base;
|
2012-01-25 06:13:00 +08:00
|
|
|
u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
|
2012-01-29 19:19:06 +08:00
|
|
|
u_int mdm_ctl1;
|
2012-01-25 06:13:00 +08:00
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
if (!base)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
|
2012-01-25 06:13:00 +08:00
|
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_DCD2)
|
|
|
|
ret &= ~TIOCM_CD;
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_CTS2)
|
|
|
|
ret &= ~TIOCM_CTS;
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_DSR2)
|
|
|
|
ret &= ~TIOCM_DSR;
|
|
|
|
} else if (port->mapbase == _Ser3UTCR0) {
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_DCD1)
|
|
|
|
ret &= ~TIOCM_CD;
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_CTS1)
|
|
|
|
ret &= ~TIOCM_CTS;
|
|
|
|
if (mdm_ctl1 & MDM_CTL1_DSR1)
|
|
|
|
ret &= ~TIOCM_DSR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-12-22 06:02:24 +08:00
|
|
|
static struct sa1100_port_fns neponset_port_fns = {
|
2012-01-25 06:13:00 +08:00
|
|
|
.set_mctrl = neponset_set_mctrl,
|
|
|
|
.get_mctrl = neponset_get_mctrl,
|
|
|
|
};
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
* Install handler for Neponset IRQ. Note that we have to loop here
|
|
|
|
* since the ETHERNET and USAR IRQs are level based, and we need to
|
|
|
|
* ensure that the IRQ signal is deasserted before returning. This
|
|
|
|
* is rather unfortunate.
|
|
|
|
*/
|
2012-01-25 06:22:18 +08:00
|
|
|
static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2012-01-25 06:22:18 +08:00
|
|
|
struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
|
2005-04-17 06:20:36 +08:00
|
|
|
unsigned int irr;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
/*
|
|
|
|
* Acknowledge the parent IRQ.
|
|
|
|
*/
|
2010-11-29 18:12:06 +08:00
|
|
|
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the interrupt reason register. Let's have all
|
|
|
|
* active IRQ bits high. Note: there is a typo in the
|
|
|
|
* Neponset user's guide for the SA1111 IRR level.
|
|
|
|
*/
|
2012-01-29 19:19:06 +08:00
|
|
|
irr = readb_relaxed(d->base + IRR);
|
|
|
|
irr ^= IRR_ETHERNET | IRR_USAR;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Since there is no individual mask, we have to
|
|
|
|
* mask the parent IRQ. This is safe, since we'll
|
|
|
|
* recheck the register for any pending IRQs.
|
|
|
|
*/
|
|
|
|
if (irr & (IRR_ETHERNET | IRR_USAR)) {
|
2010-11-29 18:12:06 +08:00
|
|
|
desc->irq_data.chip->irq_mask(&desc->irq_data);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-06-09 00:59:31 +08:00
|
|
|
/*
|
|
|
|
* Ack the interrupt now to prevent re-entering
|
|
|
|
* this neponset handler. Again, this is safe
|
|
|
|
* since we'll check the IRR register prior to
|
|
|
|
* leaving.
|
|
|
|
*/
|
2010-11-29 18:12:06 +08:00
|
|
|
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
2006-06-09 00:59:31 +08:00
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
if (irr & IRR_ETHERNET)
|
|
|
|
generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
if (irr & IRR_USAR)
|
|
|
|
generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2010-11-29 18:12:06 +08:00
|
|
|
desc->irq_data.chip->irq_unmask(&desc->irq_data);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
if (irr & IRR_SA1111)
|
|
|
|
generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
/* Yes, we really do not have any kind of masking or unmasking */
|
2012-01-16 08:17:41 +08:00
|
|
|
static void nochip_noop(struct irq_data *irq)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct irq_chip nochip = {
|
|
|
|
.name = "neponset",
|
|
|
|
.irq_ack = nochip_noop,
|
|
|
|
.irq_mask = nochip_noop,
|
|
|
|
.irq_unmask = nochip_noop,
|
|
|
|
};
|
|
|
|
|
2012-01-25 06:13:00 +08:00
|
|
|
static struct sa1111_platform_data sa1111_info = {
|
2012-01-26 21:34:21 +08:00
|
|
|
.disable_devs = SA1111_DEVID_PS2_MSE,
|
2012-01-25 06:13:00 +08:00
|
|
|
};
|
|
|
|
|
2012-12-22 06:02:24 +08:00
|
|
|
static int neponset_probe(struct platform_device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2012-01-25 06:10:02 +08:00
|
|
|
struct neponset_drvdata *d;
|
2012-01-29 19:19:06 +08:00
|
|
|
struct resource *nep_res, *sa1111_res, *smc91x_res;
|
2012-01-25 06:22:18 +08:00
|
|
|
struct resource sa1111_resources[] = {
|
|
|
|
DEFINE_RES_MEM(0x40000000, SZ_8K),
|
|
|
|
{ .flags = IORESOURCE_IRQ },
|
|
|
|
};
|
2012-01-25 06:36:47 +08:00
|
|
|
struct platform_device_info sa1111_devinfo = {
|
|
|
|
.parent = &dev->dev,
|
|
|
|
.name = "sa1111",
|
|
|
|
.id = 0,
|
|
|
|
.res = sa1111_resources,
|
|
|
|
.num_res = ARRAY_SIZE(sa1111_resources),
|
|
|
|
.data = &sa1111_info,
|
|
|
|
.size_data = sizeof(sa1111_info),
|
|
|
|
.dma_mask = 0xffffffffUL,
|
|
|
|
};
|
2012-01-25 06:22:18 +08:00
|
|
|
struct resource smc91x_resources[] = {
|
|
|
|
DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
|
|
|
|
0x02000000, "smc91x-regs"),
|
|
|
|
DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
|
|
|
|
0x02000000, "smc91x-attrib"),
|
|
|
|
{ .flags = IORESOURCE_IRQ },
|
|
|
|
};
|
net: smc91x: use run-time configuration on all ARM machines
The smc91x driver traditionally gets configured at compile-time
for whichever hardware it runs on. This no longer works on
ARM as we continue to move to building all-in-one kernels.
Most ARM configurations with this driver already use run-time
configuration through DT or through platform_data, but a
few have not been converted yet.
I've checked all ARM boards that use this driver in their
legacy board files, and converted the ones that were using
compile-time configuration in smc91x.h to behave like the
other ones and provide the interrupt polarity along with
the MMIO configuration (width, stride) at platform device
creation time.
In particular, these combinations were previously selectable
in Kconfig but in fact broken:
- sa1100 assabet plus pleb
- msm combined with any other armv6/v7 platform
- pxa-idp combined with any non-DMA pxa variant
- LogicPD PXA270 combined with any other pxa
- nomadik combined with any other armv4/v5 platform,
e.g. versatile.
None of these seem critical enough to warrant a backport
to stable, but it would be nice to clean this up for good.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
I would like the patch to get merged through netdev, after
Robert and/or Linus have verified it on at least some hardware.
There are a few other non-ARM platforms using this driver,
I could do the same patch for those if we want to take
it further.
arch/arm/mach-msm/board-halibut.c | 8 ++++-
arch/arm/mach-msm/board-qsd8x50.c | 8 ++++-
arch/arm/mach-pxa/idp.c | 5 +++
arch/arm/mach-pxa/lpd270.c | 8 ++++-
arch/arm/mach-realview/core.c | 7 ++++
arch/arm/mach-realview/realview_eb.c | 2 +-
arch/arm/mach-sa1100/neponset.c | 6 ++++
arch/arm/mach-sa1100/pleb.c | 7 ++++
drivers/net/ethernet/smsc/smc91x.c | 9 +++--
drivers/net/ethernet/smsc/smc91x.h | 114 ++----------------------------------------------------------
10 files changed, 57 insertions(+), 117 deletions(-)
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-25 23:31:57 +08:00
|
|
|
struct smc91x_platdata smc91x_platdata = {
|
|
|
|
.flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
|
|
|
|
};
|
2012-01-25 06:36:47 +08:00
|
|
|
struct platform_device_info smc91x_devinfo = {
|
|
|
|
.parent = &dev->dev,
|
|
|
|
.name = "smc91x",
|
|
|
|
.id = 0,
|
|
|
|
.res = smc91x_resources,
|
|
|
|
.num_res = ARRAY_SIZE(smc91x_resources),
|
2015-03-05 06:39:18 +08:00
|
|
|
.data = &smc91x_platdata,
|
|
|
|
.size_data = sizeof(smc91x_platdata),
|
2012-01-25 06:36:47 +08:00
|
|
|
};
|
2012-01-25 07:05:08 +08:00
|
|
|
int ret, irq;
|
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
if (nep_base)
|
|
|
|
return -EBUSY;
|
|
|
|
|
2012-01-25 07:05:08 +08:00
|
|
|
irq = ret = platform_get_irq(dev, 0);
|
|
|
|
if (ret < 0)
|
|
|
|
goto err_alloc;
|
2012-01-25 06:10:02 +08:00
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
2012-01-25 07:17:37 +08:00
|
|
|
smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
|
|
|
|
sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
|
2012-01-29 19:19:06 +08:00
|
|
|
if (!nep_res || !smc91x_res || !sa1111_res) {
|
2012-01-25 07:17:37 +08:00
|
|
|
ret = -ENXIO;
|
|
|
|
goto err_alloc;
|
|
|
|
}
|
|
|
|
|
2012-01-25 06:10:02 +08:00
|
|
|
d = kzalloc(sizeof(*d), GFP_KERNEL);
|
|
|
|
if (!d) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_alloc;
|
|
|
|
}
|
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
d->base = ioremap(nep_res->start, SZ_4K);
|
|
|
|
if (!d->base) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_ioremap;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (readb_relaxed(d->base + WHOAMI) != 0x11) {
|
|
|
|
dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
|
|
|
|
readb_relaxed(d->base + WHOAMI));
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_id;
|
|
|
|
}
|
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
|
|
|
|
if (ret <= 0) {
|
|
|
|
dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
|
|
|
|
NEP_IRQ_NR, ret);
|
|
|
|
if (ret == 0)
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_irq_alloc;
|
|
|
|
}
|
|
|
|
|
|
|
|
d->irq_base = ret;
|
|
|
|
|
|
|
|
irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
|
|
|
|
handle_simple_irq);
|
2015-07-28 04:55:13 +08:00
|
|
|
irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
|
2012-01-25 06:22:18 +08:00
|
|
|
irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
|
|
|
|
handle_simple_irq);
|
2015-07-28 04:55:13 +08:00
|
|
|
irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
|
2012-01-25 06:22:18 +08:00
|
|
|
irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-01-25 07:05:08 +08:00
|
|
|
irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
|
2015-06-17 06:06:25 +08:00
|
|
|
irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
/*
|
2012-01-25 06:22:18 +08:00
|
|
|
* We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
|
|
|
|
* something on the Neponset activates this IRQ on sleep (eth?)
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
|
|
|
#if 0
|
2012-01-25 07:05:08 +08:00
|
|
|
enable_irq_wake(irq);
|
2005-04-17 06:20:36 +08:00
|
|
|
#endif
|
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
|
|
|
|
d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
|
2012-01-29 19:19:06 +08:00
|
|
|
nep_base = d->base;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
sa1100_register_uart_fns(&neponset_port_fns);
|
|
|
|
|
2012-01-26 19:50:23 +08:00
|
|
|
/* Ensure that the memory bus request/grant signals are setup */
|
|
|
|
sa1110_mb_disable();
|
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
|
2012-01-29 19:19:06 +08:00
|
|
|
writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-01-25 07:17:37 +08:00
|
|
|
sa1111_resources[0].parent = sa1111_res;
|
2012-01-25 06:22:18 +08:00
|
|
|
sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
|
|
|
|
sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
|
2012-01-25 06:36:47 +08:00
|
|
|
d->sa1111 = platform_device_register_full(&sa1111_devinfo);
|
2012-01-25 06:22:18 +08:00
|
|
|
|
2012-01-25 07:17:37 +08:00
|
|
|
smc91x_resources[0].parent = smc91x_res;
|
|
|
|
smc91x_resources[1].parent = smc91x_res;
|
2012-01-25 06:22:18 +08:00
|
|
|
smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
|
|
|
|
smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
|
2012-01-25 06:36:47 +08:00
|
|
|
d->smc91x = platform_device_register_full(&smc91x_devinfo);
|
|
|
|
|
2012-01-25 06:10:02 +08:00
|
|
|
platform_set_drvdata(dev, d);
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
2012-01-25 06:10:02 +08:00
|
|
|
|
2012-01-25 06:22:18 +08:00
|
|
|
err_irq_alloc:
|
2012-01-29 19:19:06 +08:00
|
|
|
err_id:
|
|
|
|
iounmap(d->base);
|
|
|
|
err_ioremap:
|
2012-01-25 06:22:18 +08:00
|
|
|
kfree(d);
|
2012-01-25 06:10:02 +08:00
|
|
|
err_alloc:
|
|
|
|
return ret;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2012-12-22 06:02:24 +08:00
|
|
|
static int neponset_remove(struct platform_device *dev)
|
2012-01-25 06:10:02 +08:00
|
|
|
{
|
|
|
|
struct neponset_drvdata *d = platform_get_drvdata(dev);
|
2012-01-25 07:05:08 +08:00
|
|
|
int irq = platform_get_irq(dev, 0);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2012-01-25 06:36:47 +08:00
|
|
|
if (!IS_ERR(d->sa1111))
|
|
|
|
platform_device_unregister(d->sa1111);
|
|
|
|
if (!IS_ERR(d->smc91x))
|
|
|
|
platform_device_unregister(d->smc91x);
|
2012-01-25 07:05:08 +08:00
|
|
|
irq_set_chained_handler(irq, NULL);
|
2012-01-25 06:22:18 +08:00
|
|
|
irq_free_descs(d->irq_base, NEP_IRQ_NR);
|
2012-01-29 19:19:06 +08:00
|
|
|
nep_base = NULL;
|
|
|
|
iounmap(d->base);
|
2012-01-25 06:10:02 +08:00
|
|
|
kfree(d);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2007-07-10 02:39:19 +08:00
|
|
|
|
2012-01-25 07:29:47 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int neponset_suspend(struct device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2012-01-25 07:29:47 +08:00
|
|
|
struct neponset_drvdata *d = dev_get_drvdata(dev);
|
2012-01-25 06:10:02 +08:00
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
d->ncr0 = readb_relaxed(d->base + NCR_0);
|
|
|
|
d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-01-25 07:29:47 +08:00
|
|
|
static int neponset_resume(struct device *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2012-01-25 07:29:47 +08:00
|
|
|
struct neponset_drvdata *d = dev_get_drvdata(dev);
|
2012-01-25 06:10:02 +08:00
|
|
|
|
2012-01-29 19:19:06 +08:00
|
|
|
writeb_relaxed(d->ncr0, d->base + NCR_0);
|
|
|
|
writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-01-25 07:29:47 +08:00
|
|
|
static const struct dev_pm_ops neponset_pm_ops = {
|
|
|
|
.suspend_noirq = neponset_suspend,
|
|
|
|
.resume_noirq = neponset_resume,
|
|
|
|
.freeze_noirq = neponset_suspend,
|
|
|
|
.restore_noirq = neponset_resume,
|
|
|
|
};
|
|
|
|
#define PM_OPS &neponset_pm_ops
|
2005-04-17 06:20:36 +08:00
|
|
|
#else
|
2012-01-25 07:29:47 +08:00
|
|
|
#define PM_OPS NULL
|
2005-04-17 06:20:36 +08:00
|
|
|
#endif
|
|
|
|
|
2005-11-10 06:32:44 +08:00
|
|
|
static struct platform_driver neponset_device_driver = {
|
2005-04-17 06:20:36 +08:00
|
|
|
.probe = neponset_probe,
|
2012-12-22 06:02:24 +08:00
|
|
|
.remove = neponset_remove,
|
2005-11-10 06:32:44 +08:00
|
|
|
.driver = {
|
|
|
|
.name = "neponset",
|
2012-01-25 07:29:47 +08:00
|
|
|
.pm = PM_OPS,
|
2005-11-10 06:32:44 +08:00
|
|
|
},
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init neponset_init(void)
|
|
|
|
{
|
2012-01-26 19:50:23 +08:00
|
|
|
return platform_driver_register(&neponset_device_driver);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
subsys_initcall(neponset_init);
|