2011-09-20 01:44:57 +08:00
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/*
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* PowerNV OPAL API wrappers
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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2015-04-09 11:51:32 +08:00
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#include <linux/jump_label.h>
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2011-09-20 01:44:57 +08:00
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#include <asm/ppc_asm.h>
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#include <asm/hvcall.h>
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#include <asm/asm-offsets.h>
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#include <asm/opal.h>
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2014-07-03 15:20:50 +08:00
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.section ".text"
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#ifdef CONFIG_TRACEPOINTS
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2014-10-30 12:43:43 +08:00
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#ifdef HAVE_JUMP_LABEL
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2014-07-03 15:20:50 +08:00
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#define OPAL_BRANCH(LABEL) \
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ARCH_STATIC_BRANCH(LABEL, opal_tracepoint_key)
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#else
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.section ".toc","aw"
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.globl opal_tracepoint_refcount
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opal_tracepoint_refcount:
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.llong 0
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.section ".text"
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/*
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* We branch around this in early init by using an unconditional cpu
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* feature.
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*/
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#define OPAL_BRANCH(LABEL) \
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BEGIN_FTR_SECTION; \
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b 1f; \
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END_FTR_SECTION(0, 1); \
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ld r12,opal_tracepoint_refcount@toc(r2); \
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cmpdi r12,0; \
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bne- LABEL; \
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1:
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#endif
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#else
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#define OPAL_BRANCH(LABEL)
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#endif
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2011-09-20 01:44:57 +08:00
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/* TODO:
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*
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* - Trace irqs in/off (needs saving/restoring all args, argh...)
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* - Get r11 feed up by Dave so I can have better register usage
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*/
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2014-07-03 15:20:50 +08:00
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2011-09-20 01:44:57 +08:00
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#define OPAL_CALL(name, token) \
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2014-10-22 11:32:52 +08:00
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_GLOBAL_TOC(name); \
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2011-09-20 01:44:57 +08:00
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mflr r0; \
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2016-07-08 14:37:11 +08:00
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std r0,PPC_LR_STKOFF(r1); \
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2014-07-03 15:20:50 +08:00
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li r0,token; \
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OPAL_BRANCH(opal_tracepoint_entry) \
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mfcr r12; \
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2013-10-15 11:36:31 +08:00
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stw r12,8(r1); \
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2014-07-03 15:20:50 +08:00
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li r11,0; \
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2011-09-20 01:44:57 +08:00
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mfmsr r12; \
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2014-07-03 15:20:50 +08:00
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ori r11,r11,MSR_EE; \
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2011-09-20 01:44:57 +08:00
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std r12,PACASAVEDMSR(r13); \
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2014-07-03 15:20:50 +08:00
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andc r12,r12,r11; \
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2011-09-20 01:44:57 +08:00
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mtmsrd r12,1; \
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2014-07-03 15:20:50 +08:00
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LOAD_REG_ADDR(r11,opal_return); \
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mtlr r11; \
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li r11,MSR_DR|MSR_IR|MSR_LE;\
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andc r12,r12,r11; \
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2011-09-20 01:44:57 +08:00
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mtspr SPRN_HSRR1,r12; \
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LOAD_REG_ADDR(r11,opal); \
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ld r12,8(r11); \
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ld r2,0(r11); \
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mtspr SPRN_HSRR0,r12; \
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hrfid
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2014-02-04 13:04:52 +08:00
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opal_return:
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2013-09-23 10:05:03 +08:00
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/*
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* Fixup endian on OPAL return... we should be able to simplify
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* this by instead converting the below trampoline to a set of
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* bytes (always BE) since MSR:LE will end up fixed up as a side
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* effect of the rfid.
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*/
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FIXUP_ENDIAN
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2011-09-20 01:44:57 +08:00
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ld r2,PACATOC(r13);
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2013-10-15 11:36:31 +08:00
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lwz r4,8(r1);
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2016-07-08 14:37:11 +08:00
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ld r5,PPC_LR_STKOFF(r1);
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2011-09-20 01:44:57 +08:00
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ld r6,PACASAVEDMSR(r13);
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mtspr SPRN_SRR0,r5;
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mtspr SPRN_SRR1,r6;
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mtcr r4;
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rfid
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2014-07-03 15:20:50 +08:00
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#ifdef CONFIG_TRACEPOINTS
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opal_tracepoint_entry:
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stdu r1,-STACKFRAMESIZE(r1)
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std r0,STK_REG(R23)(r1)
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std r3,STK_REG(R24)(r1)
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std r4,STK_REG(R25)(r1)
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std r5,STK_REG(R26)(r1)
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std r6,STK_REG(R27)(r1)
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std r7,STK_REG(R28)(r1)
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std r8,STK_REG(R29)(r1)
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std r9,STK_REG(R30)(r1)
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std r10,STK_REG(R31)(r1)
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mr r3,r0
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addi r4,r1,STK_REG(R24)
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bl __trace_opal_entry
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ld r0,STK_REG(R23)(r1)
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ld r3,STK_REG(R24)(r1)
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ld r4,STK_REG(R25)(r1)
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ld r5,STK_REG(R26)(r1)
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ld r6,STK_REG(R27)(r1)
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ld r7,STK_REG(R28)(r1)
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ld r8,STK_REG(R29)(r1)
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ld r9,STK_REG(R30)(r1)
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ld r10,STK_REG(R31)(r1)
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LOAD_REG_ADDR(r11,opal_tracepoint_return)
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mfcr r12
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std r11,16(r1)
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stw r12,8(r1)
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li r11,0
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mfmsr r12
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ori r11,r11,MSR_EE
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std r12,PACASAVEDMSR(r13)
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andc r12,r12,r11
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mtmsrd r12,1
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LOAD_REG_ADDR(r11,opal_return)
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mtlr r11
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li r11,MSR_DR|MSR_IR|MSR_LE
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andc r12,r12,r11
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mtspr SPRN_HSRR1,r12
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LOAD_REG_ADDR(r11,opal)
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ld r12,8(r11)
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ld r2,0(r11)
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mtspr SPRN_HSRR0,r12
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hrfid
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opal_tracepoint_return:
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std r3,STK_REG(R31)(r1)
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mr r4,r3
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ld r0,STK_REG(R23)(r1)
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bl __trace_opal_exit
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ld r3,STK_REG(R31)(r1)
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addi r1,r1,STACKFRAMESIZE
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ld r0,16(r1)
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mtlr r0
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blr
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#endif
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2016-07-08 14:37:11 +08:00
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#define OPAL_CALL_REAL(name, token) \
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_GLOBAL_TOC(name); \
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mflr r0; \
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std r0,PPC_LR_STKOFF(r1); \
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li r0,token; \
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mfcr r12; \
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stw r12,8(r1); \
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\
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/* Set opal return address */ \
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LOAD_REG_ADDR(r11, opal_return_realmode); \
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mtlr r11; \
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mfmsr r12; \
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li r11,MSR_LE; \
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andc r12,r12,r11; \
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mtspr SPRN_HSRR1,r12; \
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LOAD_REG_ADDR(r11,opal); \
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ld r12,8(r11); \
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ld r2,0(r11); \
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mtspr SPRN_HSRR0,r12; \
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2014-12-10 02:56:52 +08:00
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hrfid
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2016-07-08 14:37:11 +08:00
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opal_return_realmode:
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2014-12-10 02:56:52 +08:00
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FIXUP_ENDIAN
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2016-07-08 14:37:11 +08:00
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ld r2,PACATOC(r13);
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lwz r11,8(r1);
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2014-12-10 02:56:52 +08:00
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ld r12,PPC_LR_STKOFF(r1)
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2016-07-08 14:37:11 +08:00
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mtcr r11;
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2014-12-10 02:56:52 +08:00
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mtlr r12
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blr
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2016-07-08 14:37:11 +08:00
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2014-04-01 11:58:20 +08:00
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OPAL_CALL(opal_invalid_call, OPAL_INVALID_CALL);
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2011-09-20 01:44:57 +08:00
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OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE);
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OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ);
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OPAL_CALL(opal_console_write_buffer_space, OPAL_CONSOLE_WRITE_BUFFER_SPACE);
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OPAL_CALL(opal_rtc_read, OPAL_RTC_READ);
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OPAL_CALL(opal_rtc_write, OPAL_RTC_WRITE);
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OPAL_CALL(opal_cec_power_down, OPAL_CEC_POWER_DOWN);
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OPAL_CALL(opal_cec_reboot, OPAL_CEC_REBOOT);
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2015-07-31 23:54:38 +08:00
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OPAL_CALL(opal_cec_reboot2, OPAL_CEC_REBOOT2);
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2011-09-20 01:44:57 +08:00
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OPAL_CALL(opal_read_nvram, OPAL_READ_NVRAM);
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OPAL_CALL(opal_write_nvram, OPAL_WRITE_NVRAM);
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OPAL_CALL(opal_handle_interrupt, OPAL_HANDLE_INTERRUPT);
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OPAL_CALL(opal_poll_events, OPAL_POLL_EVENTS);
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OPAL_CALL(opal_pci_set_hub_tce_memory, OPAL_PCI_SET_HUB_TCE_MEMORY);
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OPAL_CALL(opal_pci_set_phb_tce_memory, OPAL_PCI_SET_PHB_TCE_MEMORY);
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OPAL_CALL(opal_pci_config_read_byte, OPAL_PCI_CONFIG_READ_BYTE);
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OPAL_CALL(opal_pci_config_read_half_word, OPAL_PCI_CONFIG_READ_HALF_WORD);
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OPAL_CALL(opal_pci_config_read_word, OPAL_PCI_CONFIG_READ_WORD);
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OPAL_CALL(opal_pci_config_write_byte, OPAL_PCI_CONFIG_WRITE_BYTE);
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OPAL_CALL(opal_pci_config_write_half_word, OPAL_PCI_CONFIG_WRITE_HALF_WORD);
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OPAL_CALL(opal_pci_config_write_word, OPAL_PCI_CONFIG_WRITE_WORD);
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OPAL_CALL(opal_set_xive, OPAL_SET_XIVE);
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KVM: PPC: Book3S HV: Set server for passed-through interrupts
When a guest has a PCI pass-through device with an interrupt, it
will direct the interrupt to a particular guest VCPU. In fact the
physical interrupt might arrive on any CPU, and then get
delivered to the target VCPU in the emulated XICS (guest interrupt
controller), and eventually delivered to the target VCPU.
Now that we have code to handle device interrupts in real mode
without exiting to the host kernel, there is an advantage to having
the device interrupt arrive on the same sub(core) as the target
VCPU is running on. In this situation, the interrupt can be
delivered to the target VCPU without any exit to the host kernel
(using a hypervisor doorbell interrupt between threads if
necessary).
This patch aims to get passed-through device interrupts arriving
on the correct core by setting the interrupt server in the real
hardware XICS for the interrupt to the first thread in the (sub)core
where its target VCPU is running. We do this in the real-mode H_EOI
code because the H_EOI handler already needs to look at the
emulated ICS state for the interrupt (whereas the H_XIRR handler
doesn't), and we know we are running in the target VCPU context
at that point.
We set the server CPU in hardware using an OPAL call, regardless of
what the IRQ affinity mask for the interrupt says, and without
updating the affinity mask. This amounts to saying that when an
interrupt is passed through to a guest, as a matter of policy we
allow the guest's affinity for the interrupt to override the host's.
This is inspired by an earlier patch from Suresh Warrier, although
none of this code came from that earlier patch.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2016-08-19 13:35:56 +08:00
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OPAL_CALL_REAL(opal_rm_set_xive, OPAL_SET_XIVE);
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2011-09-20 01:44:57 +08:00
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OPAL_CALL(opal_get_xive, OPAL_GET_XIVE);
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OPAL_CALL(opal_register_exception_handler, OPAL_REGISTER_OPAL_EXCEPTION_HANDLER);
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OPAL_CALL(opal_pci_eeh_freeze_status, OPAL_PCI_EEH_FREEZE_STATUS);
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OPAL_CALL(opal_pci_eeh_freeze_clear, OPAL_PCI_EEH_FREEZE_CLEAR);
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2014-07-21 12:42:31 +08:00
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OPAL_CALL(opal_pci_eeh_freeze_set, OPAL_PCI_EEH_FREEZE_SET);
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2014-09-30 10:38:55 +08:00
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OPAL_CALL(opal_pci_err_inject, OPAL_PCI_ERR_INJECT);
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2011-09-20 01:44:57 +08:00
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OPAL_CALL(opal_pci_shpc, OPAL_PCI_SHPC);
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OPAL_CALL(opal_pci_phb_mmio_enable, OPAL_PCI_PHB_MMIO_ENABLE);
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OPAL_CALL(opal_pci_set_phb_mem_window, OPAL_PCI_SET_PHB_MEM_WINDOW);
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OPAL_CALL(opal_pci_map_pe_mmio_window, OPAL_PCI_MAP_PE_MMIO_WINDOW);
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OPAL_CALL(opal_pci_set_phb_table_memory, OPAL_PCI_SET_PHB_TABLE_MEMORY);
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OPAL_CALL(opal_pci_set_pe, OPAL_PCI_SET_PE);
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OPAL_CALL(opal_pci_set_peltv, OPAL_PCI_SET_PELTV);
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OPAL_CALL(opal_pci_set_mve, OPAL_PCI_SET_MVE);
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OPAL_CALL(opal_pci_set_mve_enable, OPAL_PCI_SET_MVE_ENABLE);
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OPAL_CALL(opal_pci_get_xive_reissue, OPAL_PCI_GET_XIVE_REISSUE);
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OPAL_CALL(opal_pci_set_xive_reissue, OPAL_PCI_SET_XIVE_REISSUE);
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OPAL_CALL(opal_pci_set_xive_pe, OPAL_PCI_SET_XIVE_PE);
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OPAL_CALL(opal_get_xive_source, OPAL_GET_XIVE_SOURCE);
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OPAL_CALL(opal_get_msi_32, OPAL_GET_MSI_32);
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OPAL_CALL(opal_get_msi_64, OPAL_GET_MSI_64);
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OPAL_CALL(opal_start_cpu, OPAL_START_CPU);
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OPAL_CALL(opal_query_cpu_status, OPAL_QUERY_CPU_STATUS);
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OPAL_CALL(opal_write_oppanel, OPAL_WRITE_OPPANEL);
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OPAL_CALL(opal_pci_map_pe_dma_window, OPAL_PCI_MAP_PE_DMA_WINDOW);
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OPAL_CALL(opal_pci_map_pe_dma_window_real, OPAL_PCI_MAP_PE_DMA_WINDOW_REAL);
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OPAL_CALL(opal_pci_reset, OPAL_PCI_RESET);
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2011-11-30 02:22:50 +08:00
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OPAL_CALL(opal_pci_get_hub_diag_data, OPAL_PCI_GET_HUB_DIAG_DATA);
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OPAL_CALL(opal_pci_get_phb_diag_data, OPAL_PCI_GET_PHB_DIAG_DATA);
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OPAL_CALL(opal_pci_fence_phb, OPAL_PCI_FENCE_PHB);
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OPAL_CALL(opal_pci_reinit, OPAL_PCI_REINIT);
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OPAL_CALL(opal_pci_mask_pe_error, OPAL_PCI_MASK_PE_ERROR);
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OPAL_CALL(opal_set_slot_led_status, OPAL_SET_SLOT_LED_STATUS);
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OPAL_CALL(opal_get_epow_status, OPAL_GET_EPOW_STATUS);
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2015-07-08 19:06:01 +08:00
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OPAL_CALL(opal_get_dpo_status, OPAL_GET_DPO_STATUS);
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2011-11-30 02:22:50 +08:00
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OPAL_CALL(opal_set_system_attention_led, OPAL_SET_SYSTEM_ATTENTION_LED);
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2013-06-20 13:21:05 +08:00
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OPAL_CALL(opal_pci_next_error, OPAL_PCI_NEXT_ERROR);
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OPAL_CALL(opal_pci_poll, OPAL_PCI_POLL);
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2013-04-26 03:20:59 +08:00
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OPAL_CALL(opal_pci_msi_eoi, OPAL_PCI_MSI_EOI);
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2013-06-20 13:21:05 +08:00
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OPAL_CALL(opal_pci_get_phb_diag_data2, OPAL_PCI_GET_PHB_DIAG_DATA2);
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2013-07-15 11:03:09 +08:00
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OPAL_CALL(opal_xscom_read, OPAL_XSCOM_READ);
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OPAL_CALL(opal_xscom_write, OPAL_XSCOM_WRITE);
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OPAL_CALL(opal_lpc_read, OPAL_LPC_READ);
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OPAL_CALL(opal_lpc_write, OPAL_LPC_WRITE);
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2013-08-21 11:03:20 +08:00
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OPAL_CALL(opal_return_cpu, OPAL_RETURN_CPU);
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2014-05-20 09:01:28 +08:00
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OPAL_CALL(opal_reinit_cpus, OPAL_REINIT_CPUS);
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powerpc/powernv: Read OPAL error log and export it through sysfs
Based on a patch by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
This patch adds support to read error logs from OPAL and export
them to userspace through a sysfs interface.
We export each log entry as a directory in /sys/firmware/opal/elog/
Currently, OPAL will buffer up to 128 error log records, we don't
need to have any knowledge of this limit on the Linux side as that
is actually largely transparent to us.
Each error log entry has the following files: id, type, acknowledge, raw.
Currently we just export the raw binary error log in the 'raw' attribute.
In a future patch, we may parse more of the error log to make it a bit
easier for userspace (e.g. to be able to display a brief summary in
petitboot without having to have a full parser).
If we have >128 logs from OPAL, we'll only be notified of 128 until
userspace starts acknowledging them. This limitation may be lifted in
the future and with this patch, that should "just work" from the linux side.
A userspace daemon should:
- wait for error log entries using normal mechanisms (we announce creation)
- read error log entry
- save error log entry safely to disk
- acknowledge the error log entry
- rinse, repeat.
On the Linux side, we read the error log when we're notified of it. This
possibly isn't ideal as it would be better to only read them on-demand.
However, this doesn't really work with current OPAL interface, so we
read the error log immediately when notified at the moment.
I've tested this pretty extensively and am rather confident that the
linux side of things works rather well. There is currently an issue with
the service processor side of things for >128 error logs though.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-02-28 08:58:32 +08:00
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OPAL_CALL(opal_read_elog, OPAL_ELOG_READ);
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OPAL_CALL(opal_send_ack_elog, OPAL_ELOG_ACK);
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OPAL_CALL(opal_get_elog_size, OPAL_ELOG_SIZE);
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OPAL_CALL(opal_resend_pending_logs, OPAL_ELOG_RESEND);
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OPAL_CALL(opal_write_elog, OPAL_ELOG_WRITE);
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2013-10-24 18:34:58 +08:00
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OPAL_CALL(opal_validate_flash, OPAL_FLASH_VALIDATE);
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OPAL_CALL(opal_manage_flash, OPAL_FLASH_MANAGE);
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OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE);
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2014-02-26 08:08:43 +08:00
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OPAL_CALL(opal_resync_timebase, OPAL_RESYNC_TIMEBASE);
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2016-07-08 14:37:11 +08:00
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OPAL_CALL_REAL(opal_rm_resync_timebase, OPAL_RESYNC_TIMEBASE);
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2014-08-19 12:47:59 +08:00
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OPAL_CALL(opal_check_token, OPAL_CHECK_TOKEN);
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2014-03-03 07:25:42 +08:00
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OPAL_CALL(opal_dump_init, OPAL_DUMP_INIT);
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OPAL_CALL(opal_dump_info, OPAL_DUMP_INFO);
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OPAL_CALL(opal_dump_info2, OPAL_DUMP_INFO2);
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OPAL_CALL(opal_dump_read, OPAL_DUMP_READ);
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OPAL_CALL(opal_dump_ack, OPAL_DUMP_ACK);
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2013-11-18 18:05:58 +08:00
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OPAL_CALL(opal_get_msg, OPAL_GET_MSG);
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2016-06-29 11:38:39 +08:00
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OPAL_CALL(opal_write_oppanel_async, OPAL_WRITE_OPPANEL_ASYNC);
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2013-11-18 18:05:58 +08:00
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OPAL_CALL(opal_check_completion, OPAL_CHECK_ASYNC_COMPLETION);
|
2014-03-03 07:25:42 +08:00
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OPAL_CALL(opal_dump_resend_notification, OPAL_DUMP_RESEND);
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2014-01-15 14:02:04 +08:00
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OPAL_CALL(opal_sync_host_reboot, OPAL_SYNC_HOST_REBOOT);
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2014-03-07 13:33:27 +08:00
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OPAL_CALL(opal_sensor_read, OPAL_SENSOR_READ);
|
2014-03-07 13:32:09 +08:00
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OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
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OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
|
2014-07-29 21:10:07 +08:00
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OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
|
2016-07-08 14:37:11 +08:00
|
|
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OPAL_CALL_REAL(opal_rm_handle_hmi, OPAL_HANDLE_HMI);
|
2015-04-20 13:02:58 +08:00
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OPAL_CALL(opal_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE);
|
2016-07-08 14:37:11 +08:00
|
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OPAL_CALL_REAL(opal_rm_config_cpu_idle_state, OPAL_CONFIG_CPU_IDLE_STATE);
|
2014-12-10 02:56:53 +08:00
|
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OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG);
|
2014-08-09 13:45:45 +08:00
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OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
|
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OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
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2015-02-17 17:01:54 +08:00
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OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CAPI_MODE);
|
2014-10-14 16:38:36 +08:00
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OPAL_CALL(opal_tpo_write, OPAL_WRITE_TPO);
|
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OPAL_CALL(opal_tpo_read, OPAL_READ_TPO);
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2014-11-06 11:38:27 +08:00
|
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OPAL_CALL(opal_ipmi_send, OPAL_IPMI_SEND);
|
|
|
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OPAL_CALL(opal_ipmi_recv, OPAL_IPMI_RECV);
|
2014-12-14 02:01:05 +08:00
|
|
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OPAL_CALL(opal_i2c_request, OPAL_I2C_REQUEST);
|
2015-04-01 14:05:30 +08:00
|
|
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OPAL_CALL(opal_flash_read, OPAL_FLASH_READ);
|
|
|
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OPAL_CALL(opal_flash_write, OPAL_FLASH_WRITE);
|
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|
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OPAL_CALL(opal_flash_erase, OPAL_FLASH_ERASE);
|
2015-06-04 21:51:47 +08:00
|
|
|
OPAL_CALL(opal_prd_msg, OPAL_PRD_MSG);
|
2015-08-20 00:49:52 +08:00
|
|
|
OPAL_CALL(opal_leds_get_ind, OPAL_LEDS_GET_INDICATOR);
|
|
|
|
OPAL_CALL(opal_leds_set_ind, OPAL_LEDS_SET_INDICATOR);
|
2015-11-27 14:23:07 +08:00
|
|
|
OPAL_CALL(opal_console_flush, OPAL_CONSOLE_FLUSH);
|
2016-05-20 14:41:41 +08:00
|
|
|
OPAL_CALL(opal_get_device_tree, OPAL_GET_DEVICE_TREE);
|
|
|
|
OPAL_CALL(opal_pci_get_presence_state, OPAL_PCI_GET_PRESENCE_STATE);
|
|
|
|
OPAL_CALL(opal_pci_get_power_state, OPAL_PCI_GET_POWER_STATE);
|
|
|
|
OPAL_CALL(opal_pci_set_power_state, OPAL_PCI_SET_POWER_STATE);
|
2016-07-08 14:37:05 +08:00
|
|
|
OPAL_CALL(opal_int_get_xirr, OPAL_INT_GET_XIRR);
|
2016-11-21 13:01:36 +08:00
|
|
|
OPAL_CALL_REAL(opal_rm_int_get_xirr, OPAL_INT_GET_XIRR);
|
2016-07-08 14:37:05 +08:00
|
|
|
OPAL_CALL(opal_int_set_cppr, OPAL_INT_SET_CPPR);
|
|
|
|
OPAL_CALL(opal_int_eoi, OPAL_INT_EOI);
|
2016-11-21 13:01:36 +08:00
|
|
|
OPAL_CALL_REAL(opal_rm_int_eoi, OPAL_INT_EOI);
|
2016-07-08 14:37:05 +08:00
|
|
|
OPAL_CALL(opal_int_set_mfrr, OPAL_INT_SET_MFRR);
|
2016-11-21 13:01:36 +08:00
|
|
|
OPAL_CALL_REAL(opal_rm_int_set_mfrr, OPAL_INT_SET_MFRR);
|
2016-07-08 14:37:11 +08:00
|
|
|
OPAL_CALL(opal_pci_tce_kill, OPAL_PCI_TCE_KILL);
|
|
|
|
OPAL_CALL_REAL(opal_rm_pci_tce_kill, OPAL_PCI_TCE_KILL);
|