openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity
linux/arch/powerpc/platforms/85xx/Kconfig

345 lines
7.9 KiB
Plaintext
Raw Normal View History

powerpc/85xx: Kconfig cleanup Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ based chips. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-17 07:31:48 +08:00
menuconfig FSL_SOC_BOOKE
bool "Freescale Book-E Machine Type"
depends on PPC_85xx || PPC_BOOK3E
select FSL_SOC
[POWERPC] 85xx: rework platform Kconfig * Allow multiple boards to be selected in a single build * Removed Kconfig option '85xx' which existed only for compat with arch/ppc * Added a multiplatform 85xx defconfig (mpc85xx_defconfig). This builds all 85xx boards except sbc8560 and stx_gp3 since these to boards have board specific ifdef in driver code that may break all other boards Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-29 00:24:30 +08:00
select PPC_UDBG_16550
select MPIC
powerpc: pci config cleanup Choosing PCI or not at config time is allowed on some platforms via an if expression in arch/powerpc/Kconfig. To add a new platform with PCI support selectable at config time, you must change the if expression. This patch makes this easier by changing: bool "PCI support" if <long expression> to bool "PCI support" if PPC_PCI_CHOICE and adding select PPC_PCI_CHOICE to all the config nodes that were previously in the PCI if expression. Platforms with unconditional PCI support continue to just select PCI in their config nodes. Signed-off-by: John Rigby <jrigby@freescale.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-27 01:07:56 +08:00
select PPC_PCI_CHOICE
[POWERPC] 85xx: rework platform Kconfig * Allow multiple boards to be selected in a single build * Removed Kconfig option '85xx' which existed only for compat with arch/ppc * Added a multiplatform 85xx defconfig (mpc85xx_defconfig). This builds all 85xx boards except sbc8560 and stx_gp3 since these to boards have board specific ifdef in driver code that may break all other boards Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-29 00:24:30 +08:00
select FSL_PCI if PCI
powerpc/85xx: fix Kconfig warning about missing 8250 dependency The SERIAL_8250_EXTENDED option just enables access to other less regularly used options, like SERIAL_8250_SHARE_IRQ. Select it to get rid of this warning when selecting the child option living underneath it. warning: (FSL_SOC_BOOKE && SERIAL_8250_RM9K) selects SERIAL_8250_SHARE_IRQ which has unmet direct dependencies (HAS_IOMEM && SERIAL_8250_EXTENDED) Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-20 09:23:20 +08:00
select SERIAL_8250_EXTENDED if SERIAL_8250
[POWERPC] 85xx: rework platform Kconfig * Allow multiple boards to be selected in a single build * Removed Kconfig option '85xx' which existed only for compat with arch/ppc * Added a multiplatform 85xx defconfig (mpc85xx_defconfig). This builds all 85xx boards except sbc8560 and stx_gp3 since these to boards have board specific ifdef in driver code that may break all other boards Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-29 00:24:30 +08:00
select SERIAL_8250_SHARE_IRQ if SERIAL_8250
default y
powerpc/85xx: Kconfig cleanup Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ based chips. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-17 07:31:48 +08:00
if FSL_SOC_BOOKE
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-26 14:04:21 +08:00
powerpc/fsl-booke: Add support for FSL 64-bit e5500 core The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 21:32:11 +08:00
if PPC32
powerpc/85xx: Add missing config option for CACHE SRAM code fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that qualifies and wants to make use of the CACHE SRAM's exported API (i.e. a freescale net driver) should (be able to) select this config option. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-31 18:15:20 +08:00
config FSL_85XX_CACHE_SRAM
bool
select PPC_LIB_RHEAP
help
When selected, this option enables cache-sram support
for memory allocation on P1/P2 QorIQ platforms.
cache-sram-size and cache-sram-offset kernel boot
parameters should be passed when this option is enabled.
powerpc/85xx: Add BSC9131 RDB Support BSC9131RDB is a Freescale reference design board for BSC9131 SoC. The BSC9131 is integrated SoC that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements. The BSC9131 SoC includes the following function and features: . Power Architecture subsystem including a e500 processor with 256-Kbyte shared L2 cache . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache . The Multi Accelerator Platform Engine for Femto BaseStation Baseband Processing (MAPLE-B2F) . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding, Fourier Transforms, UMTS chip rate processing, LTE UP/DL Channel processing, and CRC algorithms . Consists of accelerators for Convolution, Filtering, Turbo Encoding, Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix Inversion operations . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with ECC, up to 400-MHz clock/800 MHz data rate . Dedicated security engine featuring trusted boot . DMA controller . OCNDMA with four bidirectional channels . Interfaces . Two triple-speed Gigabit Ethernet controllers featuring network acceleration including IEEE 1588. v2 hardware support and virtualization (eTSEC) . eTSEC 1 supports RGMII/RMII . eTSEC 2 supports RGMII . High-speed USB 2.0 host and device controller with ULPI interface . Enhanced secure digital (SD/MMC) host controller (eSDHC) . Antenna interface controller (AIC), supporting three industry standard JESD207/three custom ADI RF interfaces (two dual port and one single port) and three MAXIM's MaxPHY serial interfaces . ADI lanes support both full duplex FDD support and half duplex TDD support . Universal Subscriber Identity Module (USIM) interface that facilitates communication to SIM cards or Eurochip pre-paid phone cards . TDM with one TDM port . Two DUART, four eSPI, and two I2C controllers . Integrated Flash memory controller (IFC) . TDM with 256 channels . GPIO . Sixteen 32-bit timers The DSP portion of the SoC consists of DSP core (SC3850) and various accelerators pertaining to DSP operations. BSC9131RDB Overview ---------------------- BSC9131 SoC 1Gbyte DDR3 (on board DDR) 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory USB-ULPI eTSEC1: Connected to RGMII PHY eTSEC2: Connected to RGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Linux runs on e500v2 core and access some DSP peripherals like AIC Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-22 12:54:15 +08:00
config BSC9131_RDB
bool "Freescale BSC9131RDB"
select DEFAULT_UIMAGE
help
This option enables support for the Freescale BSC9131RDB board.
The BSC9131 is a heterogeneous SoC containing an e500v2 powerpc and a
StarCore SC3850 DSP
Manufacturer : Freescale Semiconductor, Inc
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-26 14:04:21 +08:00
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
powerpc: Make uImage default build output for MPC8540 ADS When we build for the MPC8540 ADS produce a uImage by default. Updated the defconfig to reflect this as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-03-28 13:44:37 +08:00
select DEFAULT_UIMAGE
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-26 14:04:21 +08:00
help
[PATCH] powerpc: Updated Initial MPC8540 ADS port with OF Flat Dev Updated patch for support for mpc8540_ads in arch/powerpc with a flat OF device tree. This patch does not yet support PCI or I2C. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-15 06:57:39 +08:00
This option enables support for the MPC 8540 ADS board
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-26 14:04:21 +08:00
POWERPC: Add support for the mpc8560 eval board This makes the 8560 evaluation board fully supported under arch/powerpc, as the first board with CPM2 SoC peripherals. The brand new devicetree nodes are introduced (intending to be a subset of the QuiccEngine-equipped models, with dts sources placed into the kernel according to the new convention. Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART update), the both TSEC eth ,FCC Eths, and both SCC UARTs are working. The relevant drivers are still capable to drive users in ppc, which was verified with 8272ADS (SCC uart+FCC eth). This is also verified on mpc8540 and actually make it work (PCI stuff working as well) Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-22 02:31:26 +08:00
config MPC8560_ADS
bool "Freescale MPC8560 ADS"
select DEFAULT_UIMAGE
[POWERPC] CPM2: Make support for the CPM2 optional on 8560 based boards Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 07:41:25 +08:00
select CPM2
POWERPC: Add support for the mpc8560 eval board This makes the 8560 evaluation board fully supported under arch/powerpc, as the first board with CPM2 SoC peripherals. The brand new devicetree nodes are introduced (intending to be a subset of the QuiccEngine-equipped models, with dts sources placed into the kernel according to the new convention. Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART update), the both TSEC eth ,FCC Eths, and both SCC UARTs are working. The relevant drivers are still capable to drive users in ppc, which was verified with 8272ADS (SCC uart+FCC eth). This is also verified on mpc8540 and actually make it work (PCI stuff working as well) Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-22 02:31:26 +08:00
help
This option enables support for the MPC 8560 ADS board
Add 85xx CDS to arch/powerpc This patch adds support for 85xx CDS support to arch/powerpc Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-04-03 06:42:40 +08:00
config MPC85xx_CDS
bool "Freescale MPC85xx CDS"
select DEFAULT_UIMAGE
[POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line. The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy 8259 interrupt controller pair contained within a VIA VT82C686B Southbridge on the main carrier board. The processor complex plugs into the carrier card using a PCI slot which limits the available interrupts to the INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed through a gate array and connected to the PCI INTA interrupt line. The normal interrupt chaining hook (set_irq_chained_handler) does not allow sharing of the chained interrupt which prevents the use of PCI INTA by PCI devices. This patch allows the 8259 cascade pair to share their interrupt line with PCI devices. NOTE: The addition of the .end routine for the MPIC is not strictly necessary for this patch. It's there so this code will run from within the threaded interrupt context used by the Real Time patch. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-06-07 07:26:15 +08:00
select PPC_I8259
powerpc/85xx: mpc8548cds - Add RapidIO node to dts Enable RapidIO and add rapidio and rmu nodes to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-06 17:06:41 +08:00
select HAS_RAPIDIO
Add 85xx CDS to arch/powerpc This patch adds support for 85xx CDS support to arch/powerpc Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-04-03 06:42:40 +08:00
help
This option enables support for the MPC85xx CDS board
[POWERPC] 85xx: Renamed MPC8568 MDS board code to match other boards Renamed the MPC8568 MDS platform code to follow other 85xx boards. There isn't anything specific about the 8568 MDS code that wouldn't apply to another 85xx MDS system at this point. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-18 06:29:36 +08:00
config MPC85xx_MDS
bool "Freescale MPC85xx MDS"
[POWERPC] 85xx: Add support for the 8568 MDS board Add support for the MPC8568 MDS reference board Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-10 07:28:31 +08:00
select DEFAULT_UIMAGE
[POWERPC] 85xx: MPC85xx MDS - Unconditionally select PHYLIB for board fixups The MPC85xx MDS board requires some board level tweaks of the PHYs that either the eTSEC (gianfar) or UCC ethernet controllers are connected to. Its possible to build the phylib as a module, however this breaks the board level fix ups because phy_read and phy_write are not available if we build as a module. So we unconditionally select PHYLIB to ensure its built into the kernel if we are building in MPC85xx MDS support. This was determined to be the easiest soultion even though it prevents the user from removing PHYLIB support if they decide they don't want it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-04 02:36:19 +08:00
select PHYLIB
powerpc/85xx: Enable Serial RapidIO for MPC85xx MDS boards Select HAS_RAPIDIO symbol and add rio nodes for MPC8568E-MDS and MPC8569E-MDS boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-02 10:16:56 +08:00
select HAS_RAPIDIO
powerpc/85xx: Add SWIOTLB support to FSL boards Add the platform-specific code for enabling SWIOTLB if needed on P2020DS, MPC85xx DS, and MPC85xx MDS boards as they are capable of having >4G of memory. We determine if we need to enable swiotlb based on how much memory is in the board and if it exceeds 4G or what we can map via PCI inbound windows. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-15 13:37:35 +08:00
select SWIOTLB
[POWERPC] 85xx: Add support for the 8568 MDS board Add support for the MPC8568 MDS reference board Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-10 07:28:31 +08:00
help
[POWERPC] 85xx: Renamed MPC8568 MDS board code to match other boards Renamed the MPC8568 MDS platform code to follow other 85xx boards. There isn't anything specific about the 8568 MDS code that wouldn't apply to another 85xx MDS system at this point. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-18 06:29:36 +08:00
This option enables support for the MPC85xx MDS board
[POWERPC] 85xx: Add support for the 8568 MDS board Add support for the MPC8568 MDS reference board Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-10 07:28:31 +08:00
powerpc/85xx: Add support for MPC8536DS Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-02 14:36:15 +08:00
config MPC8536_DS
bool "Freescale MPC8536 DS"
select DEFAULT_UIMAGE
powerpc/85xx: Add SWIOTLB support to FSL boards Add the platform-specific code for enabling SWIOTLB if needed on P2020DS, MPC85xx DS, and MPC85xx MDS boards as they are capable of having >4G of memory. We determine if we need to enable swiotlb based on how much memory is in the board and if it exceeds 4G or what we can map via PCI inbound windows. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-15 13:37:35 +08:00
select SWIOTLB
powerpc/85xx: Add support for MPC8536DS Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-02 14:36:15 +08:00
help
This option enables support for the MPC8536 DS board
[POWERPC] 85xx: Renamed mpc8544_ds.c to mpc85xx_ds.c Renamed the mpc8544_ds.c board code to mpc85xx_ds.c to make it more generic in prep for other boards based on the same platform. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-17 22:22:09 +08:00
config MPC85xx_DS
bool "Freescale MPC85xx DS"
[POWERPC] Add basic PCI/PCI Express support for 8544DS board Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-13 18:05:08 +08:00
select PPC_I8259
[POWERPC] 85xx: Add initial MPC8544 DS platform files. This patch provides the basic MPC8544 DS platform code and config. Follow-up patches will add peripherals such as PCI and SATA. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-21 00:19:10 +08:00
select DEFAULT_UIMAGE
powerpc/85xx/86xx: Fix build w/ CONFIG_PCI=n Currently some MPC85xx and MPC86xx boards fail to build without CONFIG_PCI: arch/powerpc/platforms/fsl_uli1575.c: In function 'quirk_final_uli5249': arch/powerpc/platforms/fsl_uli1575.c:234: error: implicit declaration of function 'pci_bus_for_each_resource' arch/powerpc/platforms/fsl_uli1575.c:234: error: expected ';' before '{' token cc1: warnings being treated as errors arch/powerpc/platforms/fsl_uli1575.c:223: warning: unused variable 'dummy' make[1]: *** [arch/powerpc/platforms/fsl_uli1575.o] Error 1 This patch fixes the issue by appending 'if PCI' condition when selecting FSL_ULI1575 Kconfig symbol. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-17 03:07:24 +08:00
select FSL_ULI1575 if PCI
powerpc/85xx: Add SWIOTLB support to FSL boards Add the platform-specific code for enabling SWIOTLB if needed on P2020DS, MPC85xx DS, and MPC85xx MDS boards as they are capable of having >4G of memory. We determine if we need to enable swiotlb based on how much memory is in the board and if it exceeds 4G or what we can map via PCI inbound windows. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-15 13:37:35 +08:00
select SWIOTLB
[POWERPC] 85xx: Add initial MPC8544 DS platform files. This patch provides the basic MPC8544 DS platform code and config. Follow-up patches will add peripherals such as PCI and SATA. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-21 00:19:10 +08:00
help
[POWERPC] 85xx: Renamed mpc8544_ds.c to mpc85xx_ds.c Renamed the mpc8544_ds.c board code to mpc85xx_ds.c to make it more generic in prep for other boards based on the same platform. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-17 22:22:09 +08:00
This option enables support for the MPC85xx DS (MPC8544 DS) board
[POWERPC] 85xx: Add initial MPC8544 DS platform files. This patch provides the basic MPC8544 DS platform code and config. Follow-up patches will add peripherals such as PCI and SATA. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-21 00:19:10 +08:00
powerpc/85xx: Add support for P2020RDB board Add support for the P2020RDB reference board from Freescale. Overview of P2020RDB platform - DDR DDR2 1G - NOR Flash 16MByte - NAND Flash 32MByte - 3 Ethernet interfaces 1) etSEC1 - RGMII - connected to a 5 port Vitesse Switch(VSC7385) - Switch is memory mapped through eLBC interface(CS#2) - IRQ1 2) etSEC2 - SGMII - connected to VSC8221 - IRQ2 3) etSEC3 - RGMII - connected to VSC8641 - IRQ3 - 2 1X PCIe interfaces - SD/MMC ,USB - SPI EEPROM - Serial I2C EEPROM Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-07 23:35:16 +08:00
config MPC85xx_RDB
bool "Freescale MPC85xx RDB"
select PPC_I8259
select DEFAULT_UIMAGE
powerpc/85xx/86xx: Fix build w/ CONFIG_PCI=n Currently some MPC85xx and MPC86xx boards fail to build without CONFIG_PCI: arch/powerpc/platforms/fsl_uli1575.c: In function 'quirk_final_uli5249': arch/powerpc/platforms/fsl_uli1575.c:234: error: implicit declaration of function 'pci_bus_for_each_resource' arch/powerpc/platforms/fsl_uli1575.c:234: error: expected ';' before '{' token cc1: warnings being treated as errors arch/powerpc/platforms/fsl_uli1575.c:223: warning: unused variable 'dummy' make[1]: *** [arch/powerpc/platforms/fsl_uli1575.o] Error 1 This patch fixes the issue by appending 'if PCI' condition when selecting FSL_ULI1575 Kconfig symbol. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-17 03:07:24 +08:00
select FSL_ULI1575 if PCI
powerpc/85xx: Add support for P2020RDB board Add support for the P2020RDB reference board from Freescale. Overview of P2020RDB platform - DDR DDR2 1G - NOR Flash 16MByte - NAND Flash 32MByte - 3 Ethernet interfaces 1) etSEC1 - RGMII - connected to a 5 port Vitesse Switch(VSC7385) - Switch is memory mapped through eLBC interface(CS#2) - IRQ1 2) etSEC2 - SGMII - connected to VSC8221 - IRQ2 3) etSEC3 - RGMII - connected to VSC8641 - IRQ3 - 2 1X PCIe interfaces - SD/MMC ,USB - SPI EEPROM - Serial I2C EEPROM Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-07 23:35:16 +08:00
select SWIOTLB
help
This option enables support for the MPC85xx RDB (P2020 RDB) board
powerpc/85xx: Add P1010RDB board support P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-03 04:28:08 +08:00
config P1010_RDB
bool "Freescale P1010RDB"
select DEFAULT_UIMAGE
help
This option enables support for the MPC85xx RDB (P1010 RDB) board
P1010RDB contains P1010Si, which provides CPU performance up to 800
MHz and 1600 DMIPS, additional functionality and faster interfaces
(DDR3/3L, SATA II, and PCI Express).
powerpc/85xx: Introduce support for the Freescale P1022DS reference board Introduce basic support for the Freescale P1022DS reference board, based on the Freescale BSP for this board. This patch excludes the DIU, SSI, and MMC/SD drivers. Only a 36-bit DTS is provided. Update mpc86xx_smp_defconfig and mpc85xx_defconfig to support the P1022DS. This means enabling 64-bit physical address support, increasing the maximum zone order to 12 (to allow the DIU driver to allocate large chunks), and clean up the audio options to disable the deprecated OSS support. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-03 06:25:03 +08:00
config P1022_DS
bool "Freescale P1022 DS"
select DEFAULT_UIMAGE
select SWIOTLB
help
This option enables support for the Freescale P1022DS reference board.
powerpc/85xx: introduce support for the Freescale / iVeia P1022RDK The Freescale / iVeia P1022RDK reference board is a small-factor board with a Freescale P1022 SOC. It includes: 1) 512 MB 64-bit DDR3-800 (max) memory 2) 8MB SPI serial flash memory for boot loader 3) Bootable 4-bit SD/MMC port 4) Two 10/100/1000 Ethernet connectors 5) One SATA port 6) Two USB ports 7) One PCIe x4 slot 8) DVI video connector 9) Audio input and output jacks, powered by a Wolfson WM8960 codec. Unlike the P1022DS, the P1022RDK does not have any localbus devices, presumably because of the localbus / DIU multiplexing restriction of the P1022 SOC. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-07-24 07:12:29 +08:00
config P1022_RDK
bool "Freescale / iVeia P1022 RDK"
select DEFAULT_UIMAGE
help
This option enables support for the Freescale / iVeia P1022RDK
reference board.
powerpc/85xx: Add basic P1023RDS board support The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-20 09:20:13 +08:00
config P1023_RDS
powerpc/85xx: Add P1023RDB board support P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-31 05:39:26 +08:00
bool "Freescale P1023 RDS/RDB"
powerpc/85xx: Add basic P1023RDS board support The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-20 09:20:13 +08:00
select DEFAULT_UIMAGE
help
powerpc/85xx: Add P1023RDB board support P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-31 05:39:26 +08:00
This option enables support for the P1023 RDS and RDB boards
powerpc/85xx: Add basic P1023RDS board support The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-20 09:20:13 +08:00
powerpc/85xx: Add support for the "socrates" board (MPC8544). Supported are Ethernet, serial console, I2C, I2C-based RTC and temperature sensors, NOR and NAND flash, PCI, USB, CAN and Lime display controller. The multiplexing of FPGA interrupts onto PowerPC interrupt lines is supported through our own fpga_pic interrupt controller driver. For example the SJA1000 controller is level low sensitive connected to fpga_pic line 2 and is routed to the second (of three) irq lines to the CPU: can@3,100 { compatible = "philips,sja1000"; reg = <3 0x100 0x80>; interrupts = <2 2>; interrupts = <2 8 1>; // number, type, routing interrupt-parent = <&fpga_pic>; }; Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-22 21:58:43 +08:00
config SOCRATES
bool "Socrates"
select DEFAULT_UIMAGE
help
This option enables support for the Socrates board.
[POWERPC] 85xx: Emerson KSI8560 base support The KSI8560 is a single compact, mid-, or full-size Advanced Mezzanine Card (AdvancedMC™) based on the Freescale™ Semiconductor MPC8560 PowerQUICC III™ microprocessor. This product will serve in data and signaling applications such as signaling gateways (SGW) and softswitch signaling interface cards. The board has altera maxii CPLD, that is used to obtain and manage board configuration. Also there are two SCC UART serial consoles and FCC ethernet, that is routed to the front panel, while other ethernet controlers (TSEC's) are routed to the backplane. Signed-off-by: Alexandr Smirnov <asmirnov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-06 23:17:16 +08:00
config KSI8560
bool "Emerson KSI8560"
select DEFAULT_UIMAGE
help
This option enables support for the Emerson KSI8560 board
powerpc/85xx: Add platform support for X-ES MPC85xx boards Add support for X-ES single-board computers based on the Freescale MPC85xx processors. Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 03:42:58 +08:00
config XES_MPC85xx
bool "X-ES single-board computer"
select DEFAULT_UIMAGE
help
This option enables support for the various single-board
computers from Extreme Engineering Solutions (X-ES) based on
Freescale MPC85xx processors.
Manufacturer: Extreme Engineering Solutions, Inc.
URL: <http://www.xes-inc.com/>
[POWERPC] 85xx: Port STX GP3 board over from arch/ppc Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-24 13:42:44 +08:00
config STX_GP3
bool "Silicon Turnkey Express GP3"
help
This option enables support for the Silicon Turnkey Express GP3
board.
[POWERPC] CPM2: Make support for the CPM2 optional on 8560 based boards Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 07:41:25 +08:00
select CPM2
[POWERPC] 85xx: Port STX GP3 board over from arch/ppc Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-24 13:42:44 +08:00
select DEFAULT_UIMAGE
[POWERPC] 85xx: Port TQM85xx boards over from arch/ppc Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 13:53:03 +08:00
config TQM8540
bool "TQ Components TQM8540"
help
This option enables support for the TQ Components TQM8540 board.
select DEFAULT_UIMAGE
select TQM85xx
config TQM8541
bool "TQ Components TQM8541"
help
This option enables support for the TQ Components TQM8541 board.
select DEFAULT_UIMAGE
select TQM85xx
select CPM2
powerpc/85xx: add board support for the TQM8548 modules This patch adds support for the TQM8548 modules from TQ-Components GmbH (http://www.tqc.de). Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-06 19:50:04 +08:00
config TQM8548
bool "TQ Components TQM8548"
help
This option enables support for the TQ Components TQM8548 board.
select DEFAULT_UIMAGE
select TQM85xx
[POWERPC] 85xx: Port TQM85xx boards over from arch/ppc Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 13:53:03 +08:00
config TQM8555
bool "TQ Components TQM8555"
help
This option enables support for the TQ Components TQM8555 board.
select DEFAULT_UIMAGE
select TQM85xx
select CPM2
config TQM8560
bool "TQ Components TQM8560"
help
This option enables support for the TQ Components TQM8560 board.
select DEFAULT_UIMAGE
select TQM85xx
select CPM2
[POWERPC] 85xx: Add basic support for Wind River SBC8548 board This adds the basic support for the Wind River SBC8548 board, implemented as powerpc. It closely follows the implementation of the MPC8548CDS. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 07:41:27 +08:00
config SBC8548
bool "Wind River SBC8548"
select DEFAULT_UIMAGE
help
This option enables support for the Wind River SBC8548 board
powerpc/85xx: Board support for ppa8548 Initial board support for the Prodrive PPA8548 AMC module. Board is an MPC8548 AMC platform used in RapidIO systems. This module is also used to test/work on mainline linux RapidIO software. PPA8548 overview: - 1.3 GHz Freescale PowerQUICC III MPC8548 processor - 1 GB DDR2 @ 266 MHz - 8 MB NOR flash - Serial RapidIO 1.2 - 1 x 10/100/1000 BASE-T front ethernet - 1 x 1000 BASE-BX ethernet on AMC connector Signed-off-by: Stef van Os <stef.van.os@prodrive.nl> Acked-by: Timur Tabi <timur@tabi.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-02-13 22:09:00 +08:00
config PPA8548
bool "Prodrive PPA8548"
help
This option enables support for the Prodrive PPA8548 board.
select DEFAULT_UIMAGE
select HAS_RAPIDIO
powerpc/85xx: Board support for GE IMP3A Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-13 01:13:00 +08:00
config GE_IMP3A
bool "GE Intelligent Platforms IMP3A"
select DEFAULT_UIMAGE
select SWIOTLB
select MMIO_NVRAM
select ARCH_REQUIRE_GPIOLIB
select GE_FPGA
help
This option enables support for the GE Intelligent Platforms IMP3A
board.
This board is a 3U CompactPCI Single Board Computer with a Freescale
P2020 processor.
powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c There's only p2041rdb board for official release, but the p2041 silicon on the board can be converted to p2040 silicon without XAUI and L2 cache function, then the board becomes p2040rdb board. so we use the file name p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also consistent with the board name under U-Boot. During the rename we make few other minor changes to the device tree: * Move USB phy setting into p2041si.dtsi as its SoC not board defined * Convert PCI clock-frequency to decimal to be more readable Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-08-26 18:45:03 +08:00
config P2041_RDB
bool "Freescale P2041 RDB"
powerpc/85xx: Add p2040 RDB board support P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-28 15:52:34 +08:00
select DEFAULT_UIMAGE
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
gpio: move mpc8xxx/512x gpio driver to drivers/gpio Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-21 18:49:20 +08:00
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
powerpc/85xx: Add p2040 RDB board support P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-28 15:52:34 +08:00
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
help
powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c There's only p2041rdb board for official release, but the p2041 silicon on the board can be converted to p2040 silicon without XAUI and L2 cache function, then the board becomes p2040rdb board. so we use the file name p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also consistent with the board name under U-Boot. During the rename we make few other minor changes to the device tree: * Move USB phy setting into p2041si.dtsi as its SoC not board defined * Convert PCI clock-frequency to decimal to be more readable Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-08-26 18:45:03 +08:00
This option enables support for the P2041 RDB board
powerpc/85xx: Add p2040 RDB board support P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-28 15:52:34 +08:00
powerpc/fsl-booke: Add p3041 DS board support The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:47:10 +08:00
config P3041_DS
bool "Freescale P3041 DS"
select DEFAULT_UIMAGE
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
gpio: move mpc8xxx/512x gpio driver to drivers/gpio Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-21 18:49:20 +08:00
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
powerpc/fsl-booke: Add p3041 DS board support The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:47:10 +08:00
select HAS_RAPIDIO
powerpc/85xx: add board support for the Freescale hypervisor Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 21:54:30 +08:00
select PPC_EPAPR_HV_PIC
powerpc/fsl-booke: Add p3041 DS board support The P3041DS is in the same family of boards as the P4080DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:47:10 +08:00
help
This option enables support for the P3041 DS board
powerpc/p4080: Add basic support for p4080ds platform Add basic support for the P4080 DS reference board. None of the data path devices (ethernet, crypto, pme) are support at this time. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-23 05:35:07 +08:00
config P4080_DS
bool "Freescale P4080 DS"
select DEFAULT_UIMAGE
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
gpio: move mpc8xxx/512x gpio driver to drivers/gpio Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-21 18:49:20 +08:00
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
powerpc/p4080: Add basic support for p4080ds platform Add basic support for the P4080 DS reference board. None of the data path devices (ethernet, crypto, pme) are support at this time. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-23 05:35:07 +08:00
select HAS_RAPIDIO
powerpc/85xx: add board support for the Freescale hypervisor Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 21:54:30 +08:00
select PPC_EPAPR_HV_PIC
powerpc/p4080: Add basic support for p4080ds platform Add basic support for the P4080 DS reference board. None of the data path devices (ethernet, crypto, pme) are support at this time. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-23 05:35:07 +08:00
help
This option enables support for the P4080 DS board
powerpc: Add support for CTS-1000 GPIO controlled system poweroff CTS-1000 is based on P4080. GPIO 27 is used to signal the FPGA to switch off power, and also associates IRQ 8 with front-panel button press (which we use to call orderly_poweroff()). The relevant device-tree looks like this: gpio0: gpio@130000 { compatible = "fsl,qoriq-gpio"; reg = <0x130000 0x1000>; interrupts = <55 2 0 0>; #gpio-cells = <2>; gpio-controller; /* Allows powering off the system via GPIO signal. */ gpio-halt@27 { compatible = "sgy,gpio-halt"; gpios = <&gpio0 27 0>; interrupts = <8 1 0 0>; }; }; Because the driver cannot match on sgy,gpio-halt (because the node is never processed through of_platform), it matches on fsl,qoriq-gpio and then checks child nodes for the matching sgy,gpio-halt. This also ensures that the GPIO controller is detected prior to sgy_cts1000's probe callback, since that node wont match via of_platform until the controller is registered. Also, because the GPIO handler for triggering system poweroff might sleep, the IRQ uses a workqueue to call orderly_poweroff(). As a final note, this driver may be expanded for other features specific to the CTS-1000. Signed-off-by: Ben Collins <ben.c@servergy.com> Cc: Jack Smith <jack.s@servergy.com> Cc: Vihar Rai <vihar.r@servergy.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-12-17 12:19:28 +08:00
config SGY_CTS1000
tristate "Servergy CTS-1000 support"
select GPIOLIB
select OF_GPIO
depends on P4080_DS
help
Enable this to support functionality in Servergy's CTS-1000 systems.
powerpc/fsl-booke: Add support for FSL 64-bit e5500 core The new e5500 core is similar to the e500mc core but adds 64-bit support. We support running it in 32-bit mode as it is identical to the e500mc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 21:32:11 +08:00
endif # PPC32
powerpc/fsl-booke: Add p5020 DS board support The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:05:47 +08:00
config P5020_DS
bool "Freescale P5020 DS"
select DEFAULT_UIMAGE
select E500
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
gpio: move mpc8xxx/512x gpio driver to drivers/gpio Move the driver to the place where it is expected to be nowadays. Also rename its CONFIG-name to match the rest and adapt the defconfigs. Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to the platforms, because this option is per-platform and not per-driver. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-21 18:49:20 +08:00
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
powerpc/fsl-booke: Add p5020 DS board support The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:05:47 +08:00
select HAS_RAPIDIO
powerpc/85xx: add board support for the Freescale hypervisor Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19 21:54:30 +08:00
select PPC_EPAPR_HV_PIC
powerpc/fsl-booke: Add p5020 DS board support The P5020DS is in the same family of boards as the P4080 DS and thus shares the corenet_ds code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-08 03:05:47 +08:00
help
This option enables support for the P5020 DS board
powerpc/85xx: Add support for P5040DS board Add support for the Freescale P5040DS Reference Board ("Superhydra"), which is similar to the P5020DS. Features of the P5040 are listed below, but not all of these features (e.g. DPAA networking) are currently supported. Four P5040 single-threaded e5500 cores built Up to 2.4 GHz with 64-bit ISA support Three levels of instruction: user, supervisor, hypervisor CoreNet platform cache (CPC) 2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Up to 1600MT/s Memory pre-fetch engine DPAA incorporating acceleration for the following functions Packet parsing, classification, and distribution (FMAN) Queue management for scheduling, packet sequencing and congestion management (QMAN) Hardware buffer management for buffer allocation and de-allocation (BMAN) Cryptography acceleration (SEC 5.0) at up to 40 Gbps SerDes 20 lanes at up to 5 Gbps Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces Two 10 Gbps Ethernet MACs Ten 1 Gbps Ethernet MACs High-speed peripheral interfaces Two PCI Express 2.0/3.0 controllers Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Two I2C controllers Four UARTs Integrated flash controller supporting NAND and NOR flash DMA Dual four channel Support for hardware virtualization and partitioning enforcement Extra privileged level for hypervisor support QorIQ Trust Architecture 1.1 Secure boot, secure debug, tamper detection, volatile key storage Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-07-26 23:08:54 +08:00
config P5040_DS
bool "Freescale P5040 DS"
select DEFAULT_UIMAGE
select E500
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
help
This option enables support for the P5040 DS board
powerpc/e500: add paravirt QEMU platform This gives the kernel a paravirtualized machine to target, without requiring both sides to pretend to be targeting a specific board that likely has little to do with the host in KVM scenarios. This avoids the need to add new boards to QEMU just to be able to run KVM on new CPUs. As this is the first platform that can run with either e500v2 or e500mc, CONFIG_PPC_E500MC is now a legitimately user configurable option, so add a help text. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-07-11 08:26:48 +08:00
config PPC_QEMU_E500
bool "QEMU generic e500 platform"
select DEFAULT_UIMAGE
help
This option enables support for running as a QEMU guest using
QEMU's generic e500 machine. This is not required if you're
using a QEMU machine that targets a specific board, such as
mpc8544ds.
Unlike most e500 boards that target a specific CPU, this
platform works with any e500-family CPU that QEMU supports.
Thus, you'll need to make sure CONFIG_PPC_E500MC is set or
unset based on the emulated CPU (or actual host CPU in the case
of KVM).
powerpc/fsl-booke: Add initial T4240QDS board support Some minor changes to the common corenet_ds.c code are needed to support the T4240QDS: * Add support for "fsl,qoriq-pcie-v3.0" controller * Bump max # of IRQs to 512 (T4240 supports more interrupts than previous SoCs). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-06 01:09:04 +08:00
if PPC64
config T4240_QDS
bool "Freescale T4240 QDS"
select DEFAULT_UIMAGE
select E500
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
help
This option enables support for the T4240 QDS board
powerpc/fsl-booke: Add B4_QDS board support - Add support for B4 board in board file b4_qds.c, It is common for B4860, B4420 and B4220QDS as they share same QDS board - Add B4QDS support in Kconfig and Makefile B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor, with following major features: - Four dual-threaded e6500 Power Architecture processors organized in one cluster-each core runs up to 1.8 GHz - Two DDR3/3L controllers for high-speed memory interface each runs at up to 1866.67 MHz - CoreNet fabric that fully supports coherency using MESI protocol between the e6500 cores, SC3900 FVP cores, memories and external interfaces. - Data Path Acceleration Architecture having FMAN, QMan, BMan, SEC 5.3 and RMAN - Large internal cache memory with snooping and stashing capabilities - Sixteen 10-GHz SerDes lanes that serve: - Two SRIO interfaces. Each supports up to 4 lanes and a total of up to 8 lanes - Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-less antenna connection - Two 10-Gbit Ethernet controllers (10GEC) - Six 1G/2.5-Gbit Ethernet controllers for network communications - PCI Express controller - Debug (Aurora) - Various system peripherals B4420 and B4220 have some differences in comparison to B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420: B4420 has: - Fewer e6500 cores: 1 cluster with 2 e6500 cores - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.6GHz - 2 X 4 lane serdes - 3 SGMII interfaces - no sRIO - no 10G Key differences between B4860 and B4220: B4220 has: - Fewer e6500 cores: 1 cluster with 1 e6500 core - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.33GHz - 2 X 2 lane serdes - 2 SGMII interfaces - no sRIO - no 10G Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-04-05 14:33:51 +08:00
config B4_QDS
bool "Freescale B4 QDS"
select DEFAULT_UIMAGE
select E500
select PPC_E500MC
select PHYS_64BIT
select SWIOTLB
Removal of GENERIC_GPIO for v3.10 GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO. However, it is not trivial to just create a branch to remove it. Over the course of the v3.9 cycle more code referencing GENERIC_GPIO has been added to linux-next that conflicts with this branch. The following must be done to resolve the conflicts when merging this branch into mainline: * "git grep CONFIG_GENERIC_GPIO" should return 0 hits. Matches should be replaced with CONFIG_GPIOLIB * "git grep '\bGENERIC_GPIO\b'" should return 1 hit in the Chinese documentation. * Selectors of GENERIC_GPIO should be turned into selectors of GPIOLIB * definitions of the option in architecture Kconfig code should be deleted. Stephen has 3 merge fixup patches[1] that do the above. They are currently applicable on mainline as of May 2nd. [1] http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg428056.html -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRifUnAAoJEEFnBt12D9kBs2YP/0U6+ia+xYvkVaJc28PDVIzn OReZNcJOYU8D5voxz0voaRD0EdcPwjbMu9Kp9aXMHlk4VxevF+8jCc/us0bIjtO1 VcB5VmSCIhMhxdnBlum11Mk7Vr5MCweyl9NBsypnPt8cl4obMBZHf2yzoodFktNb wtyYlOb6FALtc6iDbOO6dG3w9F7FAOLvskUFzdv89m8mupTsBu9jw9NqFDbJHOex rxq0Sdd+kWF/nkJVcV5Y6jIdletRlhpipefMJ9diexreHvwqh+c4kJEYZaXgB5+m ha95cPbReK1d+RqzM3A8d4irzSVSmq4k7ijI6QkFOr48+AH7XsgKv5so885LKzMN IIXg2Phm9i0H8+ecEvhcc4oIYBHJiEKK54Y0qUD9dqbFoDGPTCSqMHdSSMbpAY+J bIIXlVzj1En3PPNUJLPt8q8Qz6WxCT9mDST3QSGYnD4o90HT+1R9j92RxGL6McOq rUOyJDwmzFvpBvKK4raGdOU435M+ps2NPKKNIRaIGQPPY9rM1kN4YqvhXukEsC9L 3a3+3cQLh7iKxBHncxeQsJfethP1CPkJnzvF9r+ZZLf2rcPH4pbQIE2uO0XnX/nd 5/DKi0nGgAJ//GMMzdo3RiOA5zGFjIZ/KMvfhQldpP6qFJRhqdGi6FPlAcwr1z1n YnCByPwwlvfC4LTXFOGL =xodc -----END PGP SIGNATURE----- Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select
2013-05-10 00:59:16 +08:00
select GPIOLIB
powerpc/fsl-booke: Add B4_QDS board support - Add support for B4 board in board file b4_qds.c, It is common for B4860, B4420 and B4220QDS as they share same QDS board - Add B4QDS support in Kconfig and Makefile B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor, with following major features: - Four dual-threaded e6500 Power Architecture processors organized in one cluster-each core runs up to 1.8 GHz - Two DDR3/3L controllers for high-speed memory interface each runs at up to 1866.67 MHz - CoreNet fabric that fully supports coherency using MESI protocol between the e6500 cores, SC3900 FVP cores, memories and external interfaces. - Data Path Acceleration Architecture having FMAN, QMan, BMan, SEC 5.3 and RMAN - Large internal cache memory with snooping and stashing capabilities - Sixteen 10-GHz SerDes lanes that serve: - Two SRIO interfaces. Each supports up to 4 lanes and a total of up to 8 lanes - Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-less antenna connection - Two 10-Gbit Ethernet controllers (10GEC) - Six 1G/2.5-Gbit Ethernet controllers for network communications - PCI Express controller - Debug (Aurora) - Various system peripherals B4420 and B4220 have some differences in comparison to B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420: B4420 has: - Fewer e6500 cores: 1 cluster with 2 e6500 cores - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.6GHz - 2 X 4 lane serdes - 3 SGMII interfaces - no sRIO - no 10G Key differences between B4860 and B4220: B4220 has: - Fewer e6500 cores: 1 cluster with 1 e6500 core - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.33GHz - 2 X 2 lane serdes - 2 SGMII interfaces - no sRIO - no 10G Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2013-04-05 14:33:51 +08:00
select ARCH_REQUIRE_GPIOLIB
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
help
This option enables support for the B4 QDS board
The B4 application development system B4 QDS is a complete
debugging environment intended for engineers developing
applications for the B4.
powerpc/fsl-booke: Add initial T4240QDS board support Some minor changes to the common corenet_ds.c code are needed to support the T4240QDS: * Add support for "fsl,qoriq-pcie-v3.0" controller * Bump max # of IRQs to 512 (T4240 supports more interrupts than previous SoCs). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-06 01:09:04 +08:00
endif
powerpc/85xx: Kconfig cleanup Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ based chips. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-17 07:31:48 +08:00
endif # FSL_SOC_BOOKE
powerpc: Merge enough to start building in arch/powerpc. This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-26 14:04:21 +08:00
[POWERPC] 85xx: Port TQM85xx boards over from arch/ppc Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 13:53:03 +08:00
config TQM85xx
bool