2011-10-05 00:17:19 +08:00
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/*
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* Port on Texas Instruments TMS320C6x architecture
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*
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* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
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* Author: Aurelien Jacquiot <aurelien.jacquiot@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* DMA uncached mapping support.
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*
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* Using code pulled from ARM
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* Copyright (C) 2000-2004 Russell King
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*
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*/
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#include <linux/slab.h>
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#include <linux/bitmap.h>
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#include <linux/bitops.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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2018-04-16 23:27:40 +08:00
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#include <linux/dma-noncoherent.h>
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2011-10-05 00:17:19 +08:00
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#include <linux/memblock.h>
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2018-04-16 23:27:40 +08:00
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#include <asm/cacheflush.h>
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2011-10-05 00:17:19 +08:00
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#include <asm/page.h>
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2018-04-16 23:27:40 +08:00
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#include <asm/setup.h>
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2011-10-05 00:17:19 +08:00
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/*
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* DMA coherent memory management, can be redefined using the memdma=
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* kernel command line
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*/
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/* none by default */
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static phys_addr_t dma_base;
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static u32 dma_size;
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static u32 dma_pages;
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static unsigned long *dma_bitmap;
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/* bitmap lock */
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static DEFINE_SPINLOCK(dma_lock);
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/*
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* Return a DMA coherent and contiguous memory chunk from the DMA memory
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*/
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static inline u32 __alloc_dma_pages(int order)
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{
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unsigned long flags;
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u32 pos;
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spin_lock_irqsave(&dma_lock, flags);
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pos = bitmap_find_free_region(dma_bitmap, dma_pages, order);
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spin_unlock_irqrestore(&dma_lock, flags);
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return dma_base + (pos << PAGE_SHIFT);
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}
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static void __free_dma_pages(u32 addr, int order)
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{
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unsigned long flags;
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u32 pos = (addr - dma_base) >> PAGE_SHIFT;
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if (addr < dma_base || (pos + (1 << order)) >= dma_pages) {
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printk(KERN_ERR "%s: freeing outside range.\n", __func__);
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BUG();
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}
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spin_lock_irqsave(&dma_lock, flags);
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bitmap_release_region(dma_bitmap, pos, order);
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spin_unlock_irqrestore(&dma_lock, flags);
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}
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/*
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* Allocate DMA coherent memory space and return both the kernel
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* virtual and DMA address for that space.
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*/
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2018-04-16 23:27:40 +08:00
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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2016-08-04 04:46:00 +08:00
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gfp_t gfp, unsigned long attrs)
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2011-10-05 00:17:19 +08:00
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{
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2018-12-14 16:00:40 +08:00
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void *ret;
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2011-10-05 00:17:19 +08:00
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u32 paddr;
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int order;
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if (!dma_size || !size)
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return NULL;
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order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
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paddr = __alloc_dma_pages(order);
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if (handle)
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*handle = paddr;
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if (!paddr)
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return NULL;
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2018-12-14 16:00:40 +08:00
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ret = phys_to_virt(paddr);
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memset(ret, 0, 1 << order);
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return ret;
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2011-10-05 00:17:19 +08:00
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}
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/*
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* Free DMA coherent memory as defined by the above mapping.
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*/
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2018-04-16 23:27:40 +08:00
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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2016-08-04 04:46:00 +08:00
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dma_addr_t dma_handle, unsigned long attrs)
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2011-10-05 00:17:19 +08:00
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{
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int order;
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if (!dma_size || !size)
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return;
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order = get_count_order(((size - 1) >> PAGE_SHIFT) + 1);
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__free_dma_pages(virt_to_phys(vaddr), order);
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}
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/*
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* Initialise the coherent DMA memory allocator using the given uncached region.
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*/
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void __init coherent_mem_init(phys_addr_t start, u32 size)
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{
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if (!size)
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return;
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printk(KERN_INFO
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"Coherent memory (DMA) region start=0x%x size=0x%x\n",
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start, size);
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dma_base = start;
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dma_size = size;
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/* allocate bitmap */
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dma_pages = dma_size >> PAGE_SHIFT;
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if (dma_size & (PAGE_SIZE - 1))
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++dma_pages;
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2019-03-08 08:31:06 +08:00
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dma_bitmap = memblock_alloc(BITS_TO_LONGS(dma_pages) * sizeof(long),
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sizeof(long));
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2019-03-12 14:30:31 +08:00
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if (!dma_bitmap)
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panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
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__func__, BITS_TO_LONGS(dma_pages) * sizeof(long),
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sizeof(long));
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2011-10-05 00:17:19 +08:00
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}
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2018-04-16 23:27:40 +08:00
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static void c6x_dma_sync(struct device *dev, phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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switch (dir) {
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case DMA_FROM_DEVICE:
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L2_cache_block_invalidate(paddr, paddr + size);
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break;
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case DMA_TO_DEVICE:
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L2_cache_block_writeback(paddr, paddr + size);
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break;
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case DMA_BIDIRECTIONAL:
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L2_cache_block_writeback_invalidate(paddr, paddr + size);
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break;
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default:
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break;
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}
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}
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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return c6x_dma_sync(dev, paddr, size, dir);
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}
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void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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return c6x_dma_sync(dev, paddr, size, dir);
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}
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