2005-04-17 06:20:36 +08:00
|
|
|
/*
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* File: portdrv_pci.c
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* Purpose: PCI Express Port Bus Driver
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*
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* Copyright (C) 2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/pm.h>
|
2012-06-23 10:23:49 +08:00
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#include <linux/pm_runtime.h>
|
2005-04-17 06:20:36 +08:00
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#include <linux/init.h>
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#include <linux/pcieport_if.h>
|
2006-07-31 15:26:16 +08:00
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|
#include <linux/aer.h>
|
2010-02-18 06:40:07 +08:00
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|
#include <linux/dmi.h>
|
PCI: PCIe: Ask BIOS for control of all native services at once
After commit 852972acff8f10f3a15679be2059bb94916cba5d (ACPI: Disable
ASPM if the platform won't provide _OSC control for PCIe) control of
the PCIe Capability Structure is unconditionally requested by
acpi_pci_root_add(), which in principle may cause problems to
happen in two ways. First, the BIOS may refuse to give control of
the PCIe Capability Structure if it is not asked for any of the
_OSC features depending on it at the same time. Second, the BIOS may
assume that control of the _OSC features depending on the PCIe
Capability Structure will be requested in the future and may behave
incorrectly if that doesn't happen. For this reason, control of
the PCIe Capability Structure should always be requested along with
control of any other _OSC features that may depend on it (ie. PCIe
native PME, PCIe native hot-plug, PCIe AER).
Rework the PCIe port driver so that (1) it checks which native PCIe
port services can be enabled, according to the BIOS, and (2) it
requests control of all these services simultaneously. In
particular, this causes pcie_portdrv_probe() to fail if the BIOS
refuses to grant control of the PCIe Capability Structure, which
means that no native PCIe port services can be enabled for the PCIe
Root Complex the given port belongs to. If that happens, ASPM is
disabled to avoid problems with mishandling it by the part of the
PCIe hierarchy for which control of the PCIe Capability Structure
has not been received.
Make it possible to override this behavior using 'pcie_ports=native'
(use the PCIe native services regardless of the BIOS response to the
control request), or 'pcie_ports=compat' (do not use the PCIe native
services at all).
Accordingly, rework the existing PCIe port service drivers so that
they don't request control of the services directly.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-08-22 04:02:38 +08:00
|
|
|
#include <linux/pci-aspm.h>
|
2005-04-17 06:20:36 +08:00
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|
|
|
#include "portdrv.h"
|
2006-07-31 15:26:16 +08:00
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|
|
#include "aer/aerdrv.h"
|
2005-04-17 06:20:36 +08:00
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|
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|
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/*
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* Version Information
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*/
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#define DRIVER_VERSION "v1.0"
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|
#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
|
2009-12-04 01:00:10 +08:00
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|
|
#define DRIVER_DESC "PCIe Port Bus Driver"
|
2005-04-17 06:20:36 +08:00
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MODULE_AUTHOR(DRIVER_AUTHOR);
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|
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL");
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|
2010-08-21 07:51:44 +08:00
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|
/* If this switch is set, PCIe port native services should not be enabled. */
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|
|
|
bool pcie_ports_disabled;
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|
|
|
|
PCI: PCIe: Ask BIOS for control of all native services at once
After commit 852972acff8f10f3a15679be2059bb94916cba5d (ACPI: Disable
ASPM if the platform won't provide _OSC control for PCIe) control of
the PCIe Capability Structure is unconditionally requested by
acpi_pci_root_add(), which in principle may cause problems to
happen in two ways. First, the BIOS may refuse to give control of
the PCIe Capability Structure if it is not asked for any of the
_OSC features depending on it at the same time. Second, the BIOS may
assume that control of the _OSC features depending on the PCIe
Capability Structure will be requested in the future and may behave
incorrectly if that doesn't happen. For this reason, control of
the PCIe Capability Structure should always be requested along with
control of any other _OSC features that may depend on it (ie. PCIe
native PME, PCIe native hot-plug, PCIe AER).
Rework the PCIe port driver so that (1) it checks which native PCIe
port services can be enabled, according to the BIOS, and (2) it
requests control of all these services simultaneously. In
particular, this causes pcie_portdrv_probe() to fail if the BIOS
refuses to grant control of the PCIe Capability Structure, which
means that no native PCIe port services can be enabled for the PCIe
Root Complex the given port belongs to. If that happens, ASPM is
disabled to avoid problems with mishandling it by the part of the
PCIe hierarchy for which control of the PCIe Capability Structure
has not been received.
Make it possible to override this behavior using 'pcie_ports=native'
(use the PCIe native services regardless of the BIOS response to the
control request), or 'pcie_ports=compat' (do not use the PCIe native
services at all).
Accordingly, rework the existing PCIe port service drivers so that
they don't request control of the services directly.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-08-22 04:02:38 +08:00
|
|
|
/*
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|
|
|
* If this switch is set, ACPI _OSC will be used to determine whether or not to
|
|
|
|
* enable PCIe port native services.
|
|
|
|
*/
|
|
|
|
bool pcie_ports_auto = true;
|
|
|
|
|
2010-08-21 07:51:44 +08:00
|
|
|
static int __init pcie_port_setup(char *str)
|
|
|
|
{
|
PCI: PCIe: Ask BIOS for control of all native services at once
After commit 852972acff8f10f3a15679be2059bb94916cba5d (ACPI: Disable
ASPM if the platform won't provide _OSC control for PCIe) control of
the PCIe Capability Structure is unconditionally requested by
acpi_pci_root_add(), which in principle may cause problems to
happen in two ways. First, the BIOS may refuse to give control of
the PCIe Capability Structure if it is not asked for any of the
_OSC features depending on it at the same time. Second, the BIOS may
assume that control of the _OSC features depending on the PCIe
Capability Structure will be requested in the future and may behave
incorrectly if that doesn't happen. For this reason, control of
the PCIe Capability Structure should always be requested along with
control of any other _OSC features that may depend on it (ie. PCIe
native PME, PCIe native hot-plug, PCIe AER).
Rework the PCIe port driver so that (1) it checks which native PCIe
port services can be enabled, according to the BIOS, and (2) it
requests control of all these services simultaneously. In
particular, this causes pcie_portdrv_probe() to fail if the BIOS
refuses to grant control of the PCIe Capability Structure, which
means that no native PCIe port services can be enabled for the PCIe
Root Complex the given port belongs to. If that happens, ASPM is
disabled to avoid problems with mishandling it by the part of the
PCIe hierarchy for which control of the PCIe Capability Structure
has not been received.
Make it possible to override this behavior using 'pcie_ports=native'
(use the PCIe native services regardless of the BIOS response to the
control request), or 'pcie_ports=compat' (do not use the PCIe native
services at all).
Accordingly, rework the existing PCIe port service drivers so that
they don't request control of the services directly.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-08-22 04:02:38 +08:00
|
|
|
if (!strncmp(str, "compat", 6)) {
|
2010-08-21 07:51:44 +08:00
|
|
|
pcie_ports_disabled = true;
|
PCI: PCIe: Ask BIOS for control of all native services at once
After commit 852972acff8f10f3a15679be2059bb94916cba5d (ACPI: Disable
ASPM if the platform won't provide _OSC control for PCIe) control of
the PCIe Capability Structure is unconditionally requested by
acpi_pci_root_add(), which in principle may cause problems to
happen in two ways. First, the BIOS may refuse to give control of
the PCIe Capability Structure if it is not asked for any of the
_OSC features depending on it at the same time. Second, the BIOS may
assume that control of the _OSC features depending on the PCIe
Capability Structure will be requested in the future and may behave
incorrectly if that doesn't happen. For this reason, control of
the PCIe Capability Structure should always be requested along with
control of any other _OSC features that may depend on it (ie. PCIe
native PME, PCIe native hot-plug, PCIe AER).
Rework the PCIe port driver so that (1) it checks which native PCIe
port services can be enabled, according to the BIOS, and (2) it
requests control of all these services simultaneously. In
particular, this causes pcie_portdrv_probe() to fail if the BIOS
refuses to grant control of the PCIe Capability Structure, which
means that no native PCIe port services can be enabled for the PCIe
Root Complex the given port belongs to. If that happens, ASPM is
disabled to avoid problems with mishandling it by the part of the
PCIe hierarchy for which control of the PCIe Capability Structure
has not been received.
Make it possible to override this behavior using 'pcie_ports=native'
(use the PCIe native services regardless of the BIOS response to the
control request), or 'pcie_ports=compat' (do not use the PCIe native
services at all).
Accordingly, rework the existing PCIe port service drivers so that
they don't request control of the services directly.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-08-22 04:02:38 +08:00
|
|
|
} else if (!strncmp(str, "native", 6)) {
|
|
|
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pcie_ports_disabled = false;
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|
|
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pcie_ports_auto = false;
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|
|
} else if (!strncmp(str, "auto", 4)) {
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|
|
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pcie_ports_disabled = false;
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|
|
pcie_ports_auto = true;
|
|
|
|
}
|
2010-08-21 07:51:44 +08:00
|
|
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|
|
return 1;
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|
|
|
}
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|
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__setup("pcie_ports=", pcie_port_setup);
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|
2005-04-17 06:20:36 +08:00
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/* global data */
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|
2010-12-19 22:57:16 +08:00
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|
/**
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* pcie_clear_root_pme_status - Clear root port PME interrupt status.
|
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* @dev: PCIe root port or event collector.
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|
|
*/
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|
void pcie_clear_root_pme_status(struct pci_dev *dev)
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{
|
2012-07-24 17:20:08 +08:00
|
|
|
pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
|
2010-12-19 22:57:16 +08:00
|
|
|
}
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|
|
2006-07-31 15:26:16 +08:00
|
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|
static int pcie_portdrv_restore_config(struct pci_dev *dev)
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|
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{
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|
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int retval;
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retval = pci_enable_device(dev);
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if (retval)
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return retval;
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|
|
pci_set_master(dev);
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|
return 0;
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|
|
|
}
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|
2006-09-28 14:35:59 +08:00
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|
|
#ifdef CONFIG_PM
|
2010-12-19 22:57:16 +08:00
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|
static int pcie_port_resume_noirq(struct device *dev)
|
|
|
|
{
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|
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|
struct pci_dev *pdev = to_pci_dev(dev);
|
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|
|
|
|
|
|
/*
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|
|
* Some BIOSes forget to clear Root PME Status bits after system wakeup
|
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|
|
* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
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|
|
|
* bits now just in case (shouldn't hurt).
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*/
|
2012-07-24 17:20:03 +08:00
|
|
|
if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
|
2010-12-19 22:57:16 +08:00
|
|
|
pcie_clear_root_pme_status(pdev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-06-02 16:17:15 +08:00
|
|
|
static int pcie_port_runtime_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
|
|
|
|
}
|
|
|
|
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|
|
static int pcie_port_runtime_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
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|
|
static int pcie_port_runtime_idle(struct device *dev)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Assume the PCI core has set bridge_d3 whenever it thinks the port
|
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|
|
* should be good to go to D3. Everything else, including moving
|
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|
|
* the port to D3, is handled by the PCI core.
|
|
|
|
*/
|
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|
|
return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
|
|
|
|
}
|
|
|
|
|
2009-12-15 10:00:08 +08:00
|
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|
static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
2009-02-16 05:32:48 +08:00
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|
.suspend = pcie_port_device_suspend,
|
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|
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.resume = pcie_port_device_resume,
|
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|
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.freeze = pcie_port_device_suspend,
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|
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.thaw = pcie_port_device_resume,
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|
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.poweroff = pcie_port_device_suspend,
|
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|
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.restore = pcie_port_device_resume,
|
2010-12-19 22:57:16 +08:00
|
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|
.resume_noirq = pcie_port_resume_noirq,
|
2016-06-02 16:17:15 +08:00
|
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|
.runtime_suspend = pcie_port_runtime_suspend,
|
|
|
|
.runtime_resume = pcie_port_runtime_resume,
|
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|
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.runtime_idle = pcie_port_runtime_idle,
|
2009-02-16 05:32:48 +08:00
|
|
|
};
|
2006-07-31 15:26:16 +08:00
|
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|
|
2009-02-16 05:32:48 +08:00
|
|
|
#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
|
2008-12-27 23:28:58 +08:00
|
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|
|
2009-02-16 05:32:48 +08:00
|
|
|
#else /* !PM */
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|
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|
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#define PCIE_PORTDRV_PM_OPS NULL
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|
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#endif /* !PM */
|
2006-07-31 15:26:16 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
* pcie_portdrv_probe - Probe PCI-Express port devices
|
|
|
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* @dev: PCI-Express port device being probed
|
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|
|
*
|
2009-12-15 10:38:04 +08:00
|
|
|
* If detected invokes the pcie_port_device_register() method for
|
2005-04-17 06:20:36 +08:00
|
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|
* this port device.
|
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|
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*
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|
|
|
*/
|
2012-11-22 04:35:00 +08:00
|
|
|
static int pcie_portdrv_probe(struct pci_dev *dev,
|
2009-11-25 20:00:53 +08:00
|
|
|
const struct pci_device_id *id)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2009-11-25 20:00:53 +08:00
|
|
|
int status;
|
2005-04-17 06:20:36 +08:00
|
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|
|
2009-11-25 20:00:53 +08:00
|
|
|
if (!pci_is_pcie(dev) ||
|
2012-07-24 17:20:03 +08:00
|
|
|
((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
|
|
|
|
(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
|
|
|
|
(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
|
2009-11-25 20:00:53 +08:00
|
|
|
return -ENODEV;
|
2005-04-17 06:20:36 +08:00
|
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|
|
2009-01-13 21:42:01 +08:00
|
|
|
status = pcie_port_device_register(dev);
|
|
|
|
if (status)
|
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|
|
return status;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2009-01-13 21:43:07 +08:00
|
|
|
pci_save_state(dev);
|
2016-06-02 16:17:15 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Prevent runtime PM if the port is advertising support for PCIe
|
|
|
|
* hotplug. Otherwise the BIOS hotplug SMI code might not be able
|
|
|
|
* to enumerate devices behind this port properly (the port is
|
|
|
|
* powered down preventing all config space accesses to the
|
|
|
|
* subordinate devices). We can't be sure for native PCIe hotplug
|
|
|
|
* either so prevent that as well.
|
|
|
|
*/
|
|
|
|
if (!dev->is_hotplug_bridge) {
|
|
|
|
/*
|
|
|
|
* Keep the port resumed 100ms to make sure things like
|
|
|
|
* config space accesses from userspace (lspci) will not
|
|
|
|
* cause the port to repeatedly suspend and resume.
|
|
|
|
*/
|
|
|
|
pm_runtime_set_autosuspend_delay(&dev->dev, 100);
|
|
|
|
pm_runtime_use_autosuspend(&dev->dev);
|
|
|
|
pm_runtime_mark_last_busy(&dev->dev);
|
|
|
|
pm_runtime_put_autosuspend(&dev->dev);
|
|
|
|
pm_runtime_allow(&dev->dev);
|
|
|
|
}
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-12-15 10:38:04 +08:00
|
|
|
static void pcie_portdrv_remove(struct pci_dev *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2016-06-02 16:17:15 +08:00
|
|
|
if (!dev->is_hotplug_bridge) {
|
|
|
|
pm_runtime_forbid(&dev->dev);
|
|
|
|
pm_runtime_get_noresume(&dev->dev);
|
|
|
|
pm_runtime_dont_use_autosuspend(&dev->dev);
|
|
|
|
}
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
pcie_port_device_remove(dev);
|
|
|
|
}
|
|
|
|
|
2006-07-31 15:26:16 +08:00
|
|
|
static int error_detected_iter(struct device *device, void *data)
|
2006-07-06 22:05:51 +08:00
|
|
|
{
|
2006-07-31 15:26:16 +08:00
|
|
|
struct pcie_device *pcie_device;
|
|
|
|
struct pcie_port_service_driver *driver;
|
|
|
|
struct aer_broadcast_data *result_data;
|
|
|
|
pci_ers_result_t status;
|
|
|
|
|
|
|
|
result_data = (struct aer_broadcast_data *) data;
|
|
|
|
|
|
|
|
if (device->bus == &pcie_port_bus_type && device->driver) {
|
|
|
|
driver = to_service_driver(device->driver);
|
|
|
|
if (!driver ||
|
|
|
|
!driver->err_handler ||
|
|
|
|
!driver->err_handler->error_detected)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
pcie_device = to_pcie_device(device);
|
|
|
|
|
|
|
|
/* Forward error detected message to service drivers */
|
|
|
|
status = driver->err_handler->error_detected(
|
|
|
|
pcie_device->port,
|
|
|
|
result_data->state);
|
|
|
|
result_data->result =
|
|
|
|
merge_result(result_data->result, status);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2006-07-06 22:05:51 +08:00
|
|
|
}
|
|
|
|
|
2006-07-31 15:26:16 +08:00
|
|
|
static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
|
|
|
|
enum pci_channel_state error)
|
2006-07-06 22:05:51 +08:00
|
|
|
{
|
2009-12-15 10:38:04 +08:00
|
|
|
struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
|
2006-07-31 15:26:16 +08:00
|
|
|
|
2013-04-13 01:18:01 +08:00
|
|
|
/* get true return value from &data */
|
|
|
|
device_for_each_child(&dev->dev, &data, error_detected_iter);
|
2009-12-15 10:38:04 +08:00
|
|
|
return data.result;
|
2006-07-31 15:26:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int mmio_enabled_iter(struct device *device, void *data)
|
|
|
|
{
|
|
|
|
struct pcie_device *pcie_device;
|
|
|
|
struct pcie_port_service_driver *driver;
|
|
|
|
pci_ers_result_t status, *result;
|
|
|
|
|
|
|
|
result = (pci_ers_result_t *) data;
|
|
|
|
|
|
|
|
if (device->bus == &pcie_port_bus_type && device->driver) {
|
|
|
|
driver = to_service_driver(device->driver);
|
|
|
|
if (driver &&
|
|
|
|
driver->err_handler &&
|
|
|
|
driver->err_handler->mmio_enabled) {
|
|
|
|
pcie_device = to_pcie_device(device);
|
|
|
|
|
|
|
|
/* Forward error message to service drivers */
|
|
|
|
status = driver->err_handler->mmio_enabled(
|
|
|
|
pcie_device->port);
|
|
|
|
*result = merge_result(*result, status);
|
|
|
|
}
|
|
|
|
}
|
2006-07-06 22:05:51 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-07-31 15:26:16 +08:00
|
|
|
static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-31 15:26:16 +08:00
|
|
|
pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
|
2005-06-23 00:09:54 +08:00
|
|
|
|
2006-08-29 02:43:25 +08:00
|
|
|
/* get true return value from &status */
|
2013-04-13 01:18:01 +08:00
|
|
|
device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
|
2006-07-31 15:26:16 +08:00
|
|
|
return status;
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
2006-07-31 15:26:16 +08:00
|
|
|
static int slot_reset_iter(struct device *device, void *data)
|
2005-04-17 06:20:36 +08:00
|
|
|
{
|
2006-07-31 15:26:16 +08:00
|
|
|
struct pcie_device *pcie_device;
|
|
|
|
struct pcie_port_service_driver *driver;
|
|
|
|
pci_ers_result_t status, *result;
|
|
|
|
|
|
|
|
result = (pci_ers_result_t *) data;
|
|
|
|
|
|
|
|
if (device->bus == &pcie_port_bus_type && device->driver) {
|
|
|
|
driver = to_service_driver(device->driver);
|
|
|
|
if (driver &&
|
|
|
|
driver->err_handler &&
|
|
|
|
driver->err_handler->slot_reset) {
|
|
|
|
pcie_device = to_pcie_device(device);
|
|
|
|
|
|
|
|
/* Forward error message to service drivers */
|
|
|
|
status = driver->err_handler->slot_reset(
|
|
|
|
pcie_device->port);
|
|
|
|
*result = merge_result(*result, status);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
|
|
|
|
{
|
2009-04-30 14:48:29 +08:00
|
|
|
pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
|
2006-07-31 15:26:16 +08:00
|
|
|
|
|
|
|
/* If fatal, restore cfg space for possible link reset at upstream */
|
|
|
|
if (dev->error_state == pci_channel_io_frozen) {
|
2009-09-15 04:25:11 +08:00
|
|
|
dev->state_saved = true;
|
2008-12-27 23:28:58 +08:00
|
|
|
pci_restore_state(dev);
|
2006-07-31 15:26:16 +08:00
|
|
|
pcie_portdrv_restore_config(dev);
|
|
|
|
pci_enable_pcie_error_reporting(dev);
|
|
|
|
}
|
|
|
|
|
2006-08-29 02:43:25 +08:00
|
|
|
/* get true return value from &status */
|
2013-04-13 01:18:01 +08:00
|
|
|
device_for_each_child(&dev->dev, &status, slot_reset_iter);
|
2006-07-31 15:26:16 +08:00
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int resume_iter(struct device *device, void *data)
|
|
|
|
{
|
|
|
|
struct pcie_device *pcie_device;
|
|
|
|
struct pcie_port_service_driver *driver;
|
|
|
|
|
|
|
|
if (device->bus == &pcie_port_bus_type && device->driver) {
|
|
|
|
driver = to_service_driver(device->driver);
|
|
|
|
if (driver &&
|
|
|
|
driver->err_handler &&
|
|
|
|
driver->err_handler->resume) {
|
|
|
|
pcie_device = to_pcie_device(device);
|
|
|
|
|
|
|
|
/* Forward error message to service drivers */
|
|
|
|
driver->err_handler->resume(pcie_device->port);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pcie_portdrv_err_resume(struct pci_dev *dev)
|
|
|
|
{
|
2013-04-13 01:18:01 +08:00
|
|
|
device_for_each_child(&dev->dev, NULL, resume_iter);
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* LINUX Device Driver Model
|
|
|
|
*/
|
|
|
|
static const struct pci_device_id port_pci_ids[] = { {
|
|
|
|
/* handle any PCI-Express port */
|
|
|
|
PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
|
|
|
|
}, { /* end: all zeroes */ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, port_pci_ids);
|
|
|
|
|
2012-09-08 00:33:14 +08:00
|
|
|
static const struct pci_error_handlers pcie_portdrv_err_handler = {
|
|
|
|
.error_detected = pcie_portdrv_error_detected,
|
|
|
|
.mmio_enabled = pcie_portdrv_mmio_enabled,
|
|
|
|
.slot_reset = pcie_portdrv_slot_reset,
|
|
|
|
.resume = pcie_portdrv_err_resume,
|
2006-07-31 15:26:16 +08:00
|
|
|
};
|
|
|
|
|
2007-02-27 17:19:17 +08:00
|
|
|
static struct pci_driver pcie_portdriver = {
|
2009-10-06 06:47:34 +08:00
|
|
|
.name = "pcieport",
|
2005-04-17 06:20:36 +08:00
|
|
|
.id_table = &port_pci_ids[0],
|
|
|
|
|
|
|
|
.probe = pcie_portdrv_probe,
|
|
|
|
.remove = pcie_portdrv_remove,
|
|
|
|
|
2013-11-15 02:28:18 +08:00
|
|
|
.err_handler = &pcie_portdrv_err_handler,
|
2009-02-16 05:32:48 +08:00
|
|
|
|
2013-11-15 02:28:18 +08:00
|
|
|
.driver.pm = PCIE_PORTDRV_PM_OPS,
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
|
|
|
|
2010-02-18 06:40:07 +08:00
|
|
|
static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
|
|
|
|
{
|
|
|
|
pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
|
2014-04-19 08:13:50 +08:00
|
|
|
d->ident);
|
2010-02-18 06:40:07 +08:00
|
|
|
pcie_pme_disable_msi();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
|
|
|
|
/*
|
|
|
|
* Boxes that should not use MSI for PCIe PME signaling.
|
|
|
|
*/
|
|
|
|
{
|
|
|
|
.callback = dmi_pcie_pme_disable_msi,
|
|
|
|
.ident = "MSI Wind U-100",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR,
|
2013-11-15 02:28:18 +08:00
|
|
|
"MICRO-STAR INTERNATIONAL CO., LTD"),
|
2010-02-18 06:40:07 +08:00
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
static int __init pcie_portdrv_init(void)
|
|
|
|
{
|
2006-07-09 13:58:25 +08:00
|
|
|
int retval;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2010-12-19 22:57:16 +08:00
|
|
|
if (pcie_ports_disabled)
|
|
|
|
return pci_register_driver(&pcie_portdriver);
|
2010-08-21 07:51:44 +08:00
|
|
|
|
2010-02-18 06:40:07 +08:00
|
|
|
dmi_check_system(pcie_portdrv_dmi_table);
|
|
|
|
|
2006-07-09 13:58:25 +08:00
|
|
|
retval = pcie_port_bus_register();
|
|
|
|
if (retval) {
|
|
|
|
printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
|
|
|
|
goto out;
|
|
|
|
}
|
2007-02-27 17:19:17 +08:00
|
|
|
retval = pci_register_driver(&pcie_portdriver);
|
2005-04-17 06:20:36 +08:00
|
|
|
if (retval)
|
|
|
|
pcie_port_bus_unregister();
|
2006-07-09 13:58:25 +08:00
|
|
|
out:
|
2005-04-17 06:20:36 +08:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(pcie_portdrv_init);
|