2013-03-07 06:46:20 +08:00
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/*
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* ACPI support for Intel Lynxpoint LPSS.
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*
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2015-02-03 21:29:43 +08:00
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* Copyright (C) 2013, Intel Corporation
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2013-03-07 06:46:20 +08:00
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/clk-lpss.h>
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2013-03-07 06:46:28 +08:00
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#include <linux/pm_runtime.h>
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2014-05-23 21:15:09 +08:00
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#include <linux/delay.h>
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2013-03-07 06:46:20 +08:00
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#include "internal.h"
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ACPI_MODULE_NAME("acpi_lpss");
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2014-05-30 20:34:05 +08:00
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#ifdef CONFIG_X86_INTEL_LPSS
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#define LPSS_ADDR(desc) ((unsigned long)&desc)
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2013-03-07 06:46:20 +08:00
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#define LPSS_CLK_SIZE 0x04
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2013-03-07 06:46:28 +08:00
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#define LPSS_LTR_SIZE 0x18
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/* Offsets relative to LPSS_PRIVATE_OFFSET */
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2014-05-19 19:42:07 +08:00
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#define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16))
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2014-06-17 19:33:39 +08:00
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#define LPSS_RESETS 0x04
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#define LPSS_RESETS_RESET_FUNC BIT(0)
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#define LPSS_RESETS_RESET_APB BIT(1)
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2013-03-07 06:46:28 +08:00
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#define LPSS_GENERAL 0x08
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#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
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2013-10-09 14:49:20 +08:00
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#define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
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2013-03-07 06:46:28 +08:00
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#define LPSS_SW_LTR 0x10
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#define LPSS_AUTO_LTR 0x14
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2014-02-11 07:35:53 +08:00
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#define LPSS_LTR_SNOOP_REQ BIT(15)
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#define LPSS_LTR_SNOOP_MASK 0x0000FFFF
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#define LPSS_LTR_SNOOP_LAT_1US 0x800
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#define LPSS_LTR_SNOOP_LAT_32US 0xC00
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#define LPSS_LTR_SNOOP_LAT_SHIFT 5
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#define LPSS_LTR_SNOOP_LAT_CUTOFF 3000
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#define LPSS_LTR_MAX_VAL 0x3FF
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2013-06-17 18:25:46 +08:00
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#define LPSS_TX_INT 0x20
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#define LPSS_TX_INT_MASK BIT(1)
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2013-03-07 06:46:20 +08:00
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2014-05-23 21:15:09 +08:00
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#define LPSS_PRV_REG_COUNT 9
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2014-09-02 15:55:07 +08:00
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/* LPSS Flags */
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#define LPSS_CLK BIT(0)
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#define LPSS_CLK_GATE BIT(1)
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#define LPSS_CLK_DIVIDER BIT(2)
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#define LPSS_LTR BIT(3)
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#define LPSS_SAVE_CTX BIT(4)
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2013-05-13 20:42:44 +08:00
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2013-06-17 18:25:46 +08:00
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struct lpss_private_data;
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2013-03-07 06:46:20 +08:00
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struct lpss_device_desc {
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2014-09-02 15:55:07 +08:00
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unsigned int flags;
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2013-03-07 06:46:28 +08:00
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unsigned int prv_offset;
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2013-06-18 21:51:35 +08:00
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size_t prv_size_override;
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2013-06-17 18:25:46 +08:00
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void (*setup)(struct lpss_private_data *pdata);
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2013-03-07 06:46:20 +08:00
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};
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2013-05-08 16:55:49 +08:00
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static struct lpss_device_desc lpss_dma_desc = {
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2015-02-03 21:29:43 +08:00
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.flags = LPSS_CLK,
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2013-05-08 16:55:49 +08:00
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};
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2013-03-07 06:46:20 +08:00
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struct lpss_private_data {
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void __iomem *mmio_base;
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resource_size_t mmio_size;
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2014-09-02 15:55:09 +08:00
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unsigned int fixed_clk_rate;
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2013-03-07 06:46:20 +08:00
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struct clk *clk;
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const struct lpss_device_desc *dev_desc;
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2014-05-23 21:15:09 +08:00
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u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
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2013-03-07 06:46:20 +08:00
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};
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2014-09-11 20:19:33 +08:00
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/* UART Component Parameter Register */
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#define LPSS_UART_CPR 0xF4
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#define LPSS_UART_CPR_AFCE BIT(4)
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2013-06-17 18:25:46 +08:00
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static void lpss_uart_setup(struct lpss_private_data *pdata)
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{
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2013-10-09 14:49:20 +08:00
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unsigned int offset;
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2014-09-11 20:19:33 +08:00
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u32 val;
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2013-06-17 18:25:46 +08:00
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2013-10-09 14:49:20 +08:00
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offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
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2014-09-11 20:19:33 +08:00
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val = readl(pdata->mmio_base + offset);
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writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
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val = readl(pdata->mmio_base + LPSS_UART_CPR);
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if (!(val & LPSS_UART_CPR_AFCE)) {
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offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
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val = readl(pdata->mmio_base + offset);
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val |= LPSS_GENERAL_UART_RTS_OVRD;
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writel(val, pdata->mmio_base + offset);
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}
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2013-06-17 18:25:46 +08:00
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}
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2015-02-18 19:50:16 +08:00
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#define LPSS_I2C_ENABLE 0x6c
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2014-09-02 15:55:09 +08:00
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static void byt_i2c_setup(struct lpss_private_data *pdata)
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2014-06-17 19:33:39 +08:00
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{
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unsigned int offset;
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u32 val;
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offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
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val = readl(pdata->mmio_base + offset);
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val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
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writel(val, pdata->mmio_base + offset);
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2014-09-02 15:55:09 +08:00
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if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
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pdata->fixed_clk_rate = 133000000;
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2015-02-18 19:50:16 +08:00
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writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
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2014-06-17 19:33:39 +08:00
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}
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2014-08-01 09:06:35 +08:00
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2013-03-07 06:46:20 +08:00
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static struct lpss_device_desc lpt_dev_desc = {
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2014-09-02 15:55:07 +08:00
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
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2014-05-19 19:42:07 +08:00
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.prv_offset = 0x800,
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};
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static struct lpss_device_desc lpt_i2c_dev_desc = {
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2015-02-16 16:26:28 +08:00
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
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2013-03-07 06:46:28 +08:00
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.prv_offset = 0x800,
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};
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2013-06-17 18:25:46 +08:00
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static struct lpss_device_desc lpt_uart_dev_desc = {
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2014-09-02 15:55:07 +08:00
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
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2013-06-17 18:25:46 +08:00
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.prv_offset = 0x800,
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.setup = lpss_uart_setup,
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2013-03-07 06:46:28 +08:00
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};
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static struct lpss_device_desc lpt_sdio_dev_desc = {
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2014-09-02 15:55:07 +08:00
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.flags = LPSS_LTR,
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2013-03-07 06:46:28 +08:00
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.prv_offset = 0x1000,
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2013-06-18 21:51:35 +08:00
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.prv_size_override = 0x1018,
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2014-02-19 02:24:29 +08:00
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};
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static struct lpss_device_desc byt_pwm_dev_desc = {
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2014-09-02 15:55:10 +08:00
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.flags = LPSS_SAVE_CTX,
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2014-02-19 02:24:29 +08:00
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};
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2013-05-13 20:42:44 +08:00
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static struct lpss_device_desc byt_uart_dev_desc = {
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2015-02-03 21:29:43 +08:00
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
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2013-05-13 20:42:44 +08:00
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.prv_offset = 0x800,
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2013-06-17 18:25:46 +08:00
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.setup = lpss_uart_setup,
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2013-05-13 20:42:44 +08:00
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};
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static struct lpss_device_desc byt_spi_dev_desc = {
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2015-02-03 21:29:43 +08:00
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
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2013-05-13 20:42:44 +08:00
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.prv_offset = 0x400,
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};
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static struct lpss_device_desc byt_sdio_dev_desc = {
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2015-02-03 21:29:43 +08:00
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.flags = LPSS_CLK,
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2013-05-13 20:42:44 +08:00
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};
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static struct lpss_device_desc byt_i2c_dev_desc = {
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2015-02-03 21:29:43 +08:00
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.flags = LPSS_CLK | LPSS_SAVE_CTX,
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2013-05-13 20:42:44 +08:00
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.prv_offset = 0x800,
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2014-09-02 15:55:09 +08:00
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.setup = byt_i2c_setup,
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2014-08-19 20:55:22 +08:00
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};
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2014-05-30 20:34:05 +08:00
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#else
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#define LPSS_ADDR(desc) (0UL)
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#endif /* CONFIG_X86_INTEL_LPSS */
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2013-03-07 06:46:20 +08:00
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static const struct acpi_device_id acpi_lpss_device_ids[] = {
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2013-05-08 16:55:49 +08:00
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/* Generic LPSS devices */
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2014-05-30 20:34:05 +08:00
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{ "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
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2013-05-08 16:55:49 +08:00
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2013-03-07 06:46:20 +08:00
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/* Lynxpoint LPSS devices */
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2014-05-30 20:34:05 +08:00
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{ "INT33C0", LPSS_ADDR(lpt_dev_desc) },
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{ "INT33C1", LPSS_ADDR(lpt_dev_desc) },
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{ "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
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{ "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
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{ "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
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{ "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
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{ "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
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2013-03-07 06:46:20 +08:00
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{ "INT33C7", },
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2013-05-13 20:42:44 +08:00
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/* BayTrail LPSS devices */
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2014-05-30 20:34:05 +08:00
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{ "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
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{ "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
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{ "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
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{ "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
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{ "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
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2013-05-13 20:42:44 +08:00
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{ "INT33B2", },
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2014-05-15 23:28:46 +08:00
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{ "INT33FC", },
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2013-05-13 20:42:44 +08:00
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2014-08-19 20:55:22 +08:00
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/* Braswell LPSS devices */
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2014-09-02 15:55:10 +08:00
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{ "80862288", LPSS_ADDR(byt_pwm_dev_desc) },
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2014-08-19 20:55:22 +08:00
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{ "8086228A", LPSS_ADDR(byt_uart_dev_desc) },
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{ "8086228E", LPSS_ADDR(byt_spi_dev_desc) },
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{ "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },
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2014-05-30 20:34:05 +08:00
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{ "INT3430", LPSS_ADDR(lpt_dev_desc) },
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{ "INT3431", LPSS_ADDR(lpt_dev_desc) },
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{ "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
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{ "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
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{ "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
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{ "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
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{ "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
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2013-11-12 17:48:19 +08:00
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{ "INT3437", },
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2014-09-02 15:55:07 +08:00
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/* Wildcat Point LPSS devices */
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{ "INT3438", LPSS_ADDR(lpt_dev_desc) },
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2014-08-01 09:06:35 +08:00
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2013-03-07 06:46:20 +08:00
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{ }
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};
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2014-05-30 20:34:05 +08:00
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#ifdef CONFIG_X86_INTEL_LPSS
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2013-03-07 06:46:20 +08:00
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static int is_memory(struct acpi_resource *res, void *not_used)
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{
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struct resource r;
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return !acpi_dev_resource_memory(res, &r);
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}
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/* LPSS main clock device. */
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static struct platform_device *lpss_clk_dev;
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static inline void lpt_register_clock_device(void)
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{
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lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
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}
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static int register_device_clock(struct acpi_device *adev,
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struct lpss_private_data *pdata)
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{
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const struct lpss_device_desc *dev_desc = pdata->dev_desc;
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2014-05-19 19:42:07 +08:00
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const char *devname = dev_name(&adev->dev);
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2013-05-13 20:42:44 +08:00
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struct clk *clk = ERR_PTR(-ENODEV);
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2013-05-08 16:55:49 +08:00
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struct lpss_clk_data *clk_data;
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2014-05-19 19:42:07 +08:00
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const char *parent, *clk_name;
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void __iomem *prv_base;
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2013-03-07 06:46:20 +08:00
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if (!lpss_clk_dev)
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lpt_register_clock_device();
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2013-05-08 16:55:49 +08:00
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clk_data = platform_get_drvdata(lpss_clk_dev);
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if (!clk_data)
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return -ENODEV;
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2014-09-02 15:55:08 +08:00
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clk = clk_data->clk;
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2013-05-08 16:55:49 +08:00
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if (!pdata->mmio_base
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2013-03-07 06:46:28 +08:00
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|| pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
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2013-03-07 06:46:20 +08:00
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return -ENODATA;
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2013-05-13 20:42:44 +08:00
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parent = clk_data->name;
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2014-05-19 19:42:07 +08:00
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prv_base = pdata->mmio_base + dev_desc->prv_offset;
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2013-05-13 20:42:44 +08:00
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2014-09-02 15:55:09 +08:00
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|
|
if (pdata->fixed_clk_rate) {
|
|
|
|
clk = clk_register_fixed_rate(NULL, devname, parent, 0,
|
|
|
|
pdata->fixed_clk_rate);
|
|
|
|
goto out;
|
2013-05-13 20:42:44 +08:00
|
|
|
}
|
|
|
|
|
2014-09-02 15:55:07 +08:00
|
|
|
if (dev_desc->flags & LPSS_CLK_GATE) {
|
2014-05-19 19:42:07 +08:00
|
|
|
clk = clk_register_gate(NULL, devname, parent, 0,
|
|
|
|
prv_base, 0, 0, NULL);
|
|
|
|
parent = devname;
|
|
|
|
}
|
|
|
|
|
2014-09-02 15:55:07 +08:00
|
|
|
if (dev_desc->flags & LPSS_CLK_DIVIDER) {
|
2014-05-19 19:42:07 +08:00
|
|
|
/* Prevent division by zero */
|
|
|
|
if (!readl(prv_base))
|
|
|
|
writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
|
|
|
|
|
|
|
|
clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
|
|
|
|
if (!clk_name)
|
|
|
|
return -ENOMEM;
|
|
|
|
clk = clk_register_fractional_divider(NULL, clk_name, parent,
|
|
|
|
0, prv_base,
|
|
|
|
1, 15, 16, 15, 0, NULL);
|
|
|
|
parent = clk_name;
|
|
|
|
|
|
|
|
clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
|
|
|
|
if (!clk_name) {
|
|
|
|
kfree(parent);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
clk = clk_register_gate(NULL, clk_name, parent,
|
|
|
|
CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
|
|
|
|
prv_base, 31, 0, NULL);
|
|
|
|
kfree(parent);
|
|
|
|
kfree(clk_name);
|
2013-05-13 20:42:44 +08:00
|
|
|
}
|
2014-09-02 15:55:09 +08:00
|
|
|
out:
|
2013-05-13 20:42:44 +08:00
|
|
|
if (IS_ERR(clk))
|
|
|
|
return PTR_ERR(clk);
|
2013-03-07 06:46:20 +08:00
|
|
|
|
2014-05-19 19:42:07 +08:00
|
|
|
pdata->clk = clk;
|
|
|
|
clk_register_clkdev(clk, NULL, devname);
|
2013-03-07 06:46:20 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int acpi_lpss_create_device(struct acpi_device *adev,
|
|
|
|
const struct acpi_device_id *id)
|
|
|
|
{
|
|
|
|
struct lpss_device_desc *dev_desc;
|
|
|
|
struct lpss_private_data *pdata;
|
|
|
|
struct resource_list_entry *rentry;
|
|
|
|
struct list_head resource_list;
|
2014-05-25 20:38:52 +08:00
|
|
|
struct platform_device *pdev;
|
2013-03-07 06:46:20 +08:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
dev_desc = (struct lpss_device_desc *)id->driver_data;
|
2014-05-25 20:38:52 +08:00
|
|
|
if (!dev_desc) {
|
|
|
|
pdev = acpi_create_platform_device(adev);
|
|
|
|
return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
|
|
|
|
}
|
2013-03-07 06:46:20 +08:00
|
|
|
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
|
|
|
|
if (!pdata)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&resource_list);
|
|
|
|
ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
|
|
|
|
if (ret < 0)
|
|
|
|
goto err_out;
|
|
|
|
|
|
|
|
list_for_each_entry(rentry, &resource_list, node)
|
|
|
|
if (resource_type(&rentry->res) == IORESOURCE_MEM) {
|
2013-06-18 21:51:35 +08:00
|
|
|
if (dev_desc->prv_size_override)
|
|
|
|
pdata->mmio_size = dev_desc->prv_size_override;
|
|
|
|
else
|
|
|
|
pdata->mmio_size = resource_size(&rentry->res);
|
2013-03-07 06:46:20 +08:00
|
|
|
pdata->mmio_base = ioremap(rentry->res.start,
|
|
|
|
pdata->mmio_size);
|
2015-01-08 15:57:25 +08:00
|
|
|
if (!pdata->mmio_base)
|
|
|
|
goto err_out;
|
2013-03-07 06:46:20 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
acpi_dev_free_resource_list(&resource_list);
|
|
|
|
|
2013-09-02 18:30:25 +08:00
|
|
|
pdata->dev_desc = dev_desc;
|
|
|
|
|
2014-09-02 15:55:09 +08:00
|
|
|
if (dev_desc->setup)
|
|
|
|
dev_desc->setup(pdata);
|
|
|
|
|
2014-09-02 15:55:07 +08:00
|
|
|
if (dev_desc->flags & LPSS_CLK) {
|
2013-03-07 06:46:20 +08:00
|
|
|
ret = register_device_clock(adev, pdata);
|
|
|
|
if (ret) {
|
2013-06-19 06:45:34 +08:00
|
|
|
/* Skip the device, but continue the namespace scan. */
|
|
|
|
ret = 0;
|
|
|
|
goto err_out;
|
2013-03-07 06:46:20 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-06-19 06:45:34 +08:00
|
|
|
/*
|
|
|
|
* This works around a known issue in ACPI tables where LPSS devices
|
|
|
|
* have _PS0 and _PS3 without _PSC (and no power resources), so
|
|
|
|
* acpi_bus_init_power() will assume that the BIOS has put them into D0.
|
|
|
|
*/
|
|
|
|
ret = acpi_device_fix_up_power(adev);
|
|
|
|
if (ret) {
|
|
|
|
/* Skip the device, but continue the namespace scan. */
|
|
|
|
ret = 0;
|
|
|
|
goto err_out;
|
|
|
|
}
|
|
|
|
|
2013-03-07 06:46:20 +08:00
|
|
|
adev->driver_data = pdata;
|
2014-05-25 20:38:52 +08:00
|
|
|
pdev = acpi_create_platform_device(adev);
|
|
|
|
if (!IS_ERR_OR_NULL(pdev)) {
|
|
|
|
return 1;
|
|
|
|
}
|
2013-03-07 06:46:20 +08:00
|
|
|
|
2014-05-25 20:38:52 +08:00
|
|
|
ret = PTR_ERR(pdev);
|
2013-03-07 06:46:20 +08:00
|
|
|
adev->driver_data = NULL;
|
|
|
|
|
|
|
|
err_out:
|
|
|
|
kfree(pdata);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-02-11 07:35:53 +08:00
|
|
|
static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
|
|
|
|
{
|
|
|
|
return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
|
|
|
|
unsigned int reg)
|
|
|
|
{
|
|
|
|
writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
|
|
|
|
}
|
|
|
|
|
2013-03-07 06:46:28 +08:00
|
|
|
static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
|
|
|
|
{
|
|
|
|
struct acpi_device *adev;
|
|
|
|
struct lpss_private_data *pdata;
|
|
|
|
unsigned long flags;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
|
|
|
|
if (WARN_ON(ret))
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev->power.lock, flags);
|
|
|
|
if (pm_runtime_suspended(dev)) {
|
|
|
|
ret = -EAGAIN;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
pdata = acpi_driver_data(adev);
|
|
|
|
if (WARN_ON(!pdata || !pdata->mmio_base)) {
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto out;
|
|
|
|
}
|
2014-02-11 07:35:53 +08:00
|
|
|
*val = __lpss_reg_read(pdata, reg);
|
2013-03-07 06:46:28 +08:00
|
|
|
|
|
|
|
out:
|
|
|
|
spin_unlock_irqrestore(&dev->power.lock, flags);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
u32 ltr_value = 0;
|
|
|
|
unsigned int reg;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
|
|
|
|
ret = lpss_reg_read(dev, reg, <r_value);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t lpss_ltr_mode_show(struct device *dev,
|
|
|
|
struct device_attribute *attr, char *buf)
|
|
|
|
{
|
|
|
|
u32 ltr_mode = 0;
|
|
|
|
char *outstr;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
|
|
|
|
return sprintf(buf, "%s\n", outstr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
|
|
|
|
static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
|
|
|
|
static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
|
|
|
|
|
|
|
|
static struct attribute *lpss_attrs[] = {
|
|
|
|
&dev_attr_auto_ltr.attr,
|
|
|
|
&dev_attr_sw_ltr.attr,
|
|
|
|
&dev_attr_ltr_mode.attr,
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct attribute_group lpss_attr_group = {
|
|
|
|
.attrs = lpss_attrs,
|
|
|
|
.name = "lpss_ltr",
|
|
|
|
};
|
|
|
|
|
2014-02-11 07:35:53 +08:00
|
|
|
static void acpi_lpss_set_ltr(struct device *dev, s32 val)
|
|
|
|
{
|
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
u32 ltr_mode, ltr_val;
|
|
|
|
|
|
|
|
ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
|
|
|
|
if (val < 0) {
|
|
|
|
if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
|
|
|
|
ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
|
|
|
|
__lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
|
|
|
|
if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
|
|
|
|
ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
|
|
|
|
val = LPSS_LTR_MAX_VAL;
|
|
|
|
} else if (val > LPSS_LTR_MAX_VAL) {
|
|
|
|
ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
|
|
|
|
val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
|
|
|
|
} else {
|
|
|
|
ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
|
|
|
|
}
|
|
|
|
ltr_val |= val;
|
|
|
|
__lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
|
|
|
|
if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
|
|
|
|
ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
|
|
|
|
__lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
/**
|
|
|
|
* acpi_lpss_save_ctx() - Save the private registers of LPSS device
|
|
|
|
* @dev: LPSS device
|
2014-11-06 00:34:45 +08:00
|
|
|
* @pdata: pointer to the private data of the LPSS device
|
2014-05-23 21:15:09 +08:00
|
|
|
*
|
|
|
|
* Most LPSS devices have private registers which may loose their context when
|
|
|
|
* the device is powered down. acpi_lpss_save_ctx() saves those registers into
|
|
|
|
* prv_reg_ctx array.
|
|
|
|
*/
|
2014-11-06 00:34:45 +08:00
|
|
|
static void acpi_lpss_save_ctx(struct device *dev,
|
|
|
|
struct lpss_private_data *pdata)
|
2014-05-23 21:15:09 +08:00
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
|
|
|
|
unsigned long offset = i * sizeof(u32);
|
|
|
|
|
|
|
|
pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
|
|
|
|
dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
|
|
|
|
pdata->prv_reg_ctx[i], offset);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
|
|
|
|
* @dev: LPSS device
|
2014-11-06 00:34:45 +08:00
|
|
|
* @pdata: pointer to the private data of the LPSS device
|
2014-05-23 21:15:09 +08:00
|
|
|
*
|
|
|
|
* Restores the registers that were previously stored with acpi_lpss_save_ctx().
|
|
|
|
*/
|
2014-11-06 00:34:45 +08:00
|
|
|
static void acpi_lpss_restore_ctx(struct device *dev,
|
|
|
|
struct lpss_private_data *pdata)
|
2014-05-23 21:15:09 +08:00
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The following delay is needed or the subsequent write operations may
|
|
|
|
* fail. The LPSS devices are actually PCI devices and the PCI spec
|
|
|
|
* expects 10ms delay before the device can be accessed after D3 to D0
|
|
|
|
* transition.
|
|
|
|
*/
|
|
|
|
msleep(10);
|
|
|
|
|
|
|
|
for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
|
|
|
|
unsigned long offset = i * sizeof(u32);
|
|
|
|
|
|
|
|
__lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
|
|
|
|
dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
|
|
|
|
pdata->prv_reg_ctx[i], offset);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int acpi_lpss_suspend_late(struct device *dev)
|
|
|
|
{
|
2014-11-06 00:34:45 +08:00
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
int ret;
|
2014-05-23 21:15:09 +08:00
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
ret = pm_generic_suspend_late(dev);
|
2014-05-23 21:15:09 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
|
|
|
|
acpi_lpss_save_ctx(dev, pdata);
|
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
return acpi_dev_suspend_late(dev);
|
|
|
|
}
|
|
|
|
|
2014-09-09 22:30:06 +08:00
|
|
|
static int acpi_lpss_resume_early(struct device *dev)
|
2014-05-23 21:15:09 +08:00
|
|
|
{
|
2014-11-06 00:34:45 +08:00
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
int ret;
|
2014-05-23 21:15:09 +08:00
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
ret = acpi_dev_resume_early(dev);
|
2014-05-23 21:15:09 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
|
|
|
|
acpi_lpss_restore_ctx(dev, pdata);
|
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
return pm_generic_resume_early(dev);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
|
|
|
|
static int acpi_lpss_runtime_suspend(struct device *dev)
|
|
|
|
{
|
2014-11-06 00:34:45 +08:00
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
int ret;
|
2014-05-23 21:15:09 +08:00
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
ret = pm_generic_runtime_suspend(dev);
|
2014-05-23 21:15:09 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
|
|
|
|
acpi_lpss_save_ctx(dev, pdata);
|
|
|
|
|
2015-02-03 21:29:43 +08:00
|
|
|
return acpi_dev_runtime_suspend(dev);
|
2014-05-23 21:15:09 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int acpi_lpss_runtime_resume(struct device *dev)
|
|
|
|
{
|
2014-11-06 00:34:45 +08:00
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
int ret;
|
2014-05-23 21:15:09 +08:00
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
ret = acpi_dev_runtime_resume(dev);
|
2014-05-23 21:15:09 +08:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
|
|
|
|
acpi_lpss_restore_ctx(dev, pdata);
|
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
return pm_generic_runtime_resume(dev);
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
|
|
|
static struct dev_pm_domain acpi_lpss_pm_domain = {
|
|
|
|
.ops = {
|
2014-11-28 05:38:23 +08:00
|
|
|
#ifdef CONFIG_PM
|
2014-05-23 21:15:09 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
.prepare = acpi_subsys_prepare,
|
|
|
|
.complete = acpi_subsys_complete,
|
|
|
|
.suspend = acpi_subsys_suspend,
|
2014-09-09 22:30:06 +08:00
|
|
|
.suspend_late = acpi_lpss_suspend_late,
|
|
|
|
.resume_early = acpi_lpss_resume_early,
|
2014-05-23 21:15:09 +08:00
|
|
|
.freeze = acpi_subsys_freeze,
|
|
|
|
.poweroff = acpi_subsys_suspend,
|
2014-09-09 22:30:06 +08:00
|
|
|
.poweroff_late = acpi_lpss_suspend_late,
|
|
|
|
.restore_early = acpi_lpss_resume_early,
|
2014-05-23 21:15:09 +08:00
|
|
|
#endif
|
|
|
|
.runtime_suspend = acpi_lpss_runtime_suspend,
|
|
|
|
.runtime_resume = acpi_lpss_runtime_resume,
|
|
|
|
#endif
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2013-03-07 06:46:28 +08:00
|
|
|
static int acpi_lpss_platform_notify(struct notifier_block *nb,
|
|
|
|
unsigned long action, void *data)
|
|
|
|
{
|
|
|
|
struct platform_device *pdev = to_platform_device(data);
|
|
|
|
struct lpss_private_data *pdata;
|
|
|
|
struct acpi_device *adev;
|
|
|
|
const struct acpi_device_id *id;
|
|
|
|
|
|
|
|
id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
|
|
|
|
if (!id || !id->driver_data)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
pdata = acpi_driver_data(adev);
|
2014-11-06 00:34:45 +08:00
|
|
|
if (!pdata)
|
2013-03-07 06:46:28 +08:00
|
|
|
return 0;
|
|
|
|
|
2014-11-06 00:34:45 +08:00
|
|
|
if (pdata->mmio_base &&
|
|
|
|
pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
|
2013-03-07 06:46:28 +08:00
|
|
|
dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
switch (action) {
|
|
|
|
case BUS_NOTIFY_ADD_DEVICE:
|
2014-11-06 00:34:46 +08:00
|
|
|
pdev->dev.pm_domain = &acpi_lpss_pm_domain;
|
2014-09-02 15:55:07 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_LTR)
|
2014-05-23 21:15:09 +08:00
|
|
|
return sysfs_create_group(&pdev->dev.kobj,
|
|
|
|
&lpss_attr_group);
|
2014-11-06 00:34:46 +08:00
|
|
|
break;
|
2014-05-23 21:15:09 +08:00
|
|
|
case BUS_NOTIFY_DEL_DEVICE:
|
2014-09-02 15:55:07 +08:00
|
|
|
if (pdata->dev_desc->flags & LPSS_LTR)
|
2014-05-23 21:15:09 +08:00
|
|
|
sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
|
2014-11-06 00:34:46 +08:00
|
|
|
pdev->dev.pm_domain = NULL;
|
|
|
|
break;
|
2014-05-23 21:15:09 +08:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2013-03-07 06:46:28 +08:00
|
|
|
|
2014-05-23 21:15:09 +08:00
|
|
|
return 0;
|
2013-03-07 06:46:28 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct notifier_block acpi_lpss_nb = {
|
|
|
|
.notifier_call = acpi_lpss_platform_notify,
|
|
|
|
};
|
|
|
|
|
2014-02-11 07:35:53 +08:00
|
|
|
static void acpi_lpss_bind(struct device *dev)
|
|
|
|
{
|
|
|
|
struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
|
|
|
|
|
2014-09-02 15:55:07 +08:00
|
|
|
if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
|
2014-02-11 07:35:53 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
|
|
|
|
dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
|
|
|
|
else
|
|
|
|
dev_err(dev, "MMIO size insufficient to access LTR\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void acpi_lpss_unbind(struct device *dev)
|
|
|
|
{
|
|
|
|
dev->power.set_latency_tolerance = NULL;
|
|
|
|
}
|
|
|
|
|
2013-03-07 06:46:20 +08:00
|
|
|
static struct acpi_scan_handler lpss_handler = {
|
|
|
|
.ids = acpi_lpss_device_ids,
|
|
|
|
.attach = acpi_lpss_create_device,
|
2014-02-11 07:35:53 +08:00
|
|
|
.bind = acpi_lpss_bind,
|
|
|
|
.unbind = acpi_lpss_unbind,
|
2013-03-07 06:46:20 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
void __init acpi_lpss_init(void)
|
|
|
|
{
|
2013-03-07 06:46:28 +08:00
|
|
|
if (!lpt_clk_init()) {
|
|
|
|
bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
|
2013-03-07 06:46:20 +08:00
|
|
|
acpi_scan_add_handler(&lpss_handler);
|
2013-03-07 06:46:28 +08:00
|
|
|
}
|
2013-03-07 06:46:20 +08:00
|
|
|
}
|
2014-05-30 20:34:05 +08:00
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
static struct acpi_scan_handler lpss_handler = {
|
|
|
|
.ids = acpi_lpss_device_ids,
|
|
|
|
};
|
|
|
|
|
|
|
|
void __init acpi_lpss_init(void)
|
|
|
|
{
|
|
|
|
acpi_scan_add_handler(&lpss_handler);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CONFIG_X86_INTEL_LPSS */
|