2012-11-06 14:09:04 +08:00
|
|
|
/*
|
|
|
|
* Samsung's Exynos4212 SoC device tree source
|
|
|
|
*
|
|
|
|
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
|
|
|
|
* http://www.samsung.com
|
|
|
|
*
|
|
|
|
* Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
|
|
|
|
* based board files can include this file and provide values for board specfic
|
|
|
|
* bindings.
|
|
|
|
*
|
|
|
|
* Note: This file does not include device nodes for all the controllers in
|
|
|
|
* Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
|
|
|
|
* nodes can be added to this file.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*/
|
|
|
|
|
2013-06-17 23:02:08 +08:00
|
|
|
#include "exynos4x12.dtsi"
|
2012-11-06 14:09:04 +08:00
|
|
|
|
|
|
|
/ {
|
2014-03-21 01:17:22 +08:00
|
|
|
compatible = "samsung,exynos4212", "samsung,exynos4";
|
2012-11-06 14:09:04 +08:00
|
|
|
|
2014-09-25 16:40:14 +08:00
|
|
|
cpus {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cpu@A00 {
|
|
|
|
device_type = "cpu";
|
|
|
|
compatible = "arm,cortex-a9";
|
|
|
|
reg = <0xA00>;
|
|
|
|
};
|
|
|
|
|
|
|
|
cpu@A01 {
|
|
|
|
device_type = "cpu";
|
|
|
|
compatible = "arm,cortex-a9";
|
|
|
|
reg = <0xA01>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-03-18 05:25:59 +08:00
|
|
|
combiner: interrupt-controller@10440000 {
|
|
|
|
samsung,combiner-nr = <18>;
|
2012-11-06 14:09:04 +08:00
|
|
|
};
|
2013-03-09 15:12:35 +08:00
|
|
|
|
2014-03-18 05:25:59 +08:00
|
|
|
gic: interrupt-controller@10490000 {
|
|
|
|
cpu-offset = <0x8000>;
|
2013-04-12 21:15:58 +08:00
|
|
|
};
|
2012-11-06 14:09:04 +08:00
|
|
|
};
|