2020-07-03 16:49:41 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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#include <linux/spinlock.h>
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#include <asm/barrier.h>
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#include <asm/sysreg.h>
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#include <soc/qcom/kryo-l2-accessors.h>
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#define L2CPUSRSELR_EL1 sys_reg(3, 3, 15, 0, 6)
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#define L2CPUSRDR_EL1 sys_reg(3, 3, 15, 0, 7)
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static DEFINE_RAW_SPINLOCK(l2_access_lock);
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/**
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* kryo_l2_set_indirect_reg() - write value to an L2 register
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* @reg: Address of L2 register.
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2020-11-03 23:28:35 +08:00
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* @val: Value to be written to register.
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2020-07-03 16:49:41 +08:00
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*
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* Use architecturally required barriers for ordering between system register
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* accesses, and system registers with respect to device memory
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*/
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void kryo_l2_set_indirect_reg(u64 reg, u64 val)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&l2_access_lock, flags);
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write_sysreg_s(reg, L2CPUSRSELR_EL1);
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isb();
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write_sysreg_s(val, L2CPUSRDR_EL1);
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isb();
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raw_spin_unlock_irqrestore(&l2_access_lock, flags);
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}
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EXPORT_SYMBOL(kryo_l2_set_indirect_reg);
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/**
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* kryo_l2_get_indirect_reg() - read an L2 register value
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* @reg: Address of L2 register.
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*
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* Use architecturally required barriers for ordering between system register
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* accesses, and system registers with respect to device memory
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*/
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u64 kryo_l2_get_indirect_reg(u64 reg)
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{
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u64 val;
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unsigned long flags;
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raw_spin_lock_irqsave(&l2_access_lock, flags);
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write_sysreg_s(reg, L2CPUSRSELR_EL1);
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isb();
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val = read_sysreg_s(L2CPUSRDR_EL1);
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raw_spin_unlock_irqrestore(&l2_access_lock, flags);
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return val;
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}
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EXPORT_SYMBOL(kryo_l2_get_indirect_reg);
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