License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2011-11-23 22:30:32 +08:00
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#ifndef ARCH_X86_KVM_CPUID_H
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#define ARCH_X86_KVM_CPUID_H
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#include "x86.h"
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2015-11-23 18:12:22 +08:00
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#include <asm/cpu.h>
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2017-08-05 06:12:49 +08:00
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#include <asm/processor.h>
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2020-08-18 23:24:28 +08:00
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#include <uapi/asm/kvm_para.h>
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2011-11-23 22:30:32 +08:00
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KVM: x86: Introduce kvm_cpu_caps to replace runtime CPUID masking
Calculate the CPUID masks for KVM_GET_SUPPORTED_CPUID at load time using
what is effectively a KVM-adjusted copy of boot_cpu_data, or more
precisely, the x86_capability array in boot_cpu_data.
In terms of KVM support, the vast majority of CPUID feature bits are
constant, and *all* feature support is known at KVM load time. Rather
than apply boot_cpu_data, which is effectively read-only after init,
at runtime, copy it into a KVM-specific array and use *that* to mask
CPUID registers.
In additional to consolidating the masking, kvm_cpu_caps can be adjusted
by SVM/VMX at load time and thus eliminate all feature bit manipulation
in ->set_supported_cpuid().
Opportunistically clean up a few warts:
- Replace bare "unsigned" with "unsigned int" when a feature flag is
captured in a local variable, e.g. f_nx.
- Sort the CPUID masks by function, index and register (alphabetically
for registers, i.e. EBX comes before ECX/EDX).
- Remove the superfluous /* cpuid 7.0.ecx */ comments.
No functional change intended.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
[Call kvm_set_cpu_caps from kvm_x86_ops->hardware_setup due to fixed
GBPAGES patch. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-03 07:56:41 +08:00
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extern u32 kvm_cpu_caps[NCAPINTS] __read_mostly;
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void kvm_set_cpu_caps(void);
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2020-07-09 12:34:23 +08:00
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void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu);
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2020-10-28 07:10:42 +08:00
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void kvm_update_pv_runtime(struct kvm_vcpu *vcpu);
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2011-11-23 22:30:32 +08:00
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struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
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u32 function, u32 index);
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2013-09-22 22:44:50 +08:00
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int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries,
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unsigned int type);
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2011-11-23 22:30:32 +08:00
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int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
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struct kvm_cpuid *cpuid,
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struct kvm_cpuid_entry __user *entries);
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int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries);
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int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries);
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2017-08-24 20:27:52 +08:00
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bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
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2020-03-05 09:34:37 +08:00
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u32 *ecx, u32 *edx, bool exact_only);
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2011-11-23 22:30:32 +08:00
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2015-03-30 04:56:12 +08:00
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int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu);
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2021-02-04 08:01:15 +08:00
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u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu);
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2015-03-30 04:56:12 +08:00
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static inline int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.maxphyaddr;
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}
|
2011-11-23 22:30:32 +08:00
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2021-02-04 08:01:08 +08:00
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static inline bool kvm_vcpu_is_legal_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
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KVM: x86: SEV: Treat C-bit as legal GPA bit regardless of vCPU mode
Rename cr3_lm_rsvd_bits to reserved_gpa_bits, and use it for all GPA
legality checks. AMD's APM states:
If the C-bit is an address bit, this bit is masked from the guest
physical address when it is translated through the nested page tables.
Thus, any access that can conceivably be run through NPT should ignore
the C-bit when checking for validity.
For features that KVM emulates in software, e.g. MTRRs, there is no
clear direction in the APM for how the C-bit should be handled. For
such cases, follow the SME behavior inasmuch as possible, since SEV is
is essentially a VM-specific variant of SME. For SME, the APM states:
In this case the upper physical address bits are treated as reserved
when the feature is enabled except where otherwise indicated.
Collecting the various relavant SME snippets in the APM and cross-
referencing the omissions with Linux kernel code, this leaves MTTRs and
APIC_BASE as the only flows that KVM emulates that should _not_ ignore
the C-bit.
Note, this means the reserved bit checks in the page tables are
technically broken. This will be remedied in a future patch.
Although the page table checks are technically broken, in practice, it's
all but guaranteed to be irrelevant. NPT is required for SEV, i.e.
shadowing page tables isn't needed in the common case. Theoretically,
the checks could be in play for nested NPT, but it's extremely unlikely
that anyone is running nested VMs on SEV, as doing so would require L1
to expose sensitive data to L0, e.g. the entire VMCB. And if anyone is
running nested VMs, L0 can't read the guest's encrypted memory, i.e. L1
would need to put its NPT in shared memory, in which case the C-bit will
never be set. Or, L1 could use shadow paging, but again, if L0 needs to
read page tables, e.g. to load PDPTRs, the memory can't be encrypted if
L1 has any expectation of L0 doing the right thing.
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210204000117.3303214-8-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-04 08:01:12 +08:00
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return !(gpa & vcpu->arch.reserved_gpa_bits);
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2021-02-04 08:01:08 +08:00
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}
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2020-09-25 03:42:49 +08:00
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static inline bool kvm_vcpu_is_illegal_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
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2021-02-04 08:01:08 +08:00
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return !kvm_vcpu_is_legal_gpa(vcpu, gpa);
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}
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2021-02-04 08:01:09 +08:00
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static inline bool kvm_vcpu_is_legal_aligned_gpa(struct kvm_vcpu *vcpu,
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gpa_t gpa, gpa_t alignment)
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{
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return IS_ALIGNED(gpa, alignment) && kvm_vcpu_is_legal_gpa(vcpu, gpa);
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}
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2021-02-04 08:01:08 +08:00
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static inline bool page_address_valid(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
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2021-02-04 08:01:09 +08:00
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return kvm_vcpu_is_legal_aligned_gpa(vcpu, gpa, PAGE_SIZE);
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2020-09-25 03:42:49 +08:00
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}
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2017-08-05 06:12:49 +08:00
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struct cpuid_reg {
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u32 function;
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u32 index;
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int reg;
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};
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2011-11-23 22:30:32 +08:00
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2017-08-05 06:12:49 +08:00
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static const struct cpuid_reg reverse_cpuid[] = {
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[CPUID_1_EDX] = { 1, 0, CPUID_EDX},
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[CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
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[CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
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[CPUID_1_ECX] = { 1, 0, CPUID_ECX},
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[CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
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2017-11-07 01:44:23 +08:00
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[CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
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2017-08-05 06:12:49 +08:00
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[CPUID_7_0_EBX] = { 7, 0, CPUID_EBX},
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[CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX},
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[CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
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[CPUID_6_EAX] = { 6, 0, CPUID_EAX},
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[CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
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[CPUID_7_ECX] = { 7, 0, CPUID_ECX},
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[CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
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2018-02-02 05:59:42 +08:00
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[CPUID_7_EDX] = { 7, 0, CPUID_EDX},
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2019-12-18 05:32:40 +08:00
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[CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
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2017-08-05 06:12:49 +08:00
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};
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2011-11-23 22:30:32 +08:00
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2019-12-18 05:32:41 +08:00
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/*
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* Reverse CPUID and its derivatives can only be used for hardware-defined
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* feature words, i.e. words whose bits directly correspond to a CPUID leaf.
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* Retrieving a feature bit or masking guest CPUID from a Linux-defined word
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* is nonsensical as the bit number/mask is an arbitrary software-defined value
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* and can't be used by KVM to query/control guest capabilities. And obviously
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* the leaf being queried must have an entry in the lookup table.
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*/
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2020-03-03 07:56:29 +08:00
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static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
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2019-12-18 05:32:39 +08:00
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{
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2019-12-18 05:32:41 +08:00
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
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BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
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BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
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BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
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}
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/*
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* Retrieve the bit mask from an X86_FEATURE_* definition. Features contain
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* the hardware defined bit number (stored in bits 4:0) and a software defined
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* "word" (stored in bits 31:5). The word is used to index into arrays of
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* bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
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*/
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2019-12-18 05:32:42 +08:00
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static __always_inline u32 __feature_bit(int x86_feature)
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2019-12-18 05:32:41 +08:00
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{
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reverse_cpuid_check(x86_feature / 32);
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return 1 << (x86_feature & 31);
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2019-12-18 05:32:39 +08:00
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}
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2019-12-18 05:32:42 +08:00
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#define feature_bit(name) __feature_bit(X86_FEATURE_##name)
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2020-03-03 07:56:29 +08:00
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static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
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2015-12-22 22:20:00 +08:00
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{
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2020-03-03 07:56:29 +08:00
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unsigned int x86_leaf = x86_feature / 32;
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2015-12-22 22:20:00 +08:00
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2019-12-18 05:32:41 +08:00
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reverse_cpuid_check(x86_leaf);
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2017-08-05 06:12:49 +08:00
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return reverse_cpuid[x86_leaf];
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2011-11-23 22:30:32 +08:00
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}
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2020-03-03 07:56:30 +08:00
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static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
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2020-03-26 03:12:59 +08:00
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u32 reg)
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2014-04-01 17:46:34 +08:00
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{
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2020-03-26 03:12:59 +08:00
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switch (reg) {
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2017-08-05 06:12:49 +08:00
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case CPUID_EAX:
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return &entry->eax;
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case CPUID_EBX:
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return &entry->ebx;
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case CPUID_ECX:
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return &entry->ecx;
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case CPUID_EDX:
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return &entry->edx;
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default:
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BUILD_BUG();
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return NULL;
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}
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2012-01-10 03:00:35 +08:00
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}
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2020-03-03 07:56:30 +08:00
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static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
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2020-03-26 03:12:59 +08:00
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return __cpuid_entry_get_reg(entry, cpuid.reg);
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2020-03-03 07:56:30 +08:00
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}
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static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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return *reg & __feature_bit(x86_feature);
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}
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static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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return cpuid_entry_get(entry, x86_feature);
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}
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2020-03-03 07:56:31 +08:00
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static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
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unsigned int x86_feature)
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{
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u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
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*reg &= ~__feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
|
|
|
|
unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
|
|
|
|
|
|
|
|
*reg |= __feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
|
|
|
|
unsigned int x86_feature,
|
|
|
|
bool set)
|
|
|
|
{
|
|
|
|
u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Open coded instead of using cpuid_entry_{clear,set}() to coerce the
|
|
|
|
* compiler into using CMOV instead of Jcc when possible.
|
|
|
|
*/
|
|
|
|
if (set)
|
|
|
|
*reg |= __feature_bit(x86_feature);
|
|
|
|
else
|
|
|
|
*reg &= ~__feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:53 +08:00
|
|
|
static __always_inline void cpuid_entry_override(struct kvm_cpuid_entry2 *entry,
|
|
|
|
enum cpuid_leafs leaf)
|
2020-03-03 07:56:32 +08:00
|
|
|
{
|
|
|
|
u32 *reg = cpuid_entry_get_reg(entry, leaf * 32);
|
|
|
|
|
KVM: x86: Introduce kvm_cpu_caps to replace runtime CPUID masking
Calculate the CPUID masks for KVM_GET_SUPPORTED_CPUID at load time using
what is effectively a KVM-adjusted copy of boot_cpu_data, or more
precisely, the x86_capability array in boot_cpu_data.
In terms of KVM support, the vast majority of CPUID feature bits are
constant, and *all* feature support is known at KVM load time. Rather
than apply boot_cpu_data, which is effectively read-only after init,
at runtime, copy it into a KVM-specific array and use *that* to mask
CPUID registers.
In additional to consolidating the masking, kvm_cpu_caps can be adjusted
by SVM/VMX at load time and thus eliminate all feature bit manipulation
in ->set_supported_cpuid().
Opportunistically clean up a few warts:
- Replace bare "unsigned" with "unsigned int" when a feature flag is
captured in a local variable, e.g. f_nx.
- Sort the CPUID masks by function, index and register (alphabetically
for registers, i.e. EBX comes before ECX/EDX).
- Remove the superfluous /* cpuid 7.0.ecx */ comments.
No functional change intended.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
[Call kvm_set_cpu_caps from kvm_x86_ops->hardware_setup due to fixed
GBPAGES patch. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-03 07:56:41 +08:00
|
|
|
BUILD_BUG_ON(leaf >= ARRAY_SIZE(kvm_cpu_caps));
|
2020-03-03 07:56:53 +08:00
|
|
|
*reg = kvm_cpu_caps[leaf];
|
2020-03-03 07:56:32 +08:00
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:30 +08:00
|
|
|
static __always_inline u32 *guest_cpuid_get_register(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
|
|
|
|
struct kvm_cpuid_entry2 *entry;
|
|
|
|
|
|
|
|
entry = kvm_find_cpuid_entry(vcpu, cpuid.function, cpuid.index);
|
|
|
|
if (!entry)
|
|
|
|
return NULL;
|
|
|
|
|
2020-03-26 03:12:59 +08:00
|
|
|
return __cpuid_entry_get_reg(entry, cpuid.reg);
|
2020-03-03 07:56:30 +08:00
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:29 +08:00
|
|
|
static __always_inline bool guest_cpuid_has(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned int x86_feature)
|
2012-07-02 09:18:48 +08:00
|
|
|
{
|
2020-03-03 07:56:28 +08:00
|
|
|
u32 *reg;
|
2012-07-02 09:18:48 +08:00
|
|
|
|
2017-08-05 06:12:49 +08:00
|
|
|
reg = guest_cpuid_get_register(vcpu, x86_feature);
|
|
|
|
if (!reg)
|
|
|
|
return false;
|
2014-01-24 23:48:44 +08:00
|
|
|
|
2019-12-18 05:32:42 +08:00
|
|
|
return *reg & __feature_bit(x86_feature);
|
2014-01-24 23:48:44 +08:00
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:29 +08:00
|
|
|
static __always_inline void guest_cpuid_clear(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned int x86_feature)
|
2017-08-05 06:12:50 +08:00
|
|
|
{
|
2020-03-03 07:56:28 +08:00
|
|
|
u32 *reg;
|
2017-08-05 06:12:50 +08:00
|
|
|
|
|
|
|
reg = guest_cpuid_get_register(vcpu, x86_feature);
|
|
|
|
if (reg)
|
2019-12-18 05:32:42 +08:00
|
|
|
*reg &= ~__feature_bit(x86_feature);
|
2017-08-05 06:12:50 +08:00
|
|
|
}
|
|
|
|
|
2020-03-05 09:34:33 +08:00
|
|
|
static inline bool guest_cpuid_is_amd_or_hygon(struct kvm_vcpu *vcpu)
|
2014-09-02 19:24:12 +08:00
|
|
|
{
|
|
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
|
|
|
|
best = kvm_find_cpuid_entry(vcpu, 0, 0);
|
2020-03-05 09:34:33 +08:00
|
|
|
return best &&
|
|
|
|
(is_guest_vendor_amd(best->ebx, best->ecx, best->edx) ||
|
|
|
|
is_guest_vendor_hygon(best->ebx, best->ecx, best->edx));
|
2014-09-02 19:24:12 +08:00
|
|
|
}
|
|
|
|
|
2015-11-23 18:12:22 +08:00
|
|
|
static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
|
|
|
|
best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
|
|
|
|
if (!best)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
return x86_family(best->eax);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int guest_cpuid_model(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
|
|
|
|
best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
|
|
|
|
if (!best)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
return x86_model(best->eax);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
|
|
|
|
best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
|
|
|
|
if (!best)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
return x86_stepping(best->eax);
|
|
|
|
}
|
|
|
|
|
2020-12-03 22:40:15 +08:00
|
|
|
static inline bool guest_has_spec_ctrl_msr(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return (guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) ||
|
|
|
|
guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) ||
|
|
|
|
guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) ||
|
|
|
|
guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool guest_has_pred_cmd_msr(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return (guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) ||
|
|
|
|
guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBPB));
|
|
|
|
}
|
|
|
|
|
2017-03-20 16:16:28 +08:00
|
|
|
static inline bool supports_cpuid_fault(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool cpuid_fault_enabled(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return vcpu->arch.msr_misc_features_enables &
|
|
|
|
MSR_MISC_FEATURES_ENABLES_CPUID_FAULT;
|
|
|
|
}
|
|
|
|
|
KVM: x86: Introduce kvm_cpu_caps to replace runtime CPUID masking
Calculate the CPUID masks for KVM_GET_SUPPORTED_CPUID at load time using
what is effectively a KVM-adjusted copy of boot_cpu_data, or more
precisely, the x86_capability array in boot_cpu_data.
In terms of KVM support, the vast majority of CPUID feature bits are
constant, and *all* feature support is known at KVM load time. Rather
than apply boot_cpu_data, which is effectively read-only after init,
at runtime, copy it into a KVM-specific array and use *that* to mask
CPUID registers.
In additional to consolidating the masking, kvm_cpu_caps can be adjusted
by SVM/VMX at load time and thus eliminate all feature bit manipulation
in ->set_supported_cpuid().
Opportunistically clean up a few warts:
- Replace bare "unsigned" with "unsigned int" when a feature flag is
captured in a local variable, e.g. f_nx.
- Sort the CPUID masks by function, index and register (alphabetically
for registers, i.e. EBX comes before ECX/EDX).
- Remove the superfluous /* cpuid 7.0.ecx */ comments.
No functional change intended.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
[Call kvm_set_cpu_caps from kvm_x86_ops->hardware_setup due to fixed
GBPAGES patch. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-03 07:56:41 +08:00
|
|
|
static __always_inline void kvm_cpu_cap_clear(unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
unsigned int x86_leaf = x86_feature / 32;
|
|
|
|
|
|
|
|
reverse_cpuid_check(x86_leaf);
|
|
|
|
kvm_cpu_caps[x86_leaf] &= ~__feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __always_inline void kvm_cpu_cap_set(unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
unsigned int x86_leaf = x86_feature / 32;
|
|
|
|
|
|
|
|
reverse_cpuid_check(x86_leaf);
|
|
|
|
kvm_cpu_caps[x86_leaf] |= __feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:46 +08:00
|
|
|
static __always_inline u32 kvm_cpu_cap_get(unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
unsigned int x86_leaf = x86_feature / 32;
|
|
|
|
|
|
|
|
reverse_cpuid_check(x86_leaf);
|
|
|
|
return kvm_cpu_caps[x86_leaf] & __feature_bit(x86_feature);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __always_inline bool kvm_cpu_cap_has(unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
return !!kvm_cpu_cap_get(x86_feature);
|
|
|
|
}
|
|
|
|
|
2020-03-03 07:56:45 +08:00
|
|
|
static __always_inline void kvm_cpu_cap_check_and_set(unsigned int x86_feature)
|
|
|
|
{
|
|
|
|
if (boot_cpu_has(x86_feature))
|
|
|
|
kvm_cpu_cap_set(x86_feature);
|
|
|
|
}
|
|
|
|
|
2020-08-18 23:24:28 +08:00
|
|
|
static __always_inline bool guest_pv_has(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned int kvm_feature)
|
|
|
|
{
|
|
|
|
if (!vcpu->arch.pv_cpuid.enforce)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return vcpu->arch.pv_cpuid.features & (1u << kvm_feature);
|
|
|
|
}
|
|
|
|
|
2011-11-23 22:30:32 +08:00
|
|
|
#endif
|