2014-11-24 12:58:59 +08:00
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/*
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
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*
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2015-11-09 12:48:59 +08:00
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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* Caesar Wang <wxt@rock-chips.com>
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*
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2014-11-24 12:58:59 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/thermal.h>
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2015-11-12 11:43:11 +08:00
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#include <linux/pinctrl/consumer.h>
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2014-11-24 12:58:59 +08:00
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/**
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* If the temperature over a period of time High,
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* the resulting TSHUT gave CRU module,let it reset the entire chip,
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* or via GPIO give PMIC.
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*/
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enum tshut_mode {
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TSHUT_MODE_CRU = 0,
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TSHUT_MODE_GPIO,
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};
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/**
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2015-12-03 16:48:39 +08:00
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* The system Temperature Sensors tshut(tshut) polarity
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2014-11-24 12:58:59 +08:00
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* the bit 8 is tshut polarity.
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* 0: low active, 1: high active
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*/
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enum tshut_polarity {
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TSHUT_LOW_ACTIVE = 0,
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TSHUT_HIGH_ACTIVE,
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};
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/**
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2015-11-05 13:17:58 +08:00
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* The system has two Temperature Sensors.
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* sensor0 is for CPU, and sensor1 is for GPU.
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2014-11-24 12:58:59 +08:00
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*/
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enum sensor_id {
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2015-11-05 13:17:58 +08:00
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SENSOR_CPU = 0,
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2014-11-24 12:58:59 +08:00
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SENSOR_GPU,
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};
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2015-11-09 12:48:57 +08:00
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/**
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2015-12-03 16:48:39 +08:00
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* The conversion table has the adc value and temperature.
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* ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
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* ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
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*/
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2015-11-09 12:48:57 +08:00
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enum adc_sort_mode {
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ADC_DECREMENT = 0,
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ADC_INCREMENT,
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};
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2015-11-05 13:17:58 +08:00
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/**
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* The max sensors is two in rockchip SoCs.
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* Two sensors: CPU and GPU sensor.
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*/
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#define SOC_MAX_SENSORS 2
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2015-12-03 16:48:39 +08:00
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/**
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* struct chip_tsadc_table: hold information about chip-specific differences
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* @id: conversion table
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* @length: size of conversion table
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* @data_mask: mask to apply on data inputs
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* @mode: sort mode of this adc variant (incrementing or decrementing)
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*/
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2015-11-09 12:48:56 +08:00
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struct chip_tsadc_table {
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const struct tsadc_table *id;
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unsigned int length;
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u32 data_mask;
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2015-11-09 12:48:57 +08:00
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enum adc_sort_mode mode;
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2015-11-09 12:48:56 +08:00
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};
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2014-11-24 12:58:59 +08:00
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struct rockchip_tsadc_chip {
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2015-11-05 13:17:58 +08:00
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/* The sensor id of chip correspond to the ADC channel */
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int chn_id[SOC_MAX_SENSORS];
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int chn_num;
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2014-11-24 12:58:59 +08:00
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/* The hardware-controlled tshut property */
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2015-11-09 12:48:58 +08:00
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int tshut_temp;
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2014-11-24 12:58:59 +08:00
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enum tshut_mode tshut_mode;
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enum tshut_polarity tshut_polarity;
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/* Chip-wide methods */
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void (*initialize)(void __iomem *reg, enum tshut_polarity p);
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void (*irq_ack)(void __iomem *reg);
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void (*control)(void __iomem *reg, bool on);
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/* Per-sensor methods */
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2015-11-09 12:48:56 +08:00
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int (*get_temp)(struct chip_tsadc_table table,
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int chn, void __iomem *reg, int *temp);
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void (*set_tshut_temp)(struct chip_tsadc_table table,
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2015-11-09 12:48:58 +08:00
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int chn, void __iomem *reg, int temp);
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2014-11-24 12:58:59 +08:00
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void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
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2015-11-09 12:48:56 +08:00
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/* Per-table methods */
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struct chip_tsadc_table table;
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2014-11-24 12:58:59 +08:00
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};
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struct rockchip_thermal_sensor {
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struct rockchip_thermal_data *thermal;
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struct thermal_zone_device *tzd;
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2015-11-05 13:17:58 +08:00
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int id;
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2014-11-24 12:58:59 +08:00
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};
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struct rockchip_thermal_data {
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const struct rockchip_tsadc_chip *chip;
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struct platform_device *pdev;
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struct reset_control *reset;
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2015-11-05 13:17:58 +08:00
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struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
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2014-11-24 12:58:59 +08:00
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struct clk *clk;
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struct clk *pclk;
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void __iomem *regs;
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2015-11-09 12:48:58 +08:00
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int tshut_temp;
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2014-11-24 12:58:59 +08:00
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enum tshut_mode tshut_mode;
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enum tshut_polarity tshut_polarity;
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};
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2015-11-05 13:17:58 +08:00
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/* TSADC Sensor info define: */
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2014-11-24 12:58:59 +08:00
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#define TSADCV2_AUTO_CON 0x04
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#define TSADCV2_INT_EN 0x08
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#define TSADCV2_INT_PD 0x0c
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#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
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#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
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#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
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#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
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#define TSADCV2_AUTO_PERIOD 0x68
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#define TSADCV2_AUTO_PERIOD_HT 0x6c
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
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2015-12-03 16:48:42 +08:00
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#define TSADCV1_INT_PD_CLEAR_MASK ~BIT(16)
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2015-08-08 05:00:52 +08:00
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#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
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2014-11-24 12:58:59 +08:00
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#define TSADCV2_DATA_MASK 0xfff
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2015-11-09 12:48:59 +08:00
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#define TSADCV3_DATA_MASK 0x3ff
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2014-11-24 12:58:59 +08:00
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#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
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#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
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#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
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#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
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struct tsadc_table {
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2015-08-08 04:59:23 +08:00
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u32 code;
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2015-11-09 12:48:58 +08:00
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int temp;
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2014-11-24 12:58:59 +08:00
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};
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2015-12-03 16:48:42 +08:00
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/**
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* Note:
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* Code to Temperature mapping of the Temperature sensor is a piece wise linear
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* curve.Any temperature, code faling between to 2 give temperatures can be
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* linearly interpolated.
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* Code to Temperature mapping should be updated based on sillcon results.
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*/
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static const struct tsadc_table v1_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{436, -40000},
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{431, -35000},
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{426, -30000},
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{421, -25000},
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{416, -20000},
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{411, -15000},
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{406, -10000},
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{401, -5000},
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{395, 0},
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{390, 5000},
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{385, 10000},
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{380, 15000},
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{375, 20000},
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{370, 25000},
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{364, 30000},
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{359, 35000},
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{354, 40000},
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{349, 45000},
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{343, 50000},
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{338, 55000},
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{333, 60000},
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{328, 65000},
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{322, 70000},
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{317, 75000},
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{312, 80000},
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{307, 85000},
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{301, 90000},
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{296, 95000},
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{291, 100000},
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{286, 105000},
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{280, 110000},
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{275, 115000},
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{270, 120000},
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{264, 125000},
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};
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2014-11-24 12:58:59 +08:00
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static const struct tsadc_table v2_code_table[] = {
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{TSADCV2_DATA_MASK, -40000},
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{3800, -40000},
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{3792, -35000},
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{3783, -30000},
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{3774, -25000},
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{3765, -20000},
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{3756, -15000},
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{3747, -10000},
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{3737, -5000},
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{3728, 0},
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{3718, 5000},
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{3708, 10000},
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{3698, 15000},
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{3688, 20000},
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{3678, 25000},
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{3667, 30000},
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{3656, 35000},
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{3645, 40000},
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{3634, 45000},
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{3623, 50000},
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{3611, 55000},
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{3600, 60000},
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{3588, 65000},
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{3575, 70000},
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{3563, 75000},
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{3550, 80000},
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{3537, 85000},
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{3524, 90000},
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{3510, 95000},
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{3496, 100000},
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{3482, 105000},
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{3467, 110000},
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{3452, 115000},
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{3437, 120000},
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{3421, 125000},
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};
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2015-11-09 12:48:59 +08:00
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static const struct tsadc_table v3_code_table[] = {
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{0, -40000},
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{106, -40000},
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{108, -35000},
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{110, -30000},
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{112, -25000},
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{114, -20000},
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{116, -15000},
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{118, -10000},
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{120, -5000},
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{122, 0},
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{124, 5000},
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{126, 10000},
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{128, 15000},
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{130, 20000},
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{132, 25000},
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{134, 30000},
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{136, 35000},
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{138, 40000},
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{140, 45000},
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{142, 50000},
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{144, 55000},
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{146, 60000},
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{148, 65000},
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{150, 70000},
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{152, 75000},
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{154, 80000},
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{156, 85000},
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{158, 90000},
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{160, 95000},
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{162, 100000},
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{163, 105000},
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{165, 110000},
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{167, 115000},
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{169, 120000},
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{171, 125000},
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{TSADCV3_DATA_MASK, 125000},
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};
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2015-12-03 16:48:43 +08:00
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static const struct tsadc_table v4_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{431, -40000},
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{426, -35000},
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{421, -30000},
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{415, -25000},
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{410, -20000},
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{405, -15000},
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{399, -10000},
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{394, -5000},
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{389, 0},
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{383, 5000},
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{378, 10000},
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{373, 15000},
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{367, 20000},
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{362, 25000},
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{357, 30000},
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{351, 35000},
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{346, 40000},
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{340, 45000},
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{335, 50000},
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{330, 55000},
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{324, 60000},
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{319, 65000},
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{313, 70000},
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{308, 75000},
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{302, 80000},
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{297, 85000},
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{291, 90000},
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{286, 95000},
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{281, 100000},
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{275, 105000},
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{270, 110000},
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{264, 115000},
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{259, 120000},
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{253, 125000},
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};
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2015-11-09 12:48:56 +08:00
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static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
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2015-11-09 12:48:58 +08:00
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int temp)
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2014-11-24 12:58:59 +08:00
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{
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int high, low, mid;
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low = 0;
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2015-11-09 12:48:56 +08:00
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high = table.length - 1;
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2014-11-24 12:58:59 +08:00
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mid = (high + low) / 2;
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2015-11-09 12:48:56 +08:00
|
|
|
if (temp < table.id[low].temp || temp > table.id[high].temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
while (low <= high) {
|
2015-11-09 12:48:56 +08:00
|
|
|
if (temp == table.id[mid].temp)
|
|
|
|
return table.id[mid].code;
|
|
|
|
else if (temp < table.id[mid].temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
high = mid - 1;
|
|
|
|
else
|
|
|
|
low = mid + 1;
|
|
|
|
mid = (low + high) / 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
|
|
|
|
int *temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
2015-08-08 04:59:23 +08:00
|
|
|
unsigned int low = 1;
|
2015-11-09 12:48:56 +08:00
|
|
|
unsigned int high = table.length - 1;
|
2015-01-25 10:11:11 +08:00
|
|
|
unsigned int mid = (low + high) / 2;
|
|
|
|
unsigned int num;
|
|
|
|
unsigned long denom;
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
WARN_ON(table.length < 2);
|
2015-01-25 10:11:11 +08:00
|
|
|
|
2015-11-09 12:48:57 +08:00
|
|
|
switch (table.mode) {
|
|
|
|
case ADC_DECREMENT:
|
|
|
|
code &= table.data_mask;
|
|
|
|
if (code < table.id[high].code)
|
|
|
|
return -EAGAIN; /* Incorrect reading */
|
|
|
|
|
|
|
|
while (low <= high) {
|
|
|
|
if (code >= table.id[mid].code &&
|
|
|
|
code < table.id[mid - 1].code)
|
|
|
|
break;
|
|
|
|
else if (code < table.id[mid].code)
|
|
|
|
low = mid + 1;
|
|
|
|
else
|
|
|
|
high = mid - 1;
|
|
|
|
|
|
|
|
mid = (low + high) / 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case ADC_INCREMENT:
|
|
|
|
code &= table.data_mask;
|
|
|
|
if (code < table.id[low].code)
|
|
|
|
return -EAGAIN; /* Incorrect reading */
|
|
|
|
|
|
|
|
while (low <= high) {
|
|
|
|
if (code >= table.id[mid - 1].code &&
|
|
|
|
code < table.id[mid].code)
|
|
|
|
break;
|
|
|
|
else if (code > table.id[mid].code)
|
|
|
|
low = mid + 1;
|
|
|
|
else
|
|
|
|
high = mid - 1;
|
|
|
|
|
|
|
|
mid = (low + high) / 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
pr_err("Invalid the conversion table\n");
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
2015-01-25 10:11:11 +08:00
|
|
|
/*
|
|
|
|
* The 5C granularity provided by the table is too much. Let's
|
|
|
|
* assume that the relationship between sensor readings and
|
|
|
|
* temperature between 2 table entries is linear and interpolate
|
|
|
|
* to produce less granular result.
|
|
|
|
*/
|
2015-11-09 12:48:56 +08:00
|
|
|
num = table.id[mid].temp - v2_code_table[mid - 1].temp;
|
2015-11-09 12:48:57 +08:00
|
|
|
num *= abs(table.id[mid - 1].code - code);
|
|
|
|
denom = abs(table.id[mid - 1].code - table.id[mid].code);
|
2015-11-09 12:48:56 +08:00
|
|
|
*temp = table.id[mid - 1].temp + (num / denom);
|
2015-08-08 04:59:23 +08:00
|
|
|
|
|
|
|
return 0;
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2015-11-05 13:17:59 +08:00
|
|
|
* rk_tsadcv2_initialize - initialize TASDC Controller.
|
|
|
|
*
|
|
|
|
* (1) Set TSADC_V2_AUTO_PERIOD:
|
|
|
|
* Configure the interleave between every two accessing of
|
|
|
|
* TSADC in normal operation.
|
|
|
|
*
|
|
|
|
* (2) Set TSADCV2_AUTO_PERIOD_HT:
|
|
|
|
* Configure the interleave between every two accessing of
|
|
|
|
* TSADC after the temperature is higher than COM_SHUT or COM_INT.
|
|
|
|
*
|
|
|
|
* (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
|
|
|
|
* If the temperature is higher than COMP_INT or COMP_SHUT for
|
|
|
|
* "debounce" times, TSADC controller will generate interrupt or TSHUT.
|
2014-11-24 12:58:59 +08:00
|
|
|
*/
|
|
|
|
static void rk_tsadcv2_initialize(void __iomem *regs,
|
|
|
|
enum tshut_polarity tshut_polarity)
|
|
|
|
{
|
|
|
|
if (tshut_polarity == TSHUT_HIGH_ACTIVE)
|
2015-08-08 05:00:52 +08:00
|
|
|
writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
|
2014-11-24 12:58:59 +08:00
|
|
|
regs + TSADCV2_AUTO_CON);
|
|
|
|
else
|
2015-08-08 05:00:52 +08:00
|
|
|
writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
|
2014-11-24 12:58:59 +08:00
|
|
|
regs + TSADCV2_AUTO_CON);
|
|
|
|
|
|
|
|
writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
|
|
|
|
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
|
|
|
|
regs + TSADCV2_HIGHT_INT_DEBOUNCE);
|
|
|
|
writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
|
|
|
|
regs + TSADCV2_AUTO_PERIOD_HT);
|
|
|
|
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
|
|
|
|
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
|
|
|
|
}
|
|
|
|
|
2015-12-03 16:48:42 +08:00
|
|
|
static void rk_tsadcv1_irq_ack(void __iomem *regs)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
val = readl_relaxed(regs + TSADCV2_INT_PD);
|
|
|
|
writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
|
|
|
|
}
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
static void rk_tsadcv2_irq_ack(void __iomem *regs)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
val = readl_relaxed(regs + TSADCV2_INT_PD);
|
2015-08-08 05:00:52 +08:00
|
|
|
writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void rk_tsadcv2_control(void __iomem *regs, bool enable)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
val = readl_relaxed(regs + TSADCV2_AUTO_CON);
|
|
|
|
if (enable)
|
|
|
|
val |= TSADCV2_AUTO_EN;
|
|
|
|
else
|
|
|
|
val &= ~TSADCV2_AUTO_EN;
|
|
|
|
|
|
|
|
writel_relaxed(val, regs + TSADCV2_AUTO_CON);
|
|
|
|
}
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
|
|
|
|
int chn, void __iomem *regs, int *temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
val = readl_relaxed(regs + TSADCV2_DATA(chn));
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
return rk_tsadcv2_code_to_temp(table, val, temp);
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
|
2015-11-09 12:48:58 +08:00
|
|
|
int chn, void __iomem *regs, int temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
|
|
|
u32 tshut_value, val;
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
tshut_value = rk_tsadcv2_temp_to_code(table, temp);
|
2014-11-24 12:58:59 +08:00
|
|
|
writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
|
|
|
|
|
|
|
|
/* TSHUT will be valid */
|
|
|
|
val = readl_relaxed(regs + TSADCV2_AUTO_CON);
|
|
|
|
writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
|
|
|
|
enum tshut_mode mode)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
val = readl_relaxed(regs + TSADCV2_INT_EN);
|
|
|
|
if (mode == TSHUT_MODE_GPIO) {
|
|
|
|
val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
|
|
|
|
val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
|
|
|
|
} else {
|
|
|
|
val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
|
|
|
|
val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
|
|
|
|
}
|
|
|
|
|
|
|
|
writel_relaxed(val, regs + TSADCV2_INT_EN);
|
|
|
|
}
|
|
|
|
|
2015-12-03 16:48:42 +08:00
|
|
|
static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
|
|
|
|
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
|
|
|
|
.chn_num = 1, /* one channel for tsadc */
|
|
|
|
|
|
|
|
.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
|
|
|
|
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
|
|
|
|
.tshut_temp = 95000,
|
|
|
|
|
|
|
|
.initialize = rk_tsadcv2_initialize,
|
|
|
|
.irq_ack = rk_tsadcv1_irq_ack,
|
|
|
|
.control = rk_tsadcv2_control,
|
|
|
|
.get_temp = rk_tsadcv2_get_temp,
|
|
|
|
.set_tshut_temp = rk_tsadcv2_tshut_temp,
|
|
|
|
.set_tshut_mode = rk_tsadcv2_tshut_mode,
|
|
|
|
|
|
|
|
.table = {
|
|
|
|
.id = v1_code_table,
|
|
|
|
.length = ARRAY_SIZE(v1_code_table),
|
|
|
|
.data_mask = TSADCV3_DATA_MASK,
|
|
|
|
.mode = ADC_DECREMENT,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
|
2015-11-05 13:17:58 +08:00
|
|
|
.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
|
|
|
|
.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
|
|
|
|
.chn_num = 2, /* two channels for tsadc */
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
|
|
|
|
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
|
|
|
|
.tshut_temp = 95000,
|
|
|
|
|
|
|
|
.initialize = rk_tsadcv2_initialize,
|
|
|
|
.irq_ack = rk_tsadcv2_irq_ack,
|
|
|
|
.control = rk_tsadcv2_control,
|
|
|
|
.get_temp = rk_tsadcv2_get_temp,
|
|
|
|
.set_tshut_temp = rk_tsadcv2_tshut_temp,
|
|
|
|
.set_tshut_mode = rk_tsadcv2_tshut_mode,
|
2015-11-09 12:48:56 +08:00
|
|
|
|
|
|
|
.table = {
|
|
|
|
.id = v2_code_table,
|
|
|
|
.length = ARRAY_SIZE(v2_code_table),
|
|
|
|
.data_mask = TSADCV2_DATA_MASK,
|
2015-11-09 12:48:57 +08:00
|
|
|
.mode = ADC_DECREMENT,
|
2015-11-09 12:48:56 +08:00
|
|
|
},
|
2014-11-24 12:58:59 +08:00
|
|
|
};
|
|
|
|
|
2015-11-09 12:48:59 +08:00
|
|
|
static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
|
|
|
|
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
|
|
|
|
.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
|
|
|
|
.chn_num = 2, /* two channels for tsadc */
|
|
|
|
|
|
|
|
.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
|
|
|
|
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
|
|
|
|
.tshut_temp = 95000,
|
|
|
|
|
|
|
|
.initialize = rk_tsadcv2_initialize,
|
|
|
|
.irq_ack = rk_tsadcv2_irq_ack,
|
|
|
|
.control = rk_tsadcv2_control,
|
|
|
|
.get_temp = rk_tsadcv2_get_temp,
|
|
|
|
.set_tshut_temp = rk_tsadcv2_tshut_temp,
|
|
|
|
.set_tshut_mode = rk_tsadcv2_tshut_mode,
|
|
|
|
|
|
|
|
.table = {
|
|
|
|
.id = v3_code_table,
|
|
|
|
.length = ARRAY_SIZE(v3_code_table),
|
|
|
|
.data_mask = TSADCV3_DATA_MASK,
|
|
|
|
.mode = ADC_INCREMENT,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2015-12-03 16:48:43 +08:00
|
|
|
static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
|
|
|
|
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
|
|
|
|
.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
|
|
|
|
.chn_num = 2, /* two channels for tsadc */
|
|
|
|
|
|
|
|
.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
|
|
|
|
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
|
|
|
|
.tshut_temp = 95000,
|
|
|
|
|
|
|
|
.initialize = rk_tsadcv2_initialize,
|
|
|
|
.irq_ack = rk_tsadcv1_irq_ack,
|
|
|
|
.control = rk_tsadcv2_control,
|
|
|
|
.get_temp = rk_tsadcv2_get_temp,
|
|
|
|
.set_tshut_temp = rk_tsadcv2_tshut_temp,
|
|
|
|
.set_tshut_mode = rk_tsadcv2_tshut_mode,
|
|
|
|
|
|
|
|
.table = {
|
|
|
|
.id = v4_code_table,
|
|
|
|
.length = ARRAY_SIZE(v4_code_table),
|
|
|
|
.data_mask = TSADCV3_DATA_MASK,
|
|
|
|
.mode = ADC_DECREMENT,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
static const struct of_device_id of_rockchip_thermal_match[] = {
|
2015-12-03 16:48:42 +08:00
|
|
|
{
|
|
|
|
.compatible = "rockchip,rk3228-tsadc",
|
|
|
|
.data = (void *)&rk3228_tsadc_data,
|
|
|
|
},
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
|
|
|
.compatible = "rockchip,rk3288-tsadc",
|
|
|
|
.data = (void *)&rk3288_tsadc_data,
|
|
|
|
},
|
2015-11-09 12:48:59 +08:00
|
|
|
{
|
|
|
|
.compatible = "rockchip,rk3368-tsadc",
|
|
|
|
.data = (void *)&rk3368_tsadc_data,
|
|
|
|
},
|
2015-12-03 16:48:43 +08:00
|
|
|
{
|
|
|
|
.compatible = "rockchip,rk3399-tsadc",
|
|
|
|
.data = (void *)&rk3399_tsadc_data,
|
|
|
|
},
|
2014-11-24 12:58:59 +08:00
|
|
|
{ /* end */ },
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
|
|
|
|
|
|
|
|
static void
|
|
|
|
rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
|
|
|
|
{
|
|
|
|
struct thermal_zone_device *tzd = sensor->tzd;
|
|
|
|
|
|
|
|
tzd->ops->set_mode(tzd,
|
|
|
|
on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
|
|
|
|
{
|
|
|
|
struct rockchip_thermal_data *thermal = dev;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
|
|
|
|
|
|
|
|
thermal->chip->irq_ack(thermal->regs);
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++)
|
2014-11-24 12:58:59 +08:00
|
|
|
thermal_zone_device_update(thermal->sensors[i].tzd);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2015-07-24 14:12:54 +08:00
|
|
|
static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
|
|
|
struct rockchip_thermal_sensor *sensor = _sensor;
|
|
|
|
struct rockchip_thermal_data *thermal = sensor->thermal;
|
|
|
|
const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
|
|
|
|
int retval;
|
|
|
|
|
2015-11-09 12:48:56 +08:00
|
|
|
retval = tsadc->get_temp(tsadc->table,
|
|
|
|
sensor->id, thermal->regs, out_temp);
|
2015-07-24 14:12:54 +08:00
|
|
|
dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
|
2014-11-24 12:58:59 +08:00
|
|
|
sensor->id, *out_temp, retval);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
|
|
|
|
.get_temp = rockchip_thermal_get_temp,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int rockchip_configure_from_dt(struct device *dev,
|
|
|
|
struct device_node *np,
|
|
|
|
struct rockchip_thermal_data *thermal)
|
|
|
|
{
|
|
|
|
u32 shut_temp, tshut_mode, tshut_polarity;
|
|
|
|
|
|
|
|
if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
|
|
|
|
dev_warn(dev,
|
2015-11-09 12:48:58 +08:00
|
|
|
"Missing tshut temp property, using default %d\n",
|
2014-11-24 12:58:59 +08:00
|
|
|
thermal->chip->tshut_temp);
|
|
|
|
thermal->tshut_temp = thermal->chip->tshut_temp;
|
|
|
|
} else {
|
2016-02-15 15:33:28 +08:00
|
|
|
if (shut_temp > INT_MAX) {
|
|
|
|
dev_err(dev, "Invalid tshut temperature specified: %d\n",
|
|
|
|
shut_temp);
|
|
|
|
return -ERANGE;
|
|
|
|
}
|
2014-11-24 12:58:59 +08:00
|
|
|
thermal->tshut_temp = shut_temp;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
|
|
|
|
dev_warn(dev,
|
|
|
|
"Missing tshut mode property, using default (%s)\n",
|
|
|
|
thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
|
|
|
|
"gpio" : "cru");
|
|
|
|
thermal->tshut_mode = thermal->chip->tshut_mode;
|
|
|
|
} else {
|
|
|
|
thermal->tshut_mode = tshut_mode;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (thermal->tshut_mode > 1) {
|
|
|
|
dev_err(dev, "Invalid tshut mode specified: %d\n",
|
|
|
|
thermal->tshut_mode);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
|
|
|
|
&tshut_polarity)) {
|
|
|
|
dev_warn(dev,
|
|
|
|
"Missing tshut-polarity property, using default (%s)\n",
|
|
|
|
thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
|
|
|
|
"low" : "high");
|
|
|
|
thermal->tshut_polarity = thermal->chip->tshut_polarity;
|
|
|
|
} else {
|
|
|
|
thermal->tshut_polarity = tshut_polarity;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (thermal->tshut_polarity > 1) {
|
|
|
|
dev_err(dev, "Invalid tshut-polarity specified: %d\n",
|
|
|
|
thermal->tshut_polarity);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rockchip_thermal_register_sensor(struct platform_device *pdev,
|
|
|
|
struct rockchip_thermal_data *thermal,
|
|
|
|
struct rockchip_thermal_sensor *sensor,
|
2015-11-05 13:17:58 +08:00
|
|
|
int id)
|
2014-11-24 12:58:59 +08:00
|
|
|
{
|
|
|
|
const struct rockchip_tsadc_chip *tsadc = thermal->chip;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
|
2015-11-09 12:48:56 +08:00
|
|
|
tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
|
|
|
|
thermal->tshut_temp);
|
2014-11-24 12:58:59 +08:00
|
|
|
|
|
|
|
sensor->thermal = thermal;
|
|
|
|
sensor->id = id;
|
|
|
|
sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
|
|
|
|
&rockchip_of_thermal_ops);
|
|
|
|
if (IS_ERR(sensor->tzd)) {
|
|
|
|
error = PTR_ERR(sensor->tzd);
|
|
|
|
dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
|
|
|
|
id, error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-12-03 16:48:39 +08:00
|
|
|
/**
|
2014-11-24 12:58:59 +08:00
|
|
|
* Reset TSADC Controller, reset all tsadc registers.
|
|
|
|
*/
|
|
|
|
static void rockchip_thermal_reset_controller(struct reset_control *reset)
|
|
|
|
{
|
|
|
|
reset_control_assert(reset);
|
|
|
|
usleep_range(10, 20);
|
|
|
|
reset_control_deassert(reset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rockchip_thermal_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
struct rockchip_thermal_data *thermal;
|
|
|
|
const struct of_device_id *match;
|
|
|
|
struct resource *res;
|
|
|
|
int irq;
|
2015-11-05 13:17:58 +08:00
|
|
|
int i, j;
|
2014-11-24 12:58:59 +08:00
|
|
|
int error;
|
|
|
|
|
|
|
|
match = of_match_node(of_rockchip_thermal_match, np);
|
|
|
|
if (!match)
|
|
|
|
return -ENXIO;
|
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
|
|
if (irq < 0) {
|
|
|
|
dev_err(&pdev->dev, "no irq resource?\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!thermal)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
thermal->pdev = pdev;
|
|
|
|
|
|
|
|
thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
|
|
|
|
if (!thermal->chip)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
thermal->regs = devm_ioremap_resource(&pdev->dev, res);
|
|
|
|
if (IS_ERR(thermal->regs))
|
|
|
|
return PTR_ERR(thermal->regs);
|
|
|
|
|
|
|
|
thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
|
|
|
|
if (IS_ERR(thermal->reset)) {
|
|
|
|
error = PTR_ERR(thermal->reset);
|
|
|
|
dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
|
|
|
|
if (IS_ERR(thermal->clk)) {
|
|
|
|
error = PTR_ERR(thermal->clk);
|
|
|
|
dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
|
|
|
|
if (IS_ERR(thermal->pclk)) {
|
2015-04-21 17:34:10 +08:00
|
|
|
error = PTR_ERR(thermal->pclk);
|
2014-11-24 12:58:59 +08:00
|
|
|
dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
|
|
|
|
error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = clk_prepare_enable(thermal->clk);
|
|
|
|
if (error) {
|
|
|
|
dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
|
|
|
|
error);
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = clk_prepare_enable(thermal->pclk);
|
|
|
|
if (error) {
|
|
|
|
dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
|
|
|
|
goto err_disable_clk;
|
|
|
|
}
|
|
|
|
|
|
|
|
rockchip_thermal_reset_controller(thermal->reset);
|
|
|
|
|
|
|
|
error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
|
|
|
|
if (error) {
|
|
|
|
dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
|
|
|
|
error);
|
|
|
|
goto err_disable_pclk;
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++) {
|
|
|
|
error = rockchip_thermal_register_sensor(pdev, thermal,
|
|
|
|
&thermal->sensors[i],
|
|
|
|
thermal->chip->chn_id[i]);
|
|
|
|
if (error) {
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"failed to register sensor[%d] : error = %d\n",
|
|
|
|
i, error);
|
|
|
|
for (j = 0; j < i; j++)
|
|
|
|
thermal_zone_of_sensor_unregister(&pdev->dev,
|
|
|
|
thermal->sensors[j].tzd);
|
|
|
|
goto err_disable_pclk;
|
|
|
|
}
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
|
|
&rockchip_thermal_alarm_irq_thread,
|
|
|
|
IRQF_ONESHOT,
|
|
|
|
"rockchip_thermal", thermal);
|
|
|
|
if (error) {
|
|
|
|
dev_err(&pdev->dev,
|
|
|
|
"failed to request tsadc irq: %d\n", error);
|
2015-11-05 13:17:58 +08:00
|
|
|
goto err_unregister_sensor;
|
2014-11-24 12:58:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
thermal->chip->control(thermal->regs, true);
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++)
|
2014-11-24 12:58:59 +08:00
|
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, thermal);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
err_unregister_sensor:
|
|
|
|
while (i--)
|
|
|
|
thermal_zone_of_sensor_unregister(&pdev->dev,
|
|
|
|
thermal->sensors[i].tzd);
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
err_disable_pclk:
|
|
|
|
clk_disable_unprepare(thermal->pclk);
|
|
|
|
err_disable_clk:
|
|
|
|
clk_disable_unprepare(thermal->clk);
|
|
|
|
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rockchip_thermal_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
|
|
int i;
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++) {
|
2014-11-24 12:58:59 +08:00
|
|
|
struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
|
|
|
|
|
|
|
|
rockchip_thermal_toggle_sensor(sensor, false);
|
|
|
|
thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal->chip->control(thermal->regs, false);
|
|
|
|
|
|
|
|
clk_disable_unprepare(thermal->pclk);
|
|
|
|
clk_disable_unprepare(thermal->clk);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
|
|
int i;
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++)
|
2014-11-24 12:58:59 +08:00
|
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
|
|
|
|
|
|
|
|
thermal->chip->control(thermal->regs, false);
|
|
|
|
|
|
|
|
clk_disable(thermal->pclk);
|
|
|
|
clk_disable(thermal->clk);
|
|
|
|
|
2015-10-23 19:25:27 +08:00
|
|
|
pinctrl_pm_select_sleep_state(dev);
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __maybe_unused rockchip_thermal_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
|
|
int i;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = clk_enable(thermal->clk);
|
|
|
|
if (error)
|
|
|
|
return error;
|
|
|
|
|
|
|
|
error = clk_enable(thermal->pclk);
|
|
|
|
if (error)
|
|
|
|
return error;
|
|
|
|
|
|
|
|
rockchip_thermal_reset_controller(thermal->reset);
|
|
|
|
|
|
|
|
thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++) {
|
|
|
|
int id = thermal->sensors[i].id;
|
2014-11-24 12:58:59 +08:00
|
|
|
|
|
|
|
thermal->chip->set_tshut_mode(id, thermal->regs,
|
|
|
|
thermal->tshut_mode);
|
2015-11-09 12:48:56 +08:00
|
|
|
thermal->chip->set_tshut_temp(thermal->chip->table,
|
|
|
|
id, thermal->regs,
|
2014-11-24 12:58:59 +08:00
|
|
|
thermal->tshut_temp);
|
|
|
|
}
|
|
|
|
|
|
|
|
thermal->chip->control(thermal->regs, true);
|
|
|
|
|
2015-11-05 13:17:58 +08:00
|
|
|
for (i = 0; i < thermal->chip->chn_num; i++)
|
2014-11-24 12:58:59 +08:00
|
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
|
|
|
|
|
2015-10-23 19:25:27 +08:00
|
|
|
pinctrl_pm_select_default_state(dev);
|
|
|
|
|
2014-11-24 12:58:59 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
|
|
|
|
rockchip_thermal_suspend, rockchip_thermal_resume);
|
|
|
|
|
|
|
|
static struct platform_driver rockchip_thermal_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "rockchip-thermal",
|
|
|
|
.pm = &rockchip_thermal_pm_ops,
|
|
|
|
.of_match_table = of_rockchip_thermal_match,
|
|
|
|
},
|
|
|
|
.probe = rockchip_thermal_probe,
|
|
|
|
.remove = rockchip_thermal_remove,
|
|
|
|
};
|
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module_platform_driver(rockchip_thermal_driver);
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MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
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MODULE_AUTHOR("Rockchip, Inc.");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:rockchip-thermal");
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