2018-01-27 04:22:04 +08:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2005-04-17 06:20:36 +08:00
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/*
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* Standard Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM
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* Copyright (C) 2003-2004 Intel Corporation
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*
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* All rights reserved.
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*
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2005-08-17 06:16:10 +08:00
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* Send feedback to <greg@kroah.com>,<kristen.c.accardi@intel.com>
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2005-04-17 06:20:36 +08:00
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*
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*/
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#ifndef _SHPCHP_H
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#define _SHPCHP_H
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#include <linux/types.h>
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#include <linux/pci.h>
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2006-10-14 11:05:19 +08:00
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#include <linux/pci_hotplug.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/delay.h>
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2017-02-03 02:15:33 +08:00
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#include <linux/sched/signal.h> /* signal_pending(), struct timer_list */
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2006-01-13 23:02:15 +08:00
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#include <linux/mutex.h>
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2010-10-18 14:33:02 +08:00
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#include <linux/workqueue.h>
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2005-10-31 07:03:48 +08:00
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2005-04-17 06:20:36 +08:00
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#if !defined(MODULE)
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#define MY_NAME "shpchp"
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#else
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#define MY_NAME THIS_MODULE->name
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#endif
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2012-01-13 07:02:20 +08:00
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extern bool shpchp_poll_mode;
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2005-04-17 06:20:36 +08:00
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extern int shpchp_poll_time;
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2012-01-13 07:02:20 +08:00
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extern bool shpchp_debug;
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2005-04-17 06:20:36 +08:00
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2006-12-17 07:25:57 +08:00
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#define dbg(format, arg...) \
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2009-02-06 17:23:36 +08:00
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do { \
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if (shpchp_debug) \
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2015-12-28 05:21:11 +08:00
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printk(KERN_DEBUG "%s: " format, MY_NAME, ## arg); \
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2009-02-06 17:23:36 +08:00
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} while (0)
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2006-12-17 07:25:57 +08:00
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#define err(format, arg...) \
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2015-12-28 05:21:11 +08:00
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printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
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2006-12-17 07:25:57 +08:00
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#define info(format, arg...) \
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2015-12-28 05:21:11 +08:00
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printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
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2006-12-17 07:25:57 +08:00
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#define warn(format, arg...) \
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2015-12-28 05:21:11 +08:00
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printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
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2005-04-17 06:20:36 +08:00
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2008-10-23 10:52:12 +08:00
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#define ctrl_dbg(ctrl, format, arg...) \
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do { \
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if (shpchp_debug) \
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2018-01-19 02:55:24 +08:00
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pci_printk(KERN_DEBUG, ctrl->pci_dev, \
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2008-10-23 10:52:12 +08:00
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format, ## arg); \
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} while (0)
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#define ctrl_err(ctrl, format, arg...) \
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2018-01-19 02:55:24 +08:00
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pci_err(ctrl->pci_dev, format, ## arg)
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2008-10-23 10:52:12 +08:00
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#define ctrl_info(ctrl, format, arg...) \
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2018-01-19 02:55:24 +08:00
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pci_info(ctrl->pci_dev, format, ## arg)
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2008-10-23 10:52:12 +08:00
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#define ctrl_warn(ctrl, format, arg...) \
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2018-01-19 02:55:24 +08:00
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pci_warn(ctrl->pci_dev, format, ## arg)
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2008-10-23 10:52:12 +08:00
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2006-01-26 09:04:56 +08:00
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#define SLOT_NAME_SIZE 10
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2005-04-17 06:20:36 +08:00
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struct slot {
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u8 bus;
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u8 device;
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2005-10-14 03:05:41 +08:00
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u16 status;
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2005-04-17 06:20:36 +08:00
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u32 number;
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u8 is_a_board;
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u8 state;
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PCI: hotplug: Drop hotplug_slot_info
Ever since the PCI hotplug core was introduced in 2002, drivers had to
allocate and register a struct hotplug_slot_info for every slot:
https://git.kernel.org/tglx/history/c/a8a2069f432c
Apparently the idea was that drivers furnish the hotplug core with an
up-to-date card presence status, power status, latch status and
attention indicator status as well as notify the hotplug core of changes
thereof. However only 4 out of 12 hotplug drivers bother to notify the
hotplug core with pci_hp_change_slot_info() and the hotplug core never
made any use of the information: There is just a single macro in
pci_hotplug_core.c, GET_STATUS(), which uses the hotplug_slot_info if
the driver lacks the corresponding callback in hotplug_slot_ops. The
macro is called when the user reads the attribute via sysfs.
Now, if the callback isn't defined, the attribute isn't exposed in sysfs
in the first place (see e.g. has_power_file()). There are only two
situations when the hotplug_slot_info would actually be accessed:
* If the driver defines ->enable_slot or ->disable_slot but not
->get_power_status.
* If the driver defines ->set_attention_status but not
->get_attention_status.
There is no driver doing the former and just a single driver doing the
latter, namely pnv_php.c. Amend it with a ->get_attention_status
callback. With that, the hotplug_slot_info becomes completely unused by
the PCI hotplug core. But a few drivers use it internally as a cache:
cpcihp uses it to cache the latch_status and adapter_status.
cpqhp uses it to cache the adapter_status.
pnv_php and rpaphp use it to cache the attention_status.
shpchp uses it to cache all four values.
Amend these drivers to cache the information in their private slot
struct. shpchp's slot struct already contains members to cache the
power_status and adapter_status, so additional members are only needed
for the other two values. In the case of cpqphp, the cached value is
only accessed in a single place, so instead of caching it, read the
current value from the hardware.
Caution: acpiphp, cpci, cpqhp, shpchp, asus-wmi and eeepc-laptop
populate the hotplug_slot_info with initial values on probe. That code
is herewith removed. There is a theoretical chance that the code has
side effects without which the driver fails to function, e.g. if the
ACPI method to read the adapter status needs to be executed at least
once on probe. That seems unlikely to me, still maintainers should
review the changes carefully for this possibility.
Rafael adds: "I'm not aware of any case in which it will break anything,
[...] but if that happens, it may be necessary to add the execution of
the control methods in question directly to the initialization part."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com> # drivers/pci/hotplug/rpa*
Acked-by: Sebastian Ott <sebott@linux.ibm.com> # drivers/pci/hotplug/s390*
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> # drivers/platform/x86
Cc: Len Brown <lenb@kernel.org>
Cc: Scott Murray <scott@spiteful.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Oliver OHalloran <oliveroh@au1.ibm.com>
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Cc: Corentin Chary <corentin.chary@gmail.com>
Cc: Darren Hart <dvhart@infradead.org>
2018-09-08 15:59:01 +08:00
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u8 attention_save;
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2005-04-17 06:20:36 +08:00
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u8 presence_save;
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PCI: hotplug: Drop hotplug_slot_info
Ever since the PCI hotplug core was introduced in 2002, drivers had to
allocate and register a struct hotplug_slot_info for every slot:
https://git.kernel.org/tglx/history/c/a8a2069f432c
Apparently the idea was that drivers furnish the hotplug core with an
up-to-date card presence status, power status, latch status and
attention indicator status as well as notify the hotplug core of changes
thereof. However only 4 out of 12 hotplug drivers bother to notify the
hotplug core with pci_hp_change_slot_info() and the hotplug core never
made any use of the information: There is just a single macro in
pci_hotplug_core.c, GET_STATUS(), which uses the hotplug_slot_info if
the driver lacks the corresponding callback in hotplug_slot_ops. The
macro is called when the user reads the attribute via sysfs.
Now, if the callback isn't defined, the attribute isn't exposed in sysfs
in the first place (see e.g. has_power_file()). There are only two
situations when the hotplug_slot_info would actually be accessed:
* If the driver defines ->enable_slot or ->disable_slot but not
->get_power_status.
* If the driver defines ->set_attention_status but not
->get_attention_status.
There is no driver doing the former and just a single driver doing the
latter, namely pnv_php.c. Amend it with a ->get_attention_status
callback. With that, the hotplug_slot_info becomes completely unused by
the PCI hotplug core. But a few drivers use it internally as a cache:
cpcihp uses it to cache the latch_status and adapter_status.
cpqhp uses it to cache the adapter_status.
pnv_php and rpaphp use it to cache the attention_status.
shpchp uses it to cache all four values.
Amend these drivers to cache the information in their private slot
struct. shpchp's slot struct already contains members to cache the
power_status and adapter_status, so additional members are only needed
for the other two values. In the case of cpqphp, the cached value is
only accessed in a single place, so instead of caching it, read the
current value from the hardware.
Caution: acpiphp, cpci, cpqhp, shpchp, asus-wmi and eeepc-laptop
populate the hotplug_slot_info with initial values on probe. That code
is herewith removed. There is a theoretical chance that the code has
side effects without which the driver fails to function, e.g. if the
ACPI method to read the adapter status needs to be executed at least
once on probe. That seems unlikely to me, still maintainers should
review the changes carefully for this possibility.
Rafael adds: "I'm not aware of any case in which it will break anything,
[...] but if that happens, it may be necessary to add the execution of
the control methods in question directly to the initialization part."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com> # drivers/pci/hotplug/rpa*
Acked-by: Sebastian Ott <sebott@linux.ibm.com> # drivers/pci/hotplug/s390*
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> # drivers/platform/x86
Cc: Len Brown <lenb@kernel.org>
Cc: Scott Murray <scott@spiteful.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Oliver OHalloran <oliveroh@au1.ibm.com>
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Cc: Corentin Chary <corentin.chary@gmail.com>
Cc: Darren Hart <dvhart@infradead.org>
2018-09-08 15:59:01 +08:00
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u8 latch_save;
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2005-10-14 03:05:41 +08:00
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u8 pwr_save;
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2005-04-17 06:20:36 +08:00
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struct controller *ctrl;
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2015-12-24 04:35:35 +08:00
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const struct hpc_ops *hpc_ops;
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2018-09-08 15:59:01 +08:00
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struct hotplug_slot hotplug_slot;
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2005-04-17 06:20:36 +08:00
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struct list_head slot_list;
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2006-11-22 22:57:56 +08:00
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struct delayed_work work; /* work for button event */
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2006-02-22 07:45:48 +08:00
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struct mutex lock;
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2013-01-12 03:21:15 +08:00
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struct workqueue_struct *wq;
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2008-10-21 07:41:53 +08:00
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u8 hp_slot;
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2005-04-17 06:20:36 +08:00
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};
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struct event_info {
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u32 event_type;
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2006-02-22 07:45:45 +08:00
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struct slot *p_slot;
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struct work_struct work;
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2005-04-17 06:20:36 +08:00
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};
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struct controller {
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2006-01-13 23:02:15 +08:00
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struct mutex crit_sect; /* critical section mutex */
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2006-01-26 08:59:24 +08:00
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struct mutex cmd_lock; /* command lock */
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2005-04-17 06:20:36 +08:00
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int num_slots; /* Number of slots on ctlr */
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int slot_num_inc; /* 1 or -1 */
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struct pci_dev *pci_dev;
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2006-01-26 08:57:40 +08:00
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struct list_head slot_list;
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2015-12-24 04:35:35 +08:00
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const struct hpc_ops *hpc_ops;
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2005-04-17 06:20:36 +08:00
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wait_queue_head_t queue; /* sleep & wake process */
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u8 slot_device_offset;
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2006-01-17 05:22:36 +08:00
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u32 pcix_misc2_reg; /* for amd pogo errata */
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2005-04-17 06:20:36 +08:00
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u32 first_slot; /* First physical slot number */
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2005-11-24 10:36:59 +08:00
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u32 cap_offset;
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unsigned long mmio_base;
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unsigned long mmio_size;
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2006-12-17 07:25:34 +08:00
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void __iomem *creg;
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struct timer_list poll_timer;
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2005-04-17 06:20:36 +08:00
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};
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/* Define AMD SHPC ID */
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2006-01-17 05:22:36 +08:00
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#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458
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2009-12-03 19:49:24 +08:00
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/* AMD PCI-X bridge registers */
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2006-01-17 05:22:36 +08:00
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#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C
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#define PCIX_MISCII_OFFSET 0x48
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#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80
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/* AMD PCIX_MISCII masks and offsets */
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#define PERRNONFATALENABLE_MASK 0x00040000
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#define PERRFATALENABLE_MASK 0x00080000
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#define PERRFLOODENABLE_MASK 0x00100000
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#define SERRNONFATALENABLE_MASK 0x00200000
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#define SERRFATALENABLE_MASK 0x00400000
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/* AMD PCIX_MISC_BRIDGE_ERRORS masks and offsets */
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#define PERR_OBSERVED_MASK 0x00000001
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/* AMD PCIX_MEM_BASE_LIMIT masks */
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#define RSE_MASK 0x40000000
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2005-04-17 06:20:36 +08:00
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#define INT_BUTTON_IGNORE 0
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#define INT_PRESENCE_ON 1
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#define INT_PRESENCE_OFF 2
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#define INT_SWITCH_CLOSE 3
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#define INT_SWITCH_OPEN 4
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#define INT_POWER_FAULT 5
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#define INT_POWER_FAULT_CLEAR 6
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#define INT_BUTTON_PRESS 7
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#define INT_BUTTON_RELEASE 8
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#define INT_BUTTON_CANCEL 9
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#define STATIC_STATE 0
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#define BLINKINGON_STATE 1
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#define BLINKINGOFF_STATE 2
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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/* Error messages */
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#define INTERLOCK_OPEN 0x00000002
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#define ADD_NOT_SUPPORTED 0x00000003
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#define CARD_FUNCTIONING 0x00000005
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#define ADAPTER_NOT_SAME 0x00000006
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#define NO_ADAPTER_PRESENT 0x00000009
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#define NOT_ENOUGH_RESOURCES 0x0000000B
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#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
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#define WRONG_BUS_FREQUENCY 0x0000000D
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#define POWER_FAILURE 0x0000000E
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2013-04-13 02:02:59 +08:00
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int __must_check shpchp_create_ctrl_files(struct controller *ctrl);
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void shpchp_remove_ctrl_files(struct controller *ctrl);
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int shpchp_sysfs_enable_slot(struct slot *slot);
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int shpchp_sysfs_disable_slot(struct slot *slot);
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u8 shpchp_handle_attention_button(u8 hp_slot, struct controller *ctrl);
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u8 shpchp_handle_switch_change(u8 hp_slot, struct controller *ctrl);
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u8 shpchp_handle_presence_change(u8 hp_slot, struct controller *ctrl);
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u8 shpchp_handle_power_fault(u8 hp_slot, struct controller *ctrl);
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int shpchp_configure_device(struct slot *p_slot);
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int shpchp_unconfigure_device(struct slot *p_slot);
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void cleanup_slots(struct controller *ctrl);
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void shpchp_queue_pushbutton_work(struct work_struct *work);
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2014-04-19 08:13:49 +08:00
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int shpc_init(struct controller *ctrl, struct pci_dev *pdev);
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2006-03-04 02:16:05 +08:00
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2008-10-21 07:41:53 +08:00
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static inline const char *slot_name(struct slot *slot)
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{
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2018-09-08 15:59:01 +08:00
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return hotplug_slot_name(&slot->hotplug_slot);
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2008-10-21 07:41:53 +08:00
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}
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2005-04-17 06:20:36 +08:00
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struct ctrl_reg {
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volatile u32 base_offset;
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volatile u32 slot_avail1;
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volatile u32 slot_avail2;
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volatile u32 slot_config;
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volatile u16 sec_bus_config;
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volatile u8 msi_ctrl;
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volatile u8 prog_interface;
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volatile u16 cmd;
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volatile u16 cmd_status;
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volatile u32 intr_loc;
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volatile u32 serr_loc;
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volatile u32 serr_intr_enable;
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volatile u32 slot1;
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} __attribute__ ((packed));
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/* offsets to the controller registers based on the above structure layout */
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enum ctrl_offsets {
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2013-11-15 02:28:18 +08:00
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BASE_OFFSET = offsetof(struct ctrl_reg, base_offset),
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SLOT_AVAIL1 = offsetof(struct ctrl_reg, slot_avail1),
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2006-12-17 07:25:57 +08:00
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SLOT_AVAIL2 = offsetof(struct ctrl_reg, slot_avail2),
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2013-11-15 02:28:18 +08:00
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SLOT_CONFIG = offsetof(struct ctrl_reg, slot_config),
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2006-12-17 07:25:57 +08:00
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SEC_BUS_CONFIG = offsetof(struct ctrl_reg, sec_bus_config),
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MSI_CTRL = offsetof(struct ctrl_reg, msi_ctrl),
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2013-11-15 02:28:18 +08:00
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PROG_INTERFACE = offsetof(struct ctrl_reg, prog_interface),
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2006-12-17 07:25:57 +08:00
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CMD = offsetof(struct ctrl_reg, cmd),
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CMD_STATUS = offsetof(struct ctrl_reg, cmd_status),
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INTR_LOC = offsetof(struct ctrl_reg, intr_loc),
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SERR_LOC = offsetof(struct ctrl_reg, serr_loc),
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SERR_INTR_ENABLE = offsetof(struct ctrl_reg, serr_intr_enable),
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SLOT1 = offsetof(struct ctrl_reg, slot1),
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2005-04-17 06:20:36 +08:00
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};
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2006-12-17 07:25:57 +08:00
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static inline struct slot *get_slot(struct hotplug_slot *hotplug_slot)
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2007-01-10 05:03:10 +08:00
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{
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2018-09-08 15:59:01 +08:00
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return container_of(hotplug_slot, struct slot, hotplug_slot);
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2005-04-17 06:20:36 +08:00
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}
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2006-12-17 07:25:57 +08:00
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static inline struct slot *shpchp_find_slot(struct controller *ctrl, u8 device)
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2005-04-17 06:20:36 +08:00
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{
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2006-01-26 08:57:40 +08:00
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struct slot *slot;
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2005-04-17 06:20:36 +08:00
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2006-01-26 08:57:40 +08:00
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list_for_each_entry(slot, &ctrl->slot_list, slot_list) {
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if (slot->device == device)
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return slot;
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2005-04-17 06:20:36 +08:00
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}
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2008-10-23 10:54:39 +08:00
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ctrl_err(ctrl, "Slot (device=0x%02x) not found\n", device);
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2006-01-26 08:57:40 +08:00
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return NULL;
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2005-04-17 06:20:36 +08:00
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}
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2006-01-17 05:22:36 +08:00
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static inline void amd_pogo_errata_save_misc_reg(struct slot *p_slot)
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{
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u32 pcix_misc2_temp;
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/* save MiscII register */
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pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp);
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p_slot->ctrl->pcix_misc2_reg = pcix_misc2_temp;
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/* clear SERR/PERR enable bits */
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pcix_misc2_temp &= ~SERRFATALENABLE_MASK;
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pcix_misc2_temp &= ~SERRNONFATALENABLE_MASK;
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pcix_misc2_temp &= ~PERRFLOODENABLE_MASK;
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pcix_misc2_temp &= ~PERRFATALENABLE_MASK;
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pcix_misc2_temp &= ~PERRNONFATALENABLE_MASK;
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pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
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}
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static inline void amd_pogo_errata_restore_misc_reg(struct slot *p_slot)
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{
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u32 pcix_misc2_temp;
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u32 pcix_bridge_errors_reg;
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u32 pcix_mem_base_reg;
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u8 perr_set;
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u8 rse_set;
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/* write-one-to-clear Bridge_Errors[ PERR_OBSERVED ] */
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pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, &pcix_bridge_errors_reg);
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perr_set = pcix_bridge_errors_reg & PERR_OBSERVED_MASK;
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if (perr_set) {
|
2008-10-23 10:52:12 +08:00
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ctrl_dbg(p_slot->ctrl,
|
2008-10-23 10:54:39 +08:00
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"Bridge_Errors[ PERR_OBSERVED = %08X] (W1C)\n",
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perr_set);
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2006-01-17 05:22:36 +08:00
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pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, perr_set);
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}
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/* write-one-to-clear Memory_Base_Limit[ RSE ] */
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pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, &pcix_mem_base_reg);
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rse_set = pcix_mem_base_reg & RSE_MASK;
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if (rse_set) {
|
2008-10-23 10:54:39 +08:00
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ctrl_dbg(p_slot->ctrl, "Memory_Base_Limit[ RSE ] (W1C)\n");
|
2006-01-17 05:22:36 +08:00
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pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, rse_set);
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}
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/* restore MiscII register */
|
2015-12-28 05:21:11 +08:00
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pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp);
|
2006-01-17 05:22:36 +08:00
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if (p_slot->ctrl->pcix_misc2_reg & SERRFATALENABLE_MASK)
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pcix_misc2_temp |= SERRFATALENABLE_MASK;
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else
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pcix_misc2_temp &= ~SERRFATALENABLE_MASK;
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if (p_slot->ctrl->pcix_misc2_reg & SERRNONFATALENABLE_MASK)
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pcix_misc2_temp |= SERRNONFATALENABLE_MASK;
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else
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pcix_misc2_temp &= ~SERRNONFATALENABLE_MASK;
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if (p_slot->ctrl->pcix_misc2_reg & PERRFLOODENABLE_MASK)
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pcix_misc2_temp |= PERRFLOODENABLE_MASK;
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else
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pcix_misc2_temp &= ~PERRFLOODENABLE_MASK;
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if (p_slot->ctrl->pcix_misc2_reg & PERRFATALENABLE_MASK)
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|
pcix_misc2_temp |= PERRFATALENABLE_MASK;
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else
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|
pcix_misc2_temp &= ~PERRFATALENABLE_MASK;
|
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|
if (p_slot->ctrl->pcix_misc2_reg & PERRNONFATALENABLE_MASK)
|
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|
pcix_misc2_temp |= PERRNONFATALENABLE_MASK;
|
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|
else
|
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|
pcix_misc2_temp &= ~PERRNONFATALENABLE_MASK;
|
|
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|
|
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
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|
}
|
|
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|
|
2005-04-17 06:20:36 +08:00
|
|
|
struct hpc_ops {
|
2006-12-17 07:25:57 +08:00
|
|
|
int (*power_on_slot)(struct slot *slot);
|
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|
int (*slot_enable)(struct slot *slot);
|
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|
int (*slot_disable)(struct slot *slot);
|
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|
int (*set_bus_speed_mode)(struct slot *slot, enum pci_bus_speed speed);
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|
int (*get_power_status)(struct slot *slot, u8 *status);
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int (*get_attention_status)(struct slot *slot, u8 *status);
|
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|
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|
int (*set_attention_status)(struct slot *slot, u8 status);
|
|
|
|
|
int (*get_latch_status)(struct slot *slot, u8 *status);
|
|
|
|
|
int (*get_adapter_status)(struct slot *slot, u8 *status);
|
|
|
|
|
int (*get_adapter_speed)(struct slot *slot, enum pci_bus_speed *speed);
|
|
|
|
|
int (*get_mode1_ECC_cap)(struct slot *slot, u8 *mode);
|
|
|
|
|
int (*get_prog_int)(struct slot *slot, u8 *prog_int);
|
|
|
|
|
int (*query_power_fault)(struct slot *slot);
|
|
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|
|
void (*green_led_on)(struct slot *slot);
|
|
|
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|
void (*green_led_off)(struct slot *slot);
|
|
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|
|
void (*green_led_blink)(struct slot *slot);
|
|
|
|
|
void (*release_ctlr)(struct controller *ctrl);
|
|
|
|
|
int (*check_cmd_status)(struct controller *ctrl);
|
2005-04-17 06:20:36 +08:00
|
|
|
};
|
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|
#endif /* _SHPCHP_H */
|