2007-09-15 04:41:56 +08:00
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/*
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* PQ2 ADS-style PCI interrupt controller
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*
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* Copyright 2007 Freescale Semiconductor, Inc.
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* Loosely based on mpc82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
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* Copyright (c) 2006 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <linux/types.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2007-09-15 04:41:56 +08:00
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/cpm2.h>
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#include "pq2.h"
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2010-02-18 21:57:38 +08:00
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static DEFINE_RAW_SPINLOCK(pci_pic_lock);
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2007-09-15 04:41:56 +08:00
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struct pq2ads_pci_pic {
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struct device_node *node;
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2012-02-15 05:06:50 +08:00
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struct irq_domain *host;
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2007-09-15 04:41:56 +08:00
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struct {
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u32 stat;
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u32 mask;
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} __iomem *regs;
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};
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#define NUM_IRQS 32
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2011-03-09 06:26:50 +08:00
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static void pq2ads_pci_mask_irq(struct irq_data *d)
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2007-09-15 04:41:56 +08:00
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{
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2011-03-09 06:26:50 +08:00
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struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);
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2011-05-04 13:02:15 +08:00
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int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;
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2007-09-15 04:41:56 +08:00
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if (irq != -1) {
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unsigned long flags;
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2010-02-18 21:57:38 +08:00
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raw_spin_lock_irqsave(&pci_pic_lock, flags);
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2007-09-15 04:41:56 +08:00
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setbits32(&priv->regs->mask, 1 << irq);
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mb();
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2010-02-18 21:57:38 +08:00
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raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
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2007-09-15 04:41:56 +08:00
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}
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}
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2011-03-09 06:26:50 +08:00
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static void pq2ads_pci_unmask_irq(struct irq_data *d)
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2007-09-15 04:41:56 +08:00
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{
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2011-03-09 06:26:50 +08:00
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struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);
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2011-05-04 13:02:15 +08:00
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int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;
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2007-09-15 04:41:56 +08:00
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if (irq != -1) {
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unsigned long flags;
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2010-02-18 21:57:38 +08:00
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raw_spin_lock_irqsave(&pci_pic_lock, flags);
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2007-09-15 04:41:56 +08:00
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clrbits32(&priv->regs->mask, 1 << irq);
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2010-02-18 21:57:38 +08:00
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raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
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2007-09-15 04:41:56 +08:00
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}
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}
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static struct irq_chip pq2ads_pci_ic = {
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.name = "PQ2 ADS PCI",
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2011-03-09 06:26:50 +08:00
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.irq_mask = pq2ads_pci_mask_irq,
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.irq_mask_ack = pq2ads_pci_mask_irq,
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.irq_ack = pq2ads_pci_mask_irq,
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.irq_unmask = pq2ads_pci_unmask_irq,
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.irq_enable = pq2ads_pci_unmask_irq,
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.irq_disable = pq2ads_pci_mask_irq
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2007-09-15 04:41:56 +08:00
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};
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static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
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{
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2011-03-25 23:45:20 +08:00
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struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc);
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2007-09-15 04:41:56 +08:00
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u32 stat, mask, pend;
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int bit;
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for (;;) {
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stat = in_be32(&priv->regs->stat);
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mask = in_be32(&priv->regs->mask);
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pend = stat & ~mask;
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if (!pend)
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break;
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for (bit = 0; pend != 0; ++bit, pend <<= 1) {
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if (pend & 0x80000000) {
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int virq = irq_linear_revmap(priv->host, bit);
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generic_handle_irq(virq);
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}
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}
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}
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}
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2012-02-15 05:06:50 +08:00
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static int pci_pic_host_map(struct irq_domain *h, unsigned int virq,
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2007-09-15 04:41:56 +08:00
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irq_hw_number_t hw)
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{
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2011-03-25 22:43:57 +08:00
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irq_set_status_flags(virq, IRQ_LEVEL);
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2011-03-25 23:45:20 +08:00
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irq_set_chip_data(virq, h->host_data);
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irq_set_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
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2007-09-15 04:41:56 +08:00
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return 0;
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}
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2012-01-27 03:24:34 +08:00
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static const struct irq_domain_ops pci_pic_host_ops = {
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2007-09-15 04:41:56 +08:00
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.map = pci_pic_host_map,
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};
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int __init pq2ads_pci_init_irq(void)
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{
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struct pq2ads_pci_pic *priv;
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2012-02-15 05:06:50 +08:00
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struct irq_domain *host;
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2007-09-15 04:41:56 +08:00
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struct device_node *np;
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int ret = -ENODEV;
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int irq;
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np = of_find_compatible_node(NULL, NULL, "fsl,pq2ads-pci-pic");
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if (!np) {
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printk(KERN_ERR "No pci pic node in device tree.\n");
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of_node_put(np);
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goto out;
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}
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irq = irq_of_parse_and_map(np, 0);
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if (irq == NO_IRQ) {
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printk(KERN_ERR "No interrupt in pci pic node.\n");
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of_node_put(np);
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goto out;
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}
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2009-07-01 18:59:57 +08:00
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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2007-09-15 04:41:56 +08:00
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if (!priv) {
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of_node_put(np);
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ret = -ENOMEM;
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goto out_unmap_irq;
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}
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/* PCI interrupt controller registers: status and mask */
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priv->regs = of_iomap(np, 0);
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if (!priv->regs) {
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printk(KERN_ERR "Cannot map PCI PIC registers.\n");
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2012-11-12 14:40:33 +08:00
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goto out_free_kmalloc;
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2007-09-15 04:41:56 +08:00
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}
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/* mask all PCI interrupts */
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out_be32(&priv->regs->mask, ~0);
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mb();
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2012-02-15 05:06:54 +08:00
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host = irq_domain_add_linear(np, NUM_IRQS, &pci_pic_host_ops, priv);
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2007-09-15 04:41:56 +08:00
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if (!host) {
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ret = -ENOMEM;
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goto out_unmap_regs;
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}
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priv->host = host;
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2011-03-25 23:45:20 +08:00
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irq_set_handler_data(irq, priv);
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irq_set_chained_handler(irq, pq2ads_pci_irq_demux);
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2007-09-15 04:41:56 +08:00
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of_node_put(np);
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return 0;
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out_unmap_regs:
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iounmap(priv->regs);
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2012-11-12 14:40:33 +08:00
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out_free_kmalloc:
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kfree(priv);
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2007-09-15 04:41:56 +08:00
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of_node_put(np);
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out_unmap_irq:
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irq_dispose_mapping(irq);
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out:
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return ret;
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}
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