2009-06-23 20:40:15 +08:00
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/* linux/arch/arm/mach-s5pc100/cpu.c
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2010-08-31 15:30:51 +08:00
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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2009-06-23 20:40:15 +08:00
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* Based on mach-s3c6410/cpu.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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2010-10-02 11:48:12 +08:00
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#include <linux/sched.h>
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2009-06-23 20:40:15 +08:00
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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2010-05-20 13:51:08 +08:00
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#include <asm/proc-fns.h>
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2009-06-23 20:40:15 +08:00
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <asm/irq.h>
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#include <plat/regs-serial.h>
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2010-05-20 13:51:08 +08:00
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#include <mach/regs-clock.h>
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2009-06-23 20:40:15 +08:00
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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2010-06-08 16:02:08 +08:00
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#include <plat/ata-core.h>
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2009-06-23 20:40:15 +08:00
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#include <plat/iic-core.h>
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2010-05-20 13:51:08 +08:00
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#include <plat/sdhci.h>
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2010-06-30 20:50:24 +08:00
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#include <plat/adc-core.h>
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2010-05-20 14:59:05 +08:00
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#include <plat/onenand-core.h>
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2010-08-11 09:02:37 +08:00
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#include <plat/fb-core.h>
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2010-05-20 14:59:05 +08:00
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2009-06-23 20:40:15 +08:00
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#include <plat/s5pc100.h>
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/* Initial IO mappings */
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static struct map_desc s5pc100_iodesc[] __initdata = {
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2010-05-20 13:51:08 +08:00
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{
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.virtual = (unsigned long)S5P_VA_SYSTIMER,
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.pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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2010-08-31 15:30:51 +08:00
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}, {
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.virtual = (unsigned long)S5P_VA_GPIO,
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.pfn = __phys_to_pfn(S5PC100_PA_GPIO),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC0,
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.pfn = __phys_to_pfn(S5PC100_PA_VIC0),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC1,
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.pfn = __phys_to_pfn(S5PC100_PA_VIC1),
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.length = SZ_16K,
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.type = MT_DEVICE,
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2010-05-20 13:51:08 +08:00
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}, {
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.virtual = (unsigned long)VA_VIC2,
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2010-08-31 15:30:51 +08:00
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.pfn = __phys_to_pfn(S5PC100_PA_VIC2),
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2010-05-20 13:51:08 +08:00
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.length = SZ_16K,
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.type = MT_DEVICE,
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2010-08-31 15:30:51 +08:00
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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2010-05-20 13:51:08 +08:00
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}, {
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.virtual = (unsigned long)S5PC100_VA_OTHERS,
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.pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}
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2009-06-23 20:40:15 +08:00
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};
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2009-11-17 15:41:17 +08:00
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static void s5pc100_idle(void)
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{
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2010-05-20 13:51:08 +08:00
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if (!need_resched())
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cpu_do_idle();
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2009-11-17 15:41:17 +08:00
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2010-05-20 13:51:08 +08:00
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local_irq_enable();
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2009-11-17 15:41:17 +08:00
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}
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2009-06-23 20:40:15 +08:00
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/* s5pc100_map_io
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*
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* register the standard cpu IO areas
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*/
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void __init s5pc100_map_io(void)
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{
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iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
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/* initialise device information early */
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2009-11-17 15:41:23 +08:00
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s5pc100_default_sdhci0();
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s5pc100_default_sdhci1();
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s5pc100_default_sdhci2();
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2009-11-17 15:41:21 +08:00
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2010-06-30 20:50:24 +08:00
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s3c_adc_setname("s3c64xx-adc");
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2009-11-17 15:41:21 +08:00
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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s3c_i2c1_setname("s3c2440-i2c");
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2010-05-20 14:59:05 +08:00
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s3c_onenand_setname("s5pc100-onenand");
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2010-08-11 09:02:37 +08:00
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s3c_fb_setname("s5pc100-fb");
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2010-06-08 16:02:08 +08:00
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s3c_cfcon_setname("s5pc100-pata");
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2009-06-23 20:40:15 +08:00
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}
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void __init s5pc100_init_clocks(int xtal)
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{
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2010-05-20 13:51:08 +08:00
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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2009-06-23 20:40:15 +08:00
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s3c24xx_register_baseclocks(xtal);
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2010-05-20 13:51:08 +08:00
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s5p_register_clocks(xtal);
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2009-06-23 20:40:15 +08:00
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s5pc100_register_clocks();
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s5pc100_setup_clocks();
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}
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void __init s5pc100_init_irq(void)
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{
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2010-05-20 13:51:08 +08:00
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u32 vic[] = {~0, ~0, ~0};
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2009-06-23 20:40:15 +08:00
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/* VIC0, VIC1, and VIC2 are fully populated. */
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2010-05-20 13:51:08 +08:00
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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2009-06-23 20:40:15 +08:00
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}
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2010-05-20 13:51:08 +08:00
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static struct sysdev_class s5pc100_sysclass = {
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2009-06-23 20:40:15 +08:00
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.name = "s5pc100-core",
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};
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static struct sys_device s5pc100_sysdev = {
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.cls = &s5pc100_sysclass,
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};
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static int __init s5pc100_core_init(void)
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{
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return sysdev_class_register(&s5pc100_sysclass);
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}
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core_initcall(s5pc100_core_init);
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int __init s5pc100_init(void)
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{
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2010-05-20 13:51:08 +08:00
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printk(KERN_INFO "S5PC100: Initializing architecture\n");
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2009-06-23 20:40:15 +08:00
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2010-05-20 13:51:08 +08:00
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/* set idle function */
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pm_idle = s5pc100_idle;
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2009-11-17 15:41:17 +08:00
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2009-06-23 20:40:15 +08:00
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return sysdev_register(&s5pc100_sysdev);
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}
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