2018-05-12 01:03:19 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2015-05-26 16:28:29 +08:00
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/*
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* SIRF hardware spinlock driver
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*
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* Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/hwspinlock.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "hwspinlock_internal.h"
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struct sirf_hwspinlock {
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void __iomem *io_base;
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struct hwspinlock_device bank;
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};
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/* Number of Hardware Spinlocks*/
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#define HW_SPINLOCK_NUMBER 30
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/* Hardware spinlock register offsets */
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#define HW_SPINLOCK_BASE 0x404
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#define HW_SPINLOCK_OFFSET(x) (HW_SPINLOCK_BASE + 0x4 * (x))
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static int sirf_hwspinlock_trylock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* attempt to acquire the lock by reading value == 1 from it */
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return !!readl(lock_addr);
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}
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static void sirf_hwspinlock_unlock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* release the lock by writing 0 to it */
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writel(0, lock_addr);
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}
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static const struct hwspinlock_ops sirf_hwspinlock_ops = {
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.trylock = sirf_hwspinlock_trylock,
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.unlock = sirf_hwspinlock_unlock,
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};
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static int sirf_hwspinlock_probe(struct platform_device *pdev)
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{
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struct sirf_hwspinlock *hwspin;
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struct hwspinlock *hwlock;
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2020-01-08 11:23:45 +08:00
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int idx;
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2015-05-26 16:28:29 +08:00
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if (!pdev->dev.of_node)
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return -ENODEV;
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treewide: Use struct_size() for devm_kmalloc() and friends
Replaces open-coded struct size calculations with struct_size() for
devm_*, f2fs_*, and sock_* allocations. Automatically generated (and
manually adjusted) from the following Coccinelle script:
// Direct reference to struct field.
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@
- alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(*VAR->ELEMENT), GFP)
+ alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP)
// mr = kzalloc(sizeof(*mr) + m * sizeof(mr->map[0]), GFP_KERNEL);
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@
- alloc(HANDLE, sizeof(*VAR) + COUNT * sizeof(VAR->ELEMENT[0]), GFP)
+ alloc(HANDLE, struct_size(VAR, ELEMENT, COUNT), GFP)
// Same pattern, but can't trivially locate the trailing element name,
// or variable name.
@@
identifier alloc =~ "devm_kmalloc|devm_kzalloc|sock_kmalloc|f2fs_kmalloc|f2fs_kzalloc";
expression HANDLE;
expression GFP;
expression SOMETHING, COUNT, ELEMENT;
@@
- alloc(HANDLE, sizeof(SOMETHING) + COUNT * sizeof(ELEMENT), GFP)
+ alloc(HANDLE, CHECKME_struct_size(&SOMETHING, ELEMENT, COUNT), GFP)
Signed-off-by: Kees Cook <keescook@chromium.org>
2018-05-09 07:08:53 +08:00
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hwspin = devm_kzalloc(&pdev->dev,
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struct_size(hwspin, bank.lock,
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HW_SPINLOCK_NUMBER),
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GFP_KERNEL);
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2015-05-26 16:28:29 +08:00
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if (!hwspin)
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return -ENOMEM;
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/* retrieve io base */
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2020-01-08 11:23:44 +08:00
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hwspin->io_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(hwspin->io_base))
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return PTR_ERR(hwspin->io_base);
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2015-05-26 16:28:29 +08:00
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for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) {
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hwlock = &hwspin->bank.lock[idx];
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hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx);
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}
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platform_set_drvdata(pdev, hwspin);
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2020-01-08 11:23:46 +08:00
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return devm_hwspin_lock_register(&pdev->dev, &hwspin->bank,
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&sirf_hwspinlock_ops, 0,
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HW_SPINLOCK_NUMBER);
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2015-05-26 16:28:29 +08:00
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}
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static const struct of_device_id sirf_hwpinlock_ids[] = {
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{ .compatible = "sirf,hwspinlock", },
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{},
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};
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MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids);
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static struct platform_driver sirf_hwspinlock_driver = {
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.probe = sirf_hwspinlock_probe,
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.driver = {
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.name = "atlas7_hwspinlock",
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2020-06-08 20:20:28 +08:00
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.of_match_table = sirf_hwpinlock_ids,
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2015-05-26 16:28:29 +08:00
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},
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};
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module_platform_driver(sirf_hwspinlock_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("SIRF Hardware spinlock driver");
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MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>");
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