2009-02-12 21:54:53 +08:00
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/*
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* Copyright 2009 Freescale Semicondutor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* provides masks and opcode images for use by code generation, emulation
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* and for instructions that older assemblers might not know about
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*/
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#ifndef _ASM_POWERPC_DBELL_H
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#define _ASM_POWERPC_DBELL_H
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#include <linux/smp.h>
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#include <linux/threads.h>
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#include <asm/ppc-opcode.h>
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#define PPC_DBELL_MSG_BRDCAST (0x04000000)
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2011-06-06 00:48:47 +08:00
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#define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
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2009-02-12 21:54:53 +08:00
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enum ppc_dbell {
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PPC_DBELL = 0, /* doorbell */
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PPC_DBELL_CRIT = 1, /* critical doorbell */
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PPC_G_DBELL = 2, /* guest doorbell */
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PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */
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PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */
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};
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powerpc: Consolidate ipi message mux and demux
Consolidate the mux and demux of ipi messages into smp.c and call
a new smp_ops callback to actually trigger the ipi.
The powerpc architecture code is optimised for having 4 distinct
ipi triggers, which are mapped to 4 distinct messages (ipi many, ipi
single, scheduler ipi, and enter debugger). However, several interrupt
controllers only provide a single software triggered interrupt that
can be delivered to each cpu. To resolve this limitation, each smp_ops
implementation created a per-cpu variable that is manipulated with atomic
bitops. Since these lines will be contended they are optimialy marked as
shared_aligned and take a full cache line for each cpu. Distro kernels
may have 2 or 3 of these in their config, each taking per-cpu space
even though at most one will be in use.
This consolidation removes smp_message_recv and replaces the single call
actions cases with direct calls from the common message recognition loop.
The complicated debugger ipi case with its muxed crash handling code is
moved to debug_ipi_action which is now called from the demux code (instead
of the multi-message action calling smp_message_recv).
I put a call to reschedule_action to increase the likelyhood of correctly
merging the anticipated scheduler_ipi() hook coming from the scheduler
tree; that single required call can be inlined later.
The actual message decode is a copy of the old pseries xics code with its
memory barriers and cache line spacing, augmented with a per-cpu unsigned
long based on the book-e doorbell code. The optional data is set via a
callback from the implementation and is passed to the new cause-ipi hook
along with the logical cpu number. While currently only the doorbell
implemntation uses this data it should be almost zero cost to retrieve and
pass it -- it adds a single register load for the argument from the same
cache line to which we just completed a store and the register is dead
on return from the call. I extended the data element from unsigned int
to unsigned long in case some other code wanted to associate a pointer.
The doorbell check_self is replaced by a call to smp_muxed_ipi_resend,
conditioned on the CPU_DBELL feature. The ifdef guard could be relaxed
to CONFIG_SMP but I left it with BOOKE for now.
Also, the doorbell interrupt vector for book-e was not calling irq_enter
and irq_exit, which throws off cpu accounting and causes code to not
realize it is running in interrupt context. Add the missing calls.
Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-11 03:29:39 +08:00
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extern void doorbell_cause_ipi(int cpu, unsigned long data);
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2010-07-09 13:29:53 +08:00
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extern void doorbell_exception(struct pt_regs *regs);
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extern void doorbell_setup_this_cpu(void);
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2009-02-12 21:54:53 +08:00
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static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)
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{
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u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) |
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(tag & 0x07ffffff);
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__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
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}
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#endif /* _ASM_POWERPC_DBELL_H */
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