2011-09-20 01:44:52 +08:00
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/*
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* SMP support for PowerNV machines.
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/paca.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#include <asm/cputhreads.h>
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#include <asm/xics.h>
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2011-09-20 01:44:57 +08:00
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#include <asm/opal.h>
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2014-04-11 18:31:48 +08:00
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#include <asm/runlatch.h>
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2014-03-11 08:54:06 +08:00
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#include <asm/code-patching.h>
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2014-06-11 13:59:28 +08:00
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#include <asm/dbell.h>
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2011-09-20 01:44:52 +08:00
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#include "powernv.h"
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2011-09-20 01:44:54 +08:00
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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2013-06-25 03:30:09 +08:00
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static void pnv_smp_setup_cpu(int cpu)
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2011-09-20 01:44:52 +08:00
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{
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if (cpu != boot_cpuid)
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xics_setup_cpu();
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2014-06-11 13:59:28 +08:00
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#ifdef CONFIG_PPC_DOORBELL
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if (cpu_has_feature(CPU_FTR_DBELL))
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doorbell_setup_this_cpu();
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#endif
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2011-09-20 01:44:52 +08:00
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}
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2014-08-20 06:55:18 +08:00
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static int pnv_smp_kick_cpu(int nr)
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2011-09-20 01:44:57 +08:00
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{
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unsigned int pcpu = get_hard_smp_processor_id(nr);
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2014-03-11 08:54:06 +08:00
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unsigned long start_here =
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__pa(ppc_function_entry(generic_secondary_smp_init));
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2011-09-20 01:44:57 +08:00
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long rc;
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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2013-05-14 13:12:31 +08:00
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/*
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* If we already started or OPALv2 is not supported, we just
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* kick the CPU via the PACA
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2011-09-20 01:44:57 +08:00
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*/
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2013-05-14 13:12:31 +08:00
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if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
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goto kick;
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/*
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* At this point, the CPU can either be spinning on the way in
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* from kexec or be inside OPAL waiting to be started for the
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* first time. OPAL v3 allows us to query OPAL to know if it
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* has the CPUs, so we do that
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*/
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if (firmware_has_feature(FW_FEATURE_OPALv3)) {
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uint8_t status;
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rc = opal_query_cpu_status(pcpu, &status);
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2013-05-04 01:21:00 +08:00
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if (rc != OPAL_SUCCESS) {
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2013-05-14 13:12:31 +08:00
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pr_warn("OPAL Error %ld querying CPU %d state\n",
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2011-09-20 01:44:57 +08:00
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rc, nr);
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2013-05-04 01:21:00 +08:00
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return -ENODEV;
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}
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2013-05-14 13:12:31 +08:00
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/*
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* Already started, just kick it, probably coming from
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* kexec and spinning
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*/
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if (status == OPAL_THREAD_STARTED)
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goto kick;
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/*
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* Available/inactive, let's kick it
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*/
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if (status == OPAL_THREAD_INACTIVE) {
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pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
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nr, pcpu);
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rc = opal_start_cpu(pcpu, start_here);
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if (rc != OPAL_SUCCESS) {
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pr_warn("OPAL Error %ld starting CPU %d\n",
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rc, nr);
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return -ENODEV;
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}
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} else {
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/*
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* An unavailable CPU (or any other unknown status)
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* shouldn't be started. It should also
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* not be in the possible map but currently it can
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* happen
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*/
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pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
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" (status %d)...\n", nr, pcpu, status);
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return -ENODEV;
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}
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} else {
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/*
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* On OPAL v2, we just kick it and hope for the best,
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* we must not test the error from opal_start_cpu() or
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* we would fail to get CPUs from kexec.
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*/
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opal_start_cpu(pcpu, start_here);
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2011-09-20 01:44:57 +08:00
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}
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2013-05-14 13:12:31 +08:00
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kick:
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2011-09-20 01:44:57 +08:00
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return smp_generic_kick_cpu(nr);
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}
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2011-09-20 01:44:54 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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static int pnv_smp_cpu_disable(void)
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{
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int cpu = smp_processor_id();
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/* This is identical to pSeries... might consolidate by
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* moving migrate_irqs_away to a ppc_md with default to
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* the generic fixup_irqs. --BenH.
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*/
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set_cpu_online(cpu, false);
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vdso_data->processorCount--;
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if (cpu == boot_cpuid)
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boot_cpuid = cpumask_any(cpu_online_mask);
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xics_migrate_irqs_away();
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return 0;
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}
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static void pnv_smp_cpu_kill_self(void)
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{
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unsigned int cpu;
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powerpc/powernv: Return to cpu offline loop when finished in KVM guest
When a secondary hardware thread has finished running a KVM guest, we
currently put that thread into nap mode using a nap instruction in
the KVM code. This changes the code so that instead of doing a nap
instruction directly, we instead cause the call to power7_nap() that
put the thread into nap mode to return. The reason for doing this is
to avoid having the KVM code having to know what low-power mode to
put the thread into.
In the case of a secondary thread used to run a KVM guest, the thread
will be offline from the point of view of the host kernel, and the
relevant power7_nap() call is the one in pnv_smp_cpu_disable().
In this case we don't want to clear pending IPIs in the offline loop
in that function, since that might cause us to miss the wakeup for
the next time the thread needs to run a guest. To tell whether or
not to clear the interrupt, we use the SRR1 value returned from
power7_nap(), and check if it indicates an external interrupt. We
arrange that the return from power7_nap() when we have finished running
a guest returns 0, so pending interrupts don't get flushed in that
case.
Note that it is important a secondary thread that has finished
executing in the guest, or that didn't have a guest to run, should
not return to power7_nap's caller while the kvm_hstate.hwthread_req
flag in the PACA is non-zero, because the return from power7_nap
will reenable the MMU, and the MMU might still be in guest context.
In this situation we spin at low priority in real mode waiting for
hwthread_req to become zero.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-12-03 11:48:40 +08:00
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unsigned long srr1;
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2014-12-10 02:56:51 +08:00
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u32 idle_states;
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2011-09-20 01:44:54 +08:00
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/* Standard hot unplug procedure */
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local_irq_disable();
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idle_task_exit();
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current->active_mm = NULL; /* for sanity */
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cpu = smp_processor_id();
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DBG("CPU%d offline\n", cpu);
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generic_set_cpu_dead(cpu);
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smp_wmb();
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2014-12-10 02:56:51 +08:00
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idle_states = pnv_get_supported_cpuidle_states();
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2011-09-20 01:44:54 +08:00
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/* We don't want to take decrementer interrupts while we are offline,
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* so clear LPCR:PECE1. We keep PECE2 enabled.
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*/
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
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while (!generic_check_cpu_restart(cpu)) {
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2014-12-10 02:56:53 +08:00
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2014-04-11 18:31:48 +08:00
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ppc64_runlatch_off();
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2014-12-10 02:56:53 +08:00
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if (idle_states & OPAL_PM_WINKLE_ENABLED)
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srr1 = power7_winkle();
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else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
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2014-12-10 02:56:52 +08:00
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(idle_states & OPAL_PM_SLEEP_ENABLED_ER1))
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2014-12-10 02:56:51 +08:00
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srr1 = power7_sleep();
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else
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srr1 = power7_nap(1);
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2014-12-10 02:56:53 +08:00
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2014-04-11 18:31:48 +08:00
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ppc64_runlatch_on();
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2014-05-23 16:15:30 +08:00
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powerpc/powernv: Return to cpu offline loop when finished in KVM guest
When a secondary hardware thread has finished running a KVM guest, we
currently put that thread into nap mode using a nap instruction in
the KVM code. This changes the code so that instead of doing a nap
instruction directly, we instead cause the call to power7_nap() that
put the thread into nap mode to return. The reason for doing this is
to avoid having the KVM code having to know what low-power mode to
put the thread into.
In the case of a secondary thread used to run a KVM guest, the thread
will be offline from the point of view of the host kernel, and the
relevant power7_nap() call is the one in pnv_smp_cpu_disable().
In this case we don't want to clear pending IPIs in the offline loop
in that function, since that might cause us to miss the wakeup for
the next time the thread needs to run a guest. To tell whether or
not to clear the interrupt, we use the SRR1 value returned from
power7_nap(), and check if it indicates an external interrupt. We
arrange that the return from power7_nap() when we have finished running
a guest returns 0, so pending interrupts don't get flushed in that
case.
Note that it is important a secondary thread that has finished
executing in the guest, or that didn't have a guest to run, should
not return to power7_nap's caller while the kvm_hstate.hwthread_req
flag in the PACA is non-zero, because the return from power7_nap
will reenable the MMU, and the MMU might still be in guest context.
In this situation we spin at low priority in real mode waiting for
hwthread_req to become zero.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-12-03 11:48:40 +08:00
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/*
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* If the SRR1 value indicates that we woke up due to
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* an external interrupt, then clear the interrupt.
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* We clear the interrupt before checking for the
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* reason, so as to avoid a race where we wake up for
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* some other reason, find nothing and clear the interrupt
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* just as some other cpu is sending us an interrupt.
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* If we returned from power7_nap as a result of
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* having finished executing in a KVM guest, then srr1
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* contains 0.
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*/
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if ((srr1 & SRR1_WAKEMASK) == SRR1_WAKEEE) {
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icp_native_flush_interrupt();
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local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
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smp_mb();
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}
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2014-05-23 16:15:30 +08:00
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if (cpu_core_split_required())
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continue;
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if (!generic_check_cpu_restart(cpu))
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2011-09-20 01:44:54 +08:00
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DBG("CPU%d Unexpected exit while offline !\n", cpu);
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}
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
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DBG("CPU%d coming online...\n", cpu);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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2011-09-20 01:44:52 +08:00
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static struct smp_ops_t pnv_smp_ops = {
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.message_pass = smp_muxed_ipi_message_pass,
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.cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
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.probe = xics_smp_probe,
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2011-09-20 01:44:57 +08:00
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.kick_cpu = pnv_smp_kick_cpu,
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2011-09-20 01:44:52 +08:00
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.setup_cpu = pnv_smp_setup_cpu,
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2013-08-06 03:58:35 +08:00
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.cpu_bootable = smp_generic_cpu_bootable,
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2011-09-20 01:44:54 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = pnv_smp_cpu_disable,
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.cpu_die = generic_cpu_die,
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#endif /* CONFIG_HOTPLUG_CPU */
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2011-09-20 01:44:52 +08:00
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};
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/* This is called very early during platform setup_arch */
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void __init pnv_smp_init(void)
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{
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smp_ops = &pnv_smp_ops;
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/* XXX We don't yet have a proper entry point from HAL, for
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* now we rely on kexec-style entry from BML
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*/
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#ifdef CONFIG_PPC_RTAS
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/* Non-lpar has additional take/give timebase */
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if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
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smp_ops->give_timebase = rtas_give_timebase;
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smp_ops->take_timebase = rtas_take_timebase;
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}
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#endif /* CONFIG_PPC_RTAS */
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2011-09-20 01:44:54 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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ppc_md.cpu_die = pnv_smp_cpu_kill_self;
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#endif
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2011-09-20 01:44:52 +08:00
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}
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