2009-05-13 21:10:21 +08:00
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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2011-02-23 17:58:39 +08:00
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Copyright(c) 1999 - 2011 Intel Corporation.
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2009-05-13 21:10:21 +08:00
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "ixgbe.h"
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#include <linux/if_ether.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/gfp.h>
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2010-05-19 00:00:05 +08:00
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#include <linux/if_vlan.h>
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2009-05-13 21:10:21 +08:00
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/fc/fc_fs.h>
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#include <scsi/fc/fc_fcoe.h>
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#include <scsi/libfc.h>
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#include <scsi/libfcoe.h>
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2009-05-13 21:11:29 +08:00
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/**
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* ixgbe_fcoe_clear_ddp - clear the given ddp context
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* @ddp - ptr to the ixgbe_fcoe_ddp
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*
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* Returns : none
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*
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*/
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static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
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{
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ddp->len = 0;
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2010-11-17 11:27:13 +08:00
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ddp->err = 1;
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2009-05-13 21:11:29 +08:00
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ddp->udl = NULL;
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ddp->udp = 0UL;
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ddp->sgl = NULL;
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ddp->sgc = 0;
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}
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/**
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* ixgbe_fcoe_ddp_put - free the ddp context for a given xid
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* @netdev: the corresponding net_device
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* @xid: the xid that corresponding ddp will be freed
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_done
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* and it is expected to be called by ULD, i.e., FCP layer of libfc
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* to release the corresponding ddp context when the I/O is done.
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*
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* Returns : data length already ddp-ed in bytes
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*/
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int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
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{
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int len = 0;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_adapter *adapter;
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struct ixgbe_fcoe_ddp *ddp;
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2010-11-17 11:27:14 +08:00
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u32 fcbuff;
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2009-05-13 21:11:29 +08:00
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if (!netdev)
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goto out_ddp_put;
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if (xid >= IXGBE_FCOE_DDP_MAX)
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goto out_ddp_put;
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adapter = netdev_priv(netdev);
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (!ddp->udl)
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goto out_ddp_put;
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len = ddp->len;
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/* if there an error, force to invalidate ddp context */
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if (ddp->err) {
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spin_lock_bh(&fcoe->lock);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
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(xid | IXGBE_FCFLTRW_WE));
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_WE));
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2010-11-17 11:27:14 +08:00
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/* guaranteed to be invalidated after 100us */
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_RE));
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fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
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2009-05-13 21:11:29 +08:00
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spin_unlock_bh(&fcoe->lock);
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2010-11-17 11:27:14 +08:00
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if (fcbuff & IXGBE_FCBUFF_VALID)
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udelay(100);
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2009-05-13 21:11:29 +08:00
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}
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if (ddp->sgl)
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pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
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DMA_FROM_DEVICE);
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2011-05-11 13:41:46 +08:00
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if (ddp->pool) {
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pci_pool_free(ddp->pool, ddp->udl, ddp->udp);
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ddp->pool = NULL;
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}
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2009-05-13 21:11:29 +08:00
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ixgbe_fcoe_clear_ddp(ddp);
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out_ddp_put:
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return len;
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}
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/**
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2011-02-01 15:22:16 +08:00
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* ixgbe_fcoe_ddp_setup - called to set up ddp context
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2009-05-13 21:11:29 +08:00
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* @netdev: the corresponding net_device
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* @xid: the exchange id requesting ddp
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* @sgl: the scatter-gather list for this request
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* @sgc: the number of scatter-gather items
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*
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* Returns : 1 for success and 0 for no ddp
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*/
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2011-02-01 15:22:16 +08:00
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static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,
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struct scatterlist *sgl, unsigned int sgc,
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int target_mode)
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2009-05-13 21:11:29 +08:00
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{
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struct ixgbe_adapter *adapter;
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struct ixgbe_hw *hw;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_fcoe_ddp *ddp;
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struct scatterlist *sg;
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unsigned int i, j, dmacount;
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unsigned int len;
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2011-02-15 17:11:31 +08:00
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static const unsigned int bufflen = IXGBE_FCBUFF_MIN;
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2009-05-13 21:11:29 +08:00
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unsigned int firstoff = 0;
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unsigned int lastsize;
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unsigned int thisoff = 0;
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unsigned int thislen = 0;
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2011-02-01 15:22:16 +08:00
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u32 fcbuff, fcdmarw, fcfltrw, fcrxctl;
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2011-01-26 14:04:17 +08:00
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dma_addr_t addr = 0;
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2011-05-11 13:41:46 +08:00
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struct pci_pool *pool;
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2009-05-13 21:11:29 +08:00
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if (!netdev || !sgl)
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return 0;
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adapter = netdev_priv(netdev);
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if (xid >= IXGBE_FCOE_DDP_MAX) {
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2010-07-02 04:05:12 +08:00
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e_warn(drv, "xid=0x%x out-of-range\n", xid);
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2009-05-13 21:11:29 +08:00
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return 0;
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}
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2010-11-17 11:27:13 +08:00
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/* no DDP if we are already down or resetting */
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if (test_bit(__IXGBE_DOWN, &adapter->state) ||
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test_bit(__IXGBE_RESETTING, &adapter->state))
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return 0;
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2009-05-13 21:11:29 +08:00
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fcoe = &adapter->fcoe;
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if (!fcoe->pool) {
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2010-07-02 04:05:12 +08:00
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e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid);
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2009-05-13 21:11:29 +08:00
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return 0;
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}
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ddp = &fcoe->ddp[xid];
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if (ddp->sgl) {
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2010-07-02 04:05:12 +08:00
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e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
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xid, ddp->sgl, ddp->sgc);
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2009-05-13 21:11:29 +08:00
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return 0;
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}
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ixgbe_fcoe_clear_ddp(ddp);
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/* setup dma from scsi command sgl */
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dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
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if (dmacount == 0) {
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2010-07-02 04:05:12 +08:00
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e_err(drv, "xid 0x%x DMA map error\n", xid);
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2009-05-13 21:11:29 +08:00
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return 0;
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}
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2011-05-11 13:41:46 +08:00
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/* alloc the udl from per cpu ddp pool */
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pool = *per_cpu_ptr(fcoe->pool, get_cpu());
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ddp->udl = pci_pool_alloc(pool, GFP_ATOMIC, &ddp->udp);
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2009-05-13 21:11:29 +08:00
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if (!ddp->udl) {
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2010-07-02 04:05:12 +08:00
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e_err(drv, "failed allocated ddp context\n");
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2009-05-13 21:11:29 +08:00
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goto out_noddp_unmap;
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}
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2011-05-11 13:41:46 +08:00
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ddp->pool = pool;
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2009-05-13 21:11:29 +08:00
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ddp->sgl = sgl;
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ddp->sgc = sgc;
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j = 0;
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for_each_sg(sgl, sg, dmacount, i) {
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addr = sg_dma_address(sg);
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len = sg_dma_len(sg);
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while (len) {
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2010-03-24 18:02:04 +08:00
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/* max number of buffers allowed in one DDP context */
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if (j >= IXGBE_BUFFCNT_MAX) {
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2010-07-02 04:05:12 +08:00
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e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
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2010-06-04 00:53:41 +08:00
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"not enough descriptors\n",
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xid, i, j, dmacount, (u64)addr);
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2010-03-24 18:02:04 +08:00
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goto out_noddp_free;
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}
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2009-05-13 21:11:29 +08:00
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/* get the offset of length of current buffer */
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thisoff = addr & ((dma_addr_t)bufflen - 1);
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thislen = min((bufflen - thisoff), len);
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/*
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* all but the 1st buffer (j == 0)
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* must be aligned on bufflen
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*/
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if ((j != 0) && (thisoff))
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goto out_noddp_free;
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/*
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* all but the last buffer
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* ((i == (dmacount - 1)) && (thislen == len))
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* must end at bufflen
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*/
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if (((i != (dmacount - 1)) || (thislen != len))
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&& ((thislen + thisoff) != bufflen))
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goto out_noddp_free;
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ddp->udl[j] = (u64)(addr - thisoff);
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/* only the first buffer may have none-zero offset */
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if (j == 0)
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firstoff = thisoff;
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len -= thislen;
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addr += thislen;
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j++;
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}
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}
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/* only the last buffer may have non-full bufflen */
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lastsize = thisoff + thislen;
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2011-02-15 17:11:31 +08:00
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/*
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* lastsize can not be buffer len.
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* If it is then adding another buffer with lastsize = 1.
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*/
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if (lastsize == bufflen) {
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if (j >= IXGBE_BUFFCNT_MAX) {
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e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
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"not enough user buffers. We need an extra "
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"buffer because lastsize is bufflen.\n",
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xid, i, j, dmacount, (u64)addr);
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goto out_noddp_free;
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}
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ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma);
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j++;
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lastsize = 1;
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}
|
2011-05-11 13:41:46 +08:00
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put_cpu();
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2011-02-15 17:11:31 +08:00
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2009-05-13 21:11:29 +08:00
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fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
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2010-03-24 18:02:04 +08:00
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fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
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2009-05-13 21:11:29 +08:00
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fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
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2011-02-01 15:22:16 +08:00
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/* Set WRCONTX bit to allow DDP for target */
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if (target_mode)
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fcbuff |= (IXGBE_FCBUFF_WRCONTX);
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2009-05-13 21:11:29 +08:00
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fcbuff |= (IXGBE_FCBUFF_VALID);
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fcdmarw = xid;
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fcdmarw |= IXGBE_FCDMARW_WE;
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fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
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|
|
|
|
|
fcfltrw = xid;
|
|
|
|
fcfltrw |= IXGBE_FCFLTRW_WE;
|
|
|
|
|
|
|
|
/* program DMA context */
|
|
|
|
hw = &adapter->hw;
|
|
|
|
spin_lock_bh(&fcoe->lock);
|
2011-02-01 15:22:16 +08:00
|
|
|
|
|
|
|
/* turn on last frame indication for target mode as FCP_RSPtarget is
|
|
|
|
* supposed to send FCP_RSP when it is done. */
|
|
|
|
if (target_mode && !test_bit(__IXGBE_FCOE_TARGET, &fcoe->mode)) {
|
|
|
|
set_bit(__IXGBE_FCOE_TARGET, &fcoe->mode);
|
|
|
|
fcrxctl = IXGBE_READ_REG(hw, IXGBE_FCRXCTRL);
|
|
|
|
fcrxctl |= IXGBE_FCRXCTRL_LASTSEQH;
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, fcrxctl);
|
|
|
|
}
|
|
|
|
|
2009-06-19 07:49:17 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
|
2009-05-13 21:11:29 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
|
|
|
|
/* program filter context */
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
|
2011-02-01 15:22:16 +08:00
|
|
|
|
2009-05-13 21:11:29 +08:00
|
|
|
spin_unlock_bh(&fcoe->lock);
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
out_noddp_free:
|
2011-05-11 13:41:46 +08:00
|
|
|
pci_pool_free(pool, ddp->udl, ddp->udp);
|
2009-05-13 21:11:29 +08:00
|
|
|
ixgbe_fcoe_clear_ddp(ddp);
|
|
|
|
|
|
|
|
out_noddp_unmap:
|
|
|
|
pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
|
2011-05-11 13:41:46 +08:00
|
|
|
put_cpu();
|
2009-05-13 21:11:29 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-02-01 15:22:16 +08:00
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_ddp_get - called to set up ddp context in initiator mode
|
|
|
|
* @netdev: the corresponding net_device
|
|
|
|
* @xid: the exchange id requesting ddp
|
|
|
|
* @sgl: the scatter-gather list for this request
|
|
|
|
* @sgc: the number of scatter-gather items
|
|
|
|
*
|
|
|
|
* This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
|
|
|
|
* and is expected to be called from ULD, e.g., FCP layer of libfc
|
|
|
|
* to set up ddp for the corresponding xid of the given sglist for
|
|
|
|
* the corresponding I/O.
|
|
|
|
*
|
|
|
|
* Returns : 1 for success and 0 for no ddp
|
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
|
|
|
|
struct scatterlist *sgl, unsigned int sgc)
|
|
|
|
{
|
|
|
|
return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_ddp_target - called to set up ddp context in target mode
|
|
|
|
* @netdev: the corresponding net_device
|
|
|
|
* @xid: the exchange id requesting ddp
|
|
|
|
* @sgl: the scatter-gather list for this request
|
|
|
|
* @sgc: the number of scatter-gather items
|
|
|
|
*
|
|
|
|
* This is the implementation of net_device_ops.ndo_fcoe_ddp_target
|
|
|
|
* and is expected to be called from ULD, e.g., FCP layer of libfc
|
|
|
|
* to set up ddp for the corresponding xid of the given sglist for
|
|
|
|
* the corresponding I/O. The DDP in target mode is a write I/O request
|
|
|
|
* from the initiator.
|
|
|
|
*
|
|
|
|
* Returns : 1 for success and 0 for no ddp
|
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
|
|
|
|
struct scatterlist *sgl, unsigned int sgc)
|
|
|
|
{
|
|
|
|
return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 1);
|
|
|
|
}
|
|
|
|
|
2009-05-13 21:11:29 +08:00
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_ddp - check ddp status and mark it done
|
|
|
|
* @adapter: ixgbe adapter
|
|
|
|
* @rx_desc: advanced rx descriptor
|
|
|
|
* @skb: the skb holding the received data
|
|
|
|
*
|
|
|
|
* This checks ddp status.
|
|
|
|
*
|
2009-06-08 22:38:44 +08:00
|
|
|
* Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
|
|
|
|
* not passing the skb to ULD, > 0 indicates is the length of data
|
|
|
|
* being ddped.
|
2009-05-13 21:11:29 +08:00
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
|
|
|
|
union ixgbe_adv_rx_desc *rx_desc,
|
2011-06-11 09:45:13 +08:00
|
|
|
struct sk_buff *skb,
|
|
|
|
u32 staterr)
|
2009-05-13 21:11:29 +08:00
|
|
|
{
|
|
|
|
u16 xid;
|
2009-09-03 22:56:31 +08:00
|
|
|
u32 fctl;
|
2011-06-11 09:45:13 +08:00
|
|
|
u32 fceofe, fcerr, fcstat;
|
2009-05-13 21:11:29 +08:00
|
|
|
int rc = -EINVAL;
|
|
|
|
struct ixgbe_fcoe *fcoe;
|
|
|
|
struct ixgbe_fcoe_ddp *ddp;
|
|
|
|
struct fc_frame_header *fh;
|
2011-02-01 15:22:16 +08:00
|
|
|
struct fcoe_crc_eof *crc;
|
2009-05-13 21:11:29 +08:00
|
|
|
|
2011-06-11 09:45:13 +08:00
|
|
|
fcerr = (staterr & IXGBE_RXDADV_ERR_FCERR);
|
|
|
|
fceofe = (staterr & IXGBE_RXDADV_ERR_FCEOFE);
|
2009-05-13 21:11:29 +08:00
|
|
|
if (fcerr == IXGBE_FCERR_BADCRC)
|
2010-09-03 04:07:41 +08:00
|
|
|
skb_checksum_none_assert(skb);
|
|
|
|
else
|
|
|
|
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
2009-05-13 21:11:29 +08:00
|
|
|
|
2010-05-19 00:00:05 +08:00
|
|
|
if (eth_hdr(skb)->h_proto == htons(ETH_P_8021Q))
|
|
|
|
fh = (struct fc_frame_header *)(skb->data +
|
|
|
|
sizeof(struct vlan_hdr) + sizeof(struct fcoe_hdr));
|
|
|
|
else
|
|
|
|
fh = (struct fc_frame_header *)(skb->data +
|
|
|
|
sizeof(struct fcoe_hdr));
|
2009-09-03 22:56:31 +08:00
|
|
|
fctl = ntoh24(fh->fh_f_ctl);
|
|
|
|
if (fctl & FC_FC_EX_CTX)
|
|
|
|
xid = be16_to_cpu(fh->fh_ox_id);
|
|
|
|
else
|
|
|
|
xid = be16_to_cpu(fh->fh_rx_id);
|
|
|
|
|
2009-05-13 21:11:29 +08:00
|
|
|
if (xid >= IXGBE_FCOE_DDP_MAX)
|
|
|
|
goto ddp_out;
|
|
|
|
|
|
|
|
fcoe = &adapter->fcoe;
|
|
|
|
ddp = &fcoe->ddp[xid];
|
|
|
|
if (!ddp->udl)
|
|
|
|
goto ddp_out;
|
|
|
|
|
2011-04-09 16:34:12 +08:00
|
|
|
if (fcerr | fceofe)
|
2009-05-13 21:11:29 +08:00
|
|
|
goto ddp_out;
|
|
|
|
|
2011-06-11 09:45:13 +08:00
|
|
|
fcstat = (staterr & IXGBE_RXDADV_STAT_FCSTAT);
|
2009-05-13 21:11:29 +08:00
|
|
|
if (fcstat) {
|
|
|
|
/* update length of DDPed data */
|
|
|
|
ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
|
|
|
|
/* unmap the sg list when FCP_RSP is received */
|
|
|
|
if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
|
|
|
|
pci_unmap_sg(adapter->pdev, ddp->sgl,
|
|
|
|
ddp->sgc, DMA_FROM_DEVICE);
|
2011-04-09 16:34:12 +08:00
|
|
|
ddp->err = (fcerr | fceofe);
|
2009-05-13 21:11:29 +08:00
|
|
|
ddp->sgl = NULL;
|
|
|
|
ddp->sgc = 0;
|
|
|
|
}
|
|
|
|
/* return 0 to bypass going to ULD for DDPed data */
|
|
|
|
if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
|
|
|
|
rc = 0;
|
2009-08-13 22:09:58 +08:00
|
|
|
else if (ddp->len)
|
2009-06-08 22:38:44 +08:00
|
|
|
rc = ddp->len;
|
2009-05-13 21:11:29 +08:00
|
|
|
}
|
2011-02-01 15:22:16 +08:00
|
|
|
/* In target mode, check the last data frame of the sequence.
|
|
|
|
* For DDP in target mode, data is already DDPed but the header
|
|
|
|
* indication of the last data frame ould allow is to tell if we
|
|
|
|
* got all the data and the ULP can send FCP_RSP back, as this is
|
|
|
|
* not a full fcoe frame, we fill the trailer here so it won't be
|
|
|
|
* dropped by the ULP stack.
|
|
|
|
*/
|
|
|
|
if ((fh->fh_r_ctl == FC_RCTL_DD_SOL_DATA) &&
|
|
|
|
(fctl & FC_FC_END_SEQ)) {
|
|
|
|
crc = (struct fcoe_crc_eof *)skb_put(skb, sizeof(*crc));
|
|
|
|
crc->fcoe_eof = FC_EOF_T;
|
|
|
|
}
|
2009-05-13 21:11:29 +08:00
|
|
|
ddp_out:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2009-05-13 21:10:44 +08:00
|
|
|
/**
|
|
|
|
* ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
|
|
|
|
* @adapter: ixgbe adapter
|
|
|
|
* @tx_ring: tx desc ring
|
|
|
|
* @skb: associated skb
|
|
|
|
* @tx_flags: tx flags
|
|
|
|
* @hdr_len: hdr_len to be returned
|
|
|
|
*
|
|
|
|
* This sets up large send offload for FCoE
|
|
|
|
*
|
|
|
|
* Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
|
|
|
|
*/
|
2011-05-27 13:31:47 +08:00
|
|
|
int ixgbe_fso(struct ixgbe_ring *tx_ring, struct sk_buff *skb,
|
2009-05-13 21:10:44 +08:00
|
|
|
u32 tx_flags, u8 *hdr_len)
|
|
|
|
{
|
2011-05-27 13:31:47 +08:00
|
|
|
struct fc_frame_header *fh;
|
2009-05-13 21:10:44 +08:00
|
|
|
u32 vlan_macip_lens;
|
2011-05-27 13:31:47 +08:00
|
|
|
u32 fcoe_sof_eof = 0;
|
2009-05-13 21:10:44 +08:00
|
|
|
u32 mss_l4len_idx;
|
2011-05-27 13:31:47 +08:00
|
|
|
u8 sof, eof;
|
2009-05-13 21:10:44 +08:00
|
|
|
|
|
|
|
if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
|
2011-05-27 13:31:47 +08:00
|
|
|
dev_err(tx_ring->dev, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
|
|
|
|
skb_shinfo(skb)->gso_type);
|
2009-05-13 21:10:44 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* resets the header to point fcoe/fc */
|
|
|
|
skb_set_network_header(skb, skb->mac_len);
|
|
|
|
skb_set_transport_header(skb, skb->mac_len +
|
|
|
|
sizeof(struct fcoe_hdr));
|
|
|
|
|
|
|
|
/* sets up SOF and ORIS */
|
|
|
|
sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
|
|
|
|
switch (sof) {
|
|
|
|
case FC_SOF_I2:
|
2011-05-27 13:31:47 +08:00
|
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_ORIS;
|
2009-05-13 21:10:44 +08:00
|
|
|
break;
|
|
|
|
case FC_SOF_I3:
|
2011-05-27 13:31:47 +08:00
|
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF |
|
|
|
|
IXGBE_ADVTXD_FCOEF_ORIS;
|
2009-05-13 21:10:44 +08:00
|
|
|
break;
|
|
|
|
case FC_SOF_N2:
|
|
|
|
break;
|
|
|
|
case FC_SOF_N3:
|
2011-05-27 13:31:47 +08:00
|
|
|
fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF;
|
2009-05-13 21:10:44 +08:00
|
|
|
break;
|
|
|
|
default:
|
2011-05-27 13:31:47 +08:00
|
|
|
dev_warn(tx_ring->dev, "unknown sof = 0x%x\n", sof);
|
2009-05-13 21:10:44 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* the first byte of the last dword is EOF */
|
|
|
|
skb_copy_bits(skb, skb->len - 4, &eof, 1);
|
|
|
|
/* sets up EOF and ORIE */
|
|
|
|
switch (eof) {
|
|
|
|
case FC_EOF_N:
|
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
|
|
|
|
break;
|
|
|
|
case FC_EOF_T:
|
|
|
|
/* lso needs ORIE */
|
2011-05-27 13:31:47 +08:00
|
|
|
if (skb_is_gso(skb))
|
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N |
|
|
|
|
IXGBE_ADVTXD_FCOEF_ORIE;
|
|
|
|
else
|
2009-05-13 21:10:44 +08:00
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
|
|
|
|
break;
|
|
|
|
case FC_EOF_NI:
|
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
|
|
|
|
break;
|
|
|
|
case FC_EOF_A:
|
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
|
|
|
|
break;
|
|
|
|
default:
|
2011-05-27 13:31:47 +08:00
|
|
|
dev_warn(tx_ring->dev, "unknown eof = 0x%x\n", eof);
|
2009-05-13 21:10:44 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* sets up PARINC indicating data offset */
|
|
|
|
fh = (struct fc_frame_header *)skb_transport_header(skb);
|
|
|
|
if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
|
|
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
|
|
|
|
|
2011-05-27 13:31:47 +08:00
|
|
|
/* include trailer in headlen as it is replicated per frame */
|
2009-05-13 21:10:44 +08:00
|
|
|
*hdr_len = sizeof(struct fcoe_crc_eof);
|
2011-05-27 13:31:47 +08:00
|
|
|
|
|
|
|
/* hdr_len includes fc_hdr if FCoE LSO is enabled */
|
2009-05-13 21:10:44 +08:00
|
|
|
if (skb_is_gso(skb))
|
|
|
|
*hdr_len += (skb_transport_offset(skb) +
|
|
|
|
sizeof(struct fc_frame_header));
|
2011-05-27 13:31:47 +08:00
|
|
|
|
2009-05-13 21:10:44 +08:00
|
|
|
/* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
|
2011-05-27 13:31:47 +08:00
|
|
|
mss_l4len_idx = skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
|
|
|
|
mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
|
|
|
|
|
|
|
|
/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
|
|
|
|
vlan_macip_lens = skb_transport_offset(skb) +
|
|
|
|
sizeof(struct fc_frame_header);
|
|
|
|
vlan_macip_lens |= (skb_transport_offset(skb) - 4)
|
|
|
|
<< IXGBE_ADVTXD_MACLEN_SHIFT;
|
|
|
|
vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
|
2009-05-13 21:10:44 +08:00
|
|
|
|
|
|
|
/* write context desc */
|
2011-05-27 13:31:47 +08:00
|
|
|
ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fcoe_sof_eof,
|
|
|
|
IXGBE_ADVTXT_TUCMD_FCOE, mss_l4len_idx);
|
2009-05-13 21:10:44 +08:00
|
|
|
|
|
|
|
return skb_is_gso(skb);
|
|
|
|
}
|
|
|
|
|
2011-05-11 13:41:46 +08:00
|
|
|
static void ixgbe_fcoe_ddp_pools_free(struct ixgbe_fcoe *fcoe)
|
|
|
|
{
|
|
|
|
unsigned int cpu;
|
|
|
|
struct pci_pool **pool;
|
|
|
|
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
|
|
pool = per_cpu_ptr(fcoe->pool, cpu);
|
|
|
|
if (*pool)
|
|
|
|
pci_pool_destroy(*pool);
|
|
|
|
}
|
|
|
|
free_percpu(fcoe->pool);
|
|
|
|
fcoe->pool = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ixgbe_fcoe_ddp_pools_alloc(struct ixgbe_adapter *adapter)
|
|
|
|
{
|
|
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
unsigned int cpu;
|
|
|
|
struct pci_pool **pool;
|
|
|
|
char pool_name[32];
|
|
|
|
|
|
|
|
fcoe->pool = alloc_percpu(struct pci_pool *);
|
|
|
|
if (!fcoe->pool)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* allocate pci pool for each cpu */
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
|
|
snprintf(pool_name, 32, "ixgbe_fcoe_ddp_%d", cpu);
|
|
|
|
pool = per_cpu_ptr(fcoe->pool, cpu);
|
|
|
|
*pool = pci_pool_create(pool_name,
|
|
|
|
adapter->pdev, IXGBE_FCPTR_MAX,
|
|
|
|
IXGBE_FCPTR_ALIGN, PAGE_SIZE);
|
|
|
|
if (!*pool) {
|
|
|
|
e_err(drv, "failed to alloc DDP pool on cpu:%d\n", cpu);
|
|
|
|
ixgbe_fcoe_ddp_pools_free(fcoe);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-05-13 21:10:21 +08:00
|
|
|
/**
|
|
|
|
* ixgbe_configure_fcoe - configures registers for fcoe at start
|
|
|
|
* @adapter: ptr to ixgbe adapter
|
|
|
|
*
|
|
|
|
* This sets up FCoE related registers
|
|
|
|
*
|
|
|
|
* Returns : none
|
|
|
|
*/
|
|
|
|
void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
|
|
|
|
{
|
2009-05-17 20:34:14 +08:00
|
|
|
int i, fcoe_q, fcoe_i;
|
2009-05-13 21:10:21 +08:00
|
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
2009-05-13 21:11:29 +08:00
|
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
2009-05-17 20:34:14 +08:00
|
|
|
struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
|
2009-05-13 21:11:29 +08:00
|
|
|
|
|
|
|
if (!fcoe->pool) {
|
|
|
|
spin_lock_init(&fcoe->lock);
|
2011-02-15 17:11:31 +08:00
|
|
|
|
2011-05-11 13:41:46 +08:00
|
|
|
ixgbe_fcoe_ddp_pools_alloc(adapter);
|
|
|
|
if (!fcoe->pool) {
|
|
|
|
e_err(drv, "failed to alloc percpu fcoe DDP pools\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-02-15 17:11:31 +08:00
|
|
|
/* Extra buffer to be shared by all DDPs for HW work around */
|
|
|
|
fcoe->extra_ddp_buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_ATOMIC);
|
|
|
|
if (fcoe->extra_ddp_buffer == NULL) {
|
|
|
|
e_err(drv, "failed to allocated extra DDP buffer\n");
|
2011-05-11 13:41:46 +08:00
|
|
|
goto out_ddp_pools;
|
2011-02-15 17:11:31 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
fcoe->extra_ddp_buffer_dma =
|
|
|
|
dma_map_single(&adapter->pdev->dev,
|
|
|
|
fcoe->extra_ddp_buffer,
|
|
|
|
IXGBE_FCBUFF_MIN,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (dma_mapping_error(&adapter->pdev->dev,
|
|
|
|
fcoe->extra_ddp_buffer_dma)) {
|
|
|
|
e_err(drv, "failed to map extra DDP buffer\n");
|
2011-05-11 13:41:46 +08:00
|
|
|
goto out_extra_ddp_buffer;
|
2011-02-15 17:11:31 +08:00
|
|
|
}
|
2009-05-13 21:11:29 +08:00
|
|
|
}
|
2009-05-17 20:34:14 +08:00
|
|
|
|
|
|
|
/* Enable L2 eth type filter for FCoE */
|
2009-05-13 21:10:21 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
|
|
|
|
(ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
|
2010-03-24 20:45:21 +08:00
|
|
|
/* Enable L2 eth type filter for FIP */
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),
|
|
|
|
(ETH_P_FIP | IXGBE_ETQF_FILTER_EN));
|
2009-05-17 20:34:14 +08:00
|
|
|
if (adapter->ring_feature[RING_F_FCOE].indices) {
|
|
|
|
/* Use multiple rx queues for FCoE by redirection table */
|
|
|
|
for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
|
|
|
|
fcoe_i = f->mask + i % f->indices;
|
|
|
|
fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
|
2010-02-03 22:19:12 +08:00
|
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
2009-05-17 20:34:14 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
|
|
|
|
}
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
|
|
|
|
} else {
|
|
|
|
/* Use single rx queue for FCoE */
|
|
|
|
fcoe_i = f->mask;
|
2010-02-03 22:19:12 +08:00
|
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
2009-05-17 20:34:14 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
|
|
|
|
IXGBE_ETQS_QUEUE_EN |
|
|
|
|
(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
|
|
|
|
}
|
2010-03-24 20:45:21 +08:00
|
|
|
/* send FIP frames to the first FCoE queue */
|
|
|
|
fcoe_i = f->mask;
|
|
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
|
|
|
|
IXGBE_ETQS_QUEUE_EN |
|
|
|
|
(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
|
2009-05-17 20:34:14 +08:00
|
|
|
|
2009-05-13 21:10:21 +08:00
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
|
|
|
|
IXGBE_FCRXCTRL_FCOELLI |
|
|
|
|
IXGBE_FCRXCTRL_FCCRCBO |
|
|
|
|
(FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
|
2011-02-15 17:11:31 +08:00
|
|
|
return;
|
|
|
|
|
2011-05-11 13:41:46 +08:00
|
|
|
out_extra_ddp_buffer:
|
2011-02-15 17:11:31 +08:00
|
|
|
kfree(fcoe->extra_ddp_buffer);
|
2011-05-11 13:41:46 +08:00
|
|
|
out_ddp_pools:
|
|
|
|
ixgbe_fcoe_ddp_pools_free(fcoe);
|
2009-05-13 21:10:21 +08:00
|
|
|
}
|
2009-05-13 21:11:29 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* ixgbe_cleanup_fcoe - release all fcoe ddp context resources
|
|
|
|
* @adapter : ixgbe adapter
|
|
|
|
*
|
|
|
|
* Cleans up outstanding ddp context resources
|
|
|
|
*
|
|
|
|
* Returns : none
|
|
|
|
*/
|
|
|
|
void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
|
2011-05-11 13:41:46 +08:00
|
|
|
if (!fcoe->pool)
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
|
|
|
|
ixgbe_fcoe_ddp_put(adapter->netdev, i);
|
|
|
|
dma_unmap_single(&adapter->pdev->dev,
|
|
|
|
fcoe->extra_ddp_buffer_dma,
|
|
|
|
IXGBE_FCBUFF_MIN,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
kfree(fcoe->extra_ddp_buffer);
|
|
|
|
ixgbe_fcoe_ddp_pools_free(fcoe);
|
2009-05-13 21:11:29 +08:00
|
|
|
}
|
2009-08-31 20:32:14 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_enable - turn on FCoE offload feature
|
|
|
|
* @netdev: the corresponding netdev
|
|
|
|
*
|
|
|
|
* Turns on FCoE offload feature in 82599.
|
|
|
|
*
|
|
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_enable(struct net_device *netdev)
|
|
|
|
{
|
|
|
|
int rc = -EINVAL;
|
|
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
2010-10-21 07:00:30 +08:00
|
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
2009-08-31 20:32:14 +08:00
|
|
|
|
|
|
|
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
|
|
goto out_enable;
|
|
|
|
|
2010-10-21 07:00:30 +08:00
|
|
|
atomic_inc(&fcoe->refcnt);
|
2009-08-31 20:32:14 +08:00
|
|
|
if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
|
|
|
|
goto out_enable;
|
|
|
|
|
2010-07-02 04:05:12 +08:00
|
|
|
e_info(drv, "Enabling FCoE offload features.\n");
|
2009-08-31 20:32:14 +08:00
|
|
|
if (netif_running(netdev))
|
|
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
|
|
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
|
|
|
|
|
|
adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
|
|
|
|
adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
|
|
|
|
netdev->features |= NETIF_F_FCOE_CRC;
|
|
|
|
netdev->features |= NETIF_F_FSO;
|
|
|
|
netdev->features |= NETIF_F_FCOE_MTU;
|
|
|
|
netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
|
|
|
|
|
|
|
|
ixgbe_init_interrupt_scheme(adapter);
|
2010-03-19 12:33:10 +08:00
|
|
|
netdev_features_change(netdev);
|
2009-08-31 20:32:14 +08:00
|
|
|
|
|
|
|
if (netif_running(netdev))
|
|
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
|
|
rc = 0;
|
|
|
|
|
|
|
|
out_enable:
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_disable - turn off FCoE offload feature
|
|
|
|
* @netdev: the corresponding netdev
|
|
|
|
*
|
|
|
|
* Turns off FCoE offload feature in 82599.
|
|
|
|
*
|
|
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_disable(struct net_device *netdev)
|
|
|
|
{
|
|
|
|
int rc = -EINVAL;
|
|
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
2010-10-21 07:00:30 +08:00
|
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
2009-08-31 20:32:14 +08:00
|
|
|
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
|
|
goto out_disable;
|
|
|
|
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
|
|
|
|
goto out_disable;
|
2010-10-21 07:00:30 +08:00
|
|
|
|
|
|
|
if (!atomic_dec_and_test(&fcoe->refcnt))
|
|
|
|
goto out_disable;
|
2009-08-31 20:32:14 +08:00
|
|
|
|
2010-07-02 04:05:12 +08:00
|
|
|
e_info(drv, "Disabling FCoE offload features.\n");
|
2010-07-19 21:59:52 +08:00
|
|
|
netdev->features &= ~NETIF_F_FCOE_CRC;
|
|
|
|
netdev->features &= ~NETIF_F_FSO;
|
|
|
|
netdev->features &= ~NETIF_F_FCOE_MTU;
|
|
|
|
netdev->fcoe_ddp_xid = 0;
|
|
|
|
netdev_features_change(netdev);
|
|
|
|
|
2009-08-31 20:32:14 +08:00
|
|
|
if (netif_running(netdev))
|
|
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
|
|
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
|
|
adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
|
|
|
|
adapter->ring_feature[RING_F_FCOE].indices = 0;
|
|
|
|
ixgbe_cleanup_fcoe(adapter);
|
|
|
|
ixgbe_init_interrupt_scheme(adapter);
|
2010-03-19 12:33:10 +08:00
|
|
|
|
2009-08-31 20:32:14 +08:00
|
|
|
if (netif_running(netdev))
|
|
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
|
|
rc = 0;
|
|
|
|
|
|
|
|
out_disable:
|
|
|
|
return rc;
|
|
|
|
}
|
2009-08-31 20:34:28 +08:00
|
|
|
|
2009-10-29 02:24:56 +08:00
|
|
|
/**
|
|
|
|
* ixgbe_fcoe_get_wwn - get world wide name for the node or the port
|
|
|
|
* @netdev : ixgbe adapter
|
|
|
|
* @wwn : the world wide name
|
|
|
|
* @type: the type of world wide name
|
|
|
|
*
|
|
|
|
* Returns the node or port world wide name if both the prefix and the san
|
|
|
|
* mac address are valid, then the wwn is formed based on the NAA-2 for
|
|
|
|
* IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
|
|
|
|
*
|
|
|
|
* Returns : 0 on success
|
|
|
|
*/
|
|
|
|
int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
|
|
|
|
{
|
|
|
|
int rc = -EINVAL;
|
|
|
|
u16 prefix = 0xffff;
|
|
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
struct ixgbe_mac_info *mac = &adapter->hw.mac;
|
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case NETDEV_FCOE_WWNN:
|
|
|
|
prefix = mac->wwnn_prefix;
|
|
|
|
break;
|
|
|
|
case NETDEV_FCOE_WWPN:
|
|
|
|
prefix = mac->wwpn_prefix;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((prefix != 0xffff) &&
|
|
|
|
is_valid_ether_addr(mac->san_addr)) {
|
|
|
|
*wwn = ((u64) prefix << 48) |
|
|
|
|
((u64) mac->san_addr[0] << 40) |
|
|
|
|
((u64) mac->san_addr[1] << 32) |
|
|
|
|
((u64) mac->san_addr[2] << 24) |
|
|
|
|
((u64) mac->san_addr[3] << 16) |
|
|
|
|
((u64) mac->san_addr[4] << 8) |
|
|
|
|
((u64) mac->san_addr[5]);
|
|
|
|
rc = 0;
|
|
|
|
}
|
|
|
|
return rc;
|
|
|
|
}
|