2019-05-29 22:17:59 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2015-06-11 16:41:48 +08:00
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/*
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* hdac-ext-controller.c - HD-audio extended controller functions.
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*
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* Copyright (C) 2014-2015 Intel Corp
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* Author: Jeeja KP <jeeja.kp@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <sound/hda_register.h>
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#include <sound/hdaudio_ext.h>
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/*
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* maximum HDAC capablities we should parse to avoid endless looping:
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* currently we have 4 extended caps, so this is future proof for now.
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* extend when this limit is seen meeting in real HW
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*/
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#define HDAC_MAX_CAPS 10
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/*
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* processing pipe helpers - these helpers are useful for dealing with HDA
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* new capability of processing pipelines
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*/
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/**
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* snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-06-11 16:41:48 +08:00
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* @enable: flag to turn on/off the capability
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*/
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2018-06-02 11:53:50 +08:00
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void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable)
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2015-06-11 16:41:48 +08:00
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{
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2016-08-04 18:16:01 +08:00
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if (!bus->ppcap) {
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2015-06-11 16:41:48 +08:00
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dev_err(bus->dev, "Address of PP capability is NULL");
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return;
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}
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if (enable)
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
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AZX_PPCTL_GPROCEN, AZX_PPCTL_GPROCEN);
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2015-06-11 16:41:48 +08:00
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else
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
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AZX_PPCTL_GPROCEN, 0);
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2015-06-11 16:41:48 +08:00
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
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/**
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* snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-06-11 16:41:48 +08:00
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* @enable: flag to enable/disable interrupt
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*/
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2018-06-02 11:53:50 +08:00
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void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *bus, bool enable)
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2015-06-11 16:41:48 +08:00
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{
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2016-08-04 18:16:01 +08:00
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if (!bus->ppcap) {
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2015-06-11 16:41:48 +08:00
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dev_err(bus->dev, "Address of PP capability is NULL\n");
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return;
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}
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if (enable)
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
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AZX_PPCTL_PIE, AZX_PPCTL_PIE);
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2015-06-11 16:41:48 +08:00
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else
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
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AZX_PPCTL_PIE, 0);
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2015-06-11 16:41:48 +08:00
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
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/*
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* Multilink helpers - these helpers are useful for dealing with HDA
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* new multilink capability
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*/
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/**
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* snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-06-11 16:41:48 +08:00
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*
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* This will parse all links and read the mlink capabilities and add them
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* in hlink_list of extended hdac bus
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* Note: this will be freed on bus exit by driver
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*/
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2018-06-02 11:53:50 +08:00
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int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
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2015-06-11 16:41:48 +08:00
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{
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int idx;
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u32 link_count;
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struct hdac_ext_link *hlink;
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2016-08-04 18:16:01 +08:00
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link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
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2015-06-11 16:41:48 +08:00
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dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
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for (idx = 0; idx < link_count; idx++) {
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hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
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if (!hlink)
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return -ENOMEM;
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hlink->index = idx;
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hlink->bus = bus;
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2016-08-04 18:16:01 +08:00
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hlink->ml_addr = bus->mlcap + AZX_ML_BASE +
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2015-06-11 16:41:48 +08:00
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(AZX_ML_INTERVAL * idx);
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2015-08-22 00:06:17 +08:00
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hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
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hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
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2015-06-11 16:41:48 +08:00
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2016-05-12 11:28:53 +08:00
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/* since link in On, update the ref */
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hlink->ref_count = 1;
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2018-06-02 11:53:50 +08:00
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list_add_tail(&hlink->list, &bus->hlink_list);
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2015-06-11 16:41:48 +08:00
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
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2015-06-17 13:50:17 +08:00
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/**
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* snd_hdac_link_free_all- free hdac extended link objects
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*
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-06-17 13:50:17 +08:00
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*/
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2018-06-02 11:53:50 +08:00
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void snd_hdac_link_free_all(struct hdac_bus *bus)
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2015-06-17 13:50:17 +08:00
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{
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struct hdac_ext_link *l;
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2018-06-02 11:53:50 +08:00
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while (!list_empty(&bus->hlink_list)) {
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l = list_first_entry(&bus->hlink_list, struct hdac_ext_link, list);
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2015-06-17 13:50:17 +08:00
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list_del(&l->list);
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kfree(l);
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}
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}
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EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
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2015-06-11 16:41:48 +08:00
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/**
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* snd_hdac_ext_bus_get_link_index - get link based on codec name
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-06-11 16:41:48 +08:00
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* @codec_name: codec name
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*/
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2018-06-02 11:53:50 +08:00
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struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_bus *bus,
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2015-06-11 16:41:48 +08:00
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const char *codec_name)
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{
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int i;
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struct hdac_ext_link *hlink = NULL;
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int bus_idx, addr;
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if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
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return NULL;
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2018-06-02 11:53:50 +08:00
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if (bus->idx != bus_idx)
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2015-06-11 16:41:48 +08:00
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return NULL;
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2018-06-02 11:53:50 +08:00
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list_for_each_entry(hlink, &bus->hlink_list, list) {
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2015-06-11 16:41:48 +08:00
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for (i = 0; i < HDA_MAX_CODECS; i++) {
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if (hlink->lsdiid & (0x1 << addr))
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return hlink;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
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static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
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{
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int timeout;
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u32 val;
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2017-04-06 19:18:20 +08:00
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int mask = (1 << AZX_MLCTL_CPA_SHIFT);
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2015-06-11 16:41:48 +08:00
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udelay(3);
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2015-12-18 17:42:01 +08:00
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timeout = 150;
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2015-06-11 16:41:48 +08:00
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do {
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2015-08-22 00:06:17 +08:00
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val = readl(link->ml_addr + AZX_REG_ML_LCTL);
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2015-06-11 16:41:48 +08:00
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if (enable) {
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2017-04-06 19:18:20 +08:00
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if (((val & mask) >> AZX_MLCTL_CPA_SHIFT))
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2015-06-11 16:41:48 +08:00
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return 0;
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} else {
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2017-04-06 19:18:20 +08:00
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if (!((val & mask) >> AZX_MLCTL_CPA_SHIFT))
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2015-06-11 16:41:48 +08:00
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return 0;
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}
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udelay(3);
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} while (--timeout);
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return -EIO;
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}
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/**
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* snd_hdac_ext_bus_link_power_up -power up hda link
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* @link: HD-audio extended link
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*/
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int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
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{
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL,
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AZX_MLCTL_SPA, AZX_MLCTL_SPA);
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2015-06-11 16:41:48 +08:00
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return check_hdac_link_power_active(link, true);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
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/**
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* snd_hdac_ext_bus_link_power_down -power down hda link
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* @link: HD-audio extended link
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*/
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int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
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{
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2015-08-22 00:06:17 +08:00
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snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
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2015-06-11 16:41:48 +08:00
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return check_hdac_link_power_active(link, false);
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
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2015-08-22 00:06:18 +08:00
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2015-12-18 17:42:02 +08:00
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/**
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* snd_hdac_ext_bus_link_power_up_all -power up all hda link
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-12-18 17:42:02 +08:00
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*/
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2018-06-02 11:53:50 +08:00
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int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus)
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2015-12-18 17:42:02 +08:00
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{
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struct hdac_ext_link *hlink = NULL;
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int ret;
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2018-06-02 11:53:50 +08:00
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list_for_each_entry(hlink, &bus->hlink_list, list) {
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
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AZX_MLCTL_SPA, AZX_MLCTL_SPA);
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2015-12-18 17:42:02 +08:00
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ret = check_hdac_link_power_active(hlink, true);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
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2015-08-22 00:06:18 +08:00
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/**
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* snd_hdac_ext_bus_link_power_down_all -power down all hda link
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2020-01-14 04:56:38 +08:00
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* @bus: the pointer to HDAC bus object
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2015-08-22 00:06:18 +08:00
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*/
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2018-06-02 11:53:50 +08:00
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int snd_hdac_ext_bus_link_power_down_all(struct hdac_bus *bus)
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2015-08-22 00:06:18 +08:00
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{
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struct hdac_ext_link *hlink = NULL;
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int ret;
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2018-06-02 11:53:50 +08:00
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list_for_each_entry(hlink, &bus->hlink_list, list) {
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2018-09-28 17:38:59 +08:00
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snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
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AZX_MLCTL_SPA, 0);
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2015-08-22 00:06:18 +08:00
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ret = check_hdac_link_power_active(hlink, false);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
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2016-05-12 11:28:53 +08:00
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2018-06-02 11:53:50 +08:00
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int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
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2016-05-12 11:28:53 +08:00
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struct hdac_ext_link *link)
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{
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2020-02-07 04:02:21 +08:00
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unsigned long codec_mask;
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2016-05-12 11:28:53 +08:00
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int ret = 0;
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2018-06-02 11:53:50 +08:00
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mutex_lock(&bus->lock);
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2016-05-12 11:28:53 +08:00
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/*
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* if we move from 0 to 1, count will be 1 so power up this link
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* as well, also check the dma status and trigger that
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*/
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if (++link->ref_count == 1) {
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2018-06-02 11:53:50 +08:00
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if (!bus->cmd_dma_state) {
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snd_hdac_bus_init_cmd_io(bus);
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bus->cmd_dma_state = true;
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2016-05-12 11:28:53 +08:00
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}
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ret = snd_hdac_ext_bus_link_power_up(link);
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2018-06-02 11:54:00 +08:00
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2019-09-30 22:29:45 +08:00
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/*
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* clear the register to invalidate all the output streams
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*/
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snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV,
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ML_LOSIDV_STREAM_MASK, 0);
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2018-06-02 11:54:00 +08:00
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/*
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* wait for 521usec for codec to report status
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* HDA spec section 4.3 - Codec Discovery
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*/
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udelay(521);
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2020-02-07 04:02:21 +08:00
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codec_mask = snd_hdac_chip_readw(bus, STATESTS);
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dev_dbg(bus->dev, "codec_mask = 0x%lx\n", codec_mask);
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snd_hdac_chip_writew(bus, STATESTS, codec_mask);
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if (!bus->codec_mask)
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bus->codec_mask = codec_mask;
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2016-05-12 11:28:53 +08:00
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}
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2018-06-02 11:53:50 +08:00
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mutex_unlock(&bus->lock);
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2016-05-12 11:28:53 +08:00
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return ret;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_get);
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2018-06-02 11:53:50 +08:00
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int snd_hdac_ext_bus_link_put(struct hdac_bus *bus,
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2016-05-12 11:28:53 +08:00
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struct hdac_ext_link *link)
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{
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int ret = 0;
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struct hdac_ext_link *hlink;
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bool link_up = false;
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2018-06-02 11:53:50 +08:00
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mutex_lock(&bus->lock);
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2016-05-12 11:28:53 +08:00
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/*
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* if we move from 1 to 0, count will be 0
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* so power down this link as well
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*/
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if (--link->ref_count == 0) {
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ret = snd_hdac_ext_bus_link_power_down(link);
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/*
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* now check if all links are off, if so turn off
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* cmd dma as well
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*/
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2018-06-02 11:53:50 +08:00
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list_for_each_entry(hlink, &bus->hlink_list, list) {
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2016-05-12 11:28:53 +08:00
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if (hlink->ref_count) {
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link_up = true;
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break;
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}
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}
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if (!link_up) {
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2018-06-02 11:53:50 +08:00
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snd_hdac_bus_stop_cmd_io(bus);
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bus->cmd_dma_state = false;
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2016-05-12 11:28:53 +08:00
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}
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}
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2018-06-02 11:53:50 +08:00
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mutex_unlock(&bus->lock);
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2016-05-12 11:28:53 +08:00
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return ret;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_put);
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