2005-09-26 14:04:21 +08:00
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|
|
/*
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|
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|
* This file contains ioremap and related functions for 64-bit machines.
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*
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* Derived from arch/ppc64/mm/init.c
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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|
*/
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|
|
#include <linux/signal.h>
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|
|
|
|
#include <linux/sched.h>
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|
|
#include <linux/kernel.h>
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|
#include <linux/errno.h>
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|
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|
#include <linux/string.h>
|
2011-05-27 22:46:24 +08:00
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|
|
#include <linux/export.h>
|
2005-09-26 14:04:21 +08:00
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|
|
#include <linux/types.h>
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|
|
#include <linux/mman.h>
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|
|
|
|
#include <linux/mm.h>
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|
|
|
#include <linux/swap.h>
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|
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|
#include <linux/stddef.h>
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|
|
|
|
#include <linux/vmalloc.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
|
|
|
#include <linux/slab.h>
|
2014-11-06 00:27:39 +08:00
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|
|
#include <linux/hugetlb.h>
|
2005-09-26 14:04:21 +08:00
|
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|
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|
|
#include <asm/pgalloc.h>
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|
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|
#include <asm/page.h>
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|
|
|
|
#include <asm/prom.h>
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|
|
|
|
#include <asm/io.h>
|
|
|
|
|
#include <asm/mmu_context.h>
|
|
|
|
|
#include <asm/pgtable.h>
|
|
|
|
|
#include <asm/mmu.h>
|
|
|
|
|
#include <asm/smp.h>
|
|
|
|
|
#include <asm/machdep.h>
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|
|
|
|
#include <asm/tlb.h>
|
|
|
|
|
#include <asm/processor.h>
|
|
|
|
|
#include <asm/cputable.h>
|
|
|
|
|
#include <asm/sections.h>
|
2006-09-25 11:36:31 +08:00
|
|
|
#include <asm/firmware.h>
|
2014-09-17 20:15:35 +08:00
|
|
|
#include <asm/dma.h>
|
2005-11-16 12:43:48 +08:00
|
|
|
|
|
|
|
|
#include "mmu_decl.h"
|
2005-09-26 14:04:21 +08:00
|
|
|
|
|
|
|
|
|
2016-04-29 21:25:43 +08:00
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
|
|
/*
|
|
|
|
|
* partition table and process table for ISA 3.0
|
|
|
|
|
*/
|
|
|
|
|
struct prtb_entry *process_tb;
|
|
|
|
|
struct patb_entry *partition_tb;
|
2016-04-29 21:25:49 +08:00
|
|
|
/*
|
|
|
|
|
* page table size
|
|
|
|
|
*/
|
|
|
|
|
unsigned long __pte_index_size;
|
|
|
|
|
EXPORT_SYMBOL(__pte_index_size);
|
|
|
|
|
unsigned long __pmd_index_size;
|
|
|
|
|
EXPORT_SYMBOL(__pmd_index_size);
|
|
|
|
|
unsigned long __pud_index_size;
|
|
|
|
|
EXPORT_SYMBOL(__pud_index_size);
|
|
|
|
|
unsigned long __pgd_index_size;
|
|
|
|
|
EXPORT_SYMBOL(__pgd_index_size);
|
2018-02-11 23:00:06 +08:00
|
|
|
unsigned long __pud_cache_index;
|
|
|
|
|
EXPORT_SYMBOL(__pud_cache_index);
|
2016-04-29 21:25:49 +08:00
|
|
|
unsigned long __pte_table_size;
|
|
|
|
|
EXPORT_SYMBOL(__pte_table_size);
|
|
|
|
|
unsigned long __pmd_table_size;
|
|
|
|
|
EXPORT_SYMBOL(__pmd_table_size);
|
|
|
|
|
unsigned long __pud_table_size;
|
|
|
|
|
EXPORT_SYMBOL(__pud_table_size);
|
|
|
|
|
unsigned long __pgd_table_size;
|
|
|
|
|
EXPORT_SYMBOL(__pgd_table_size);
|
2016-04-29 21:26:19 +08:00
|
|
|
unsigned long __pmd_val_bits;
|
|
|
|
|
EXPORT_SYMBOL(__pmd_val_bits);
|
|
|
|
|
unsigned long __pud_val_bits;
|
|
|
|
|
EXPORT_SYMBOL(__pud_val_bits);
|
|
|
|
|
unsigned long __pgd_val_bits;
|
|
|
|
|
EXPORT_SYMBOL(__pgd_val_bits);
|
2016-04-29 21:26:21 +08:00
|
|
|
unsigned long __kernel_virt_start;
|
|
|
|
|
EXPORT_SYMBOL(__kernel_virt_start);
|
|
|
|
|
unsigned long __kernel_virt_size;
|
|
|
|
|
EXPORT_SYMBOL(__kernel_virt_size);
|
|
|
|
|
unsigned long __vmalloc_start;
|
|
|
|
|
EXPORT_SYMBOL(__vmalloc_start);
|
|
|
|
|
unsigned long __vmalloc_end;
|
|
|
|
|
EXPORT_SYMBOL(__vmalloc_end);
|
2017-08-01 18:29:22 +08:00
|
|
|
unsigned long __kernel_io_start;
|
|
|
|
|
EXPORT_SYMBOL(__kernel_io_start);
|
2016-04-29 21:26:21 +08:00
|
|
|
struct page *vmemmap;
|
|
|
|
|
EXPORT_SYMBOL(vmemmap);
|
2016-04-29 21:26:23 +08:00
|
|
|
unsigned long __pte_frag_nr;
|
|
|
|
|
EXPORT_SYMBOL(__pte_frag_nr);
|
|
|
|
|
unsigned long __pte_frag_size_shift;
|
|
|
|
|
EXPORT_SYMBOL(__pte_frag_size_shift);
|
2016-04-29 21:26:21 +08:00
|
|
|
unsigned long ioremap_bot;
|
|
|
|
|
#else /* !CONFIG_PPC_BOOK3S_64 */
|
2012-09-10 10:52:57 +08:00
|
|
|
unsigned long ioremap_bot = IOREMAP_BASE;
|
2016-04-29 21:26:21 +08:00
|
|
|
#endif
|
2009-07-24 07:15:16 +08:00
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
/**
|
|
|
|
|
* __ioremap_at - Low level function to establish the page tables
|
|
|
|
|
* for an IO mapping
|
|
|
|
|
*/
|
2018-10-09 21:51:45 +08:00
|
|
|
void __iomem *__ioremap_at(phys_addr_t pa, void *ea, unsigned long size, pgprot_t prot)
|
2005-09-26 14:04:21 +08:00
|
|
|
{
|
|
|
|
|
unsigned long i;
|
|
|
|
|
|
2008-07-24 12:27:08 +08:00
|
|
|
/* We don't support the 4K PFN hack with ioremap */
|
2018-10-09 21:51:45 +08:00
|
|
|
if (pgprot_val(prot) & H_PAGE_4K_PFN)
|
2008-07-24 12:27:08 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
WARN_ON(pa & ~PAGE_MASK);
|
|
|
|
|
WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
|
|
|
|
|
WARN_ON(size & ~PAGE_MASK);
|
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
for (i = 0; i < size; i += PAGE_SIZE)
|
2018-10-09 21:51:45 +08:00
|
|
|
if (map_kernel_page((unsigned long)ea + i, pa + i, prot))
|
2005-09-26 14:04:21 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
return (void __iomem *)ea;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* __iounmap_from - Low level function to tear down the page tables
|
|
|
|
|
* for an IO mapping. This is used for mappings that
|
|
|
|
|
* are manipulated manually, like partial unmapping of
|
|
|
|
|
* PCI IOs or ISA space.
|
|
|
|
|
*/
|
|
|
|
|
void __iounmap_at(void *ea, unsigned long size)
|
|
|
|
|
{
|
|
|
|
|
WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
|
|
|
|
|
WARN_ON(size & ~PAGE_MASK);
|
|
|
|
|
|
|
|
|
|
unmap_kernel_range((unsigned long)ea, size);
|
2005-09-26 14:04:21 +08:00
|
|
|
}
|
|
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
|
2018-10-09 21:51:45 +08:00
|
|
|
pgprot_t prot, void *caller)
|
2005-09-26 14:04:21 +08:00
|
|
|
{
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
phys_addr_t paligned;
|
2005-09-26 14:04:21 +08:00
|
|
|
void __iomem *ret;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Choose an address to map it to.
|
|
|
|
|
* Once the imalloc system is running, we use it.
|
|
|
|
|
* Before that, we map using addresses going
|
|
|
|
|
* up from ioremap_bot. imalloc will use
|
|
|
|
|
* the addresses from ioremap_bot through
|
|
|
|
|
* IMALLOC_END
|
|
|
|
|
*
|
|
|
|
|
*/
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
paligned = addr & PAGE_MASK;
|
|
|
|
|
size = PAGE_ALIGN(addr + size) - paligned;
|
2005-09-26 14:04:21 +08:00
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
if ((size == 0) || (paligned == 0))
|
2005-09-26 14:04:21 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
2015-03-30 11:10:37 +08:00
|
|
|
if (slab_is_available()) {
|
2005-09-26 14:04:21 +08:00
|
|
|
struct vm_struct *area;
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
area = __get_vm_area_caller(size, VM_IOREMAP,
|
|
|
|
|
ioremap_bot, IOREMAP_END,
|
|
|
|
|
caller);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (area == NULL)
|
|
|
|
|
return NULL;
|
2010-11-29 02:26:36 +08:00
|
|
|
|
|
|
|
|
area->phys_addr = paligned;
|
2018-10-09 21:51:45 +08:00
|
|
|
ret = __ioremap_at(paligned, area->addr, size, prot);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (!ret)
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
vunmap(area->addr);
|
2005-09-26 14:04:21 +08:00
|
|
|
} else {
|
2018-10-09 21:51:45 +08:00
|
|
|
ret = __ioremap_at(paligned, (void *)ioremap_bot, size, prot);
|
2005-09-26 14:04:21 +08:00
|
|
|
if (ret)
|
|
|
|
|
ioremap_bot += size;
|
|
|
|
|
}
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
|
|
|
|
|
if (ret)
|
|
|
|
|
ret += addr & ~PAGE_MASK;
|
2005-09-26 14:04:21 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2009-02-23 00:19:14 +08:00
|
|
|
void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
|
|
|
|
|
unsigned long flags)
|
|
|
|
|
{
|
2018-10-09 21:51:45 +08:00
|
|
|
return __ioremap_caller(addr, size, __pgprot(flags), __builtin_return_address(0));
|
2009-02-23 00:19:14 +08:00
|
|
|
}
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
|
2006-11-13 06:27:39 +08:00
|
|
|
void __iomem * ioremap(phys_addr_t addr, unsigned long size)
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
{
|
2018-10-09 21:51:45 +08:00
|
|
|
pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
|
2009-02-23 00:19:14 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
|
|
|
|
|
if (ppc_md.ioremap)
|
2018-10-09 21:51:45 +08:00
|
|
|
return ppc_md.ioremap(addr, size, prot, caller);
|
|
|
|
|
return __ioremap_caller(addr, size, prot, caller);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
}
|
|
|
|
|
|
2011-05-09 05:41:59 +08:00
|
|
|
void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
|
|
|
|
|
{
|
2018-10-09 21:51:45 +08:00
|
|
|
pgprot_t prot = pgprot_noncached_wc(PAGE_KERNEL);
|
2011-05-09 05:41:59 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
|
|
|
|
|
|
|
|
|
if (ppc_md.ioremap)
|
2018-10-09 21:51:45 +08:00
|
|
|
return ppc_md.ioremap(addr, size, prot, caller);
|
|
|
|
|
return __ioremap_caller(addr, size, prot, caller);
|
2011-05-09 05:41:59 +08:00
|
|
|
}
|
|
|
|
|
|
2018-10-09 21:51:33 +08:00
|
|
|
void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)
|
|
|
|
|
{
|
2018-10-09 21:51:45 +08:00
|
|
|
pgprot_t prot = pgprot_cached(PAGE_KERNEL);
|
2018-10-09 21:51:33 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
|
|
|
|
|
|
|
|
|
if (ppc_md.ioremap)
|
2018-10-09 21:51:45 +08:00
|
|
|
return ppc_md.ioremap(addr, size, prot, caller);
|
|
|
|
|
return __ioremap_caller(addr, size, prot, caller);
|
2018-10-09 21:51:33 +08:00
|
|
|
}
|
|
|
|
|
|
2011-05-09 05:43:47 +08:00
|
|
|
void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
unsigned long flags)
|
|
|
|
|
{
|
2018-10-09 21:51:56 +08:00
|
|
|
pte_t pte = __pte(flags);
|
2009-02-23 00:19:14 +08:00
|
|
|
void *caller = __builtin_return_address(0);
|
|
|
|
|
|
2008-07-24 12:27:08 +08:00
|
|
|
/* writeable implies dirty for kernel addresses */
|
2018-10-09 21:51:56 +08:00
|
|
|
if (pte_write(pte))
|
|
|
|
|
pte = pte_mkdirty(pte);
|
2008-07-24 12:27:08 +08:00
|
|
|
|
2016-04-29 21:25:34 +08:00
|
|
|
/* we don't want to let _PAGE_EXEC leak out */
|
2018-10-09 21:51:56 +08:00
|
|
|
pte = pte_exprotect(pte);
|
2016-04-29 21:25:34 +08:00
|
|
|
/*
|
|
|
|
|
* Force kernel mapping.
|
|
|
|
|
*/
|
2018-10-09 21:51:56 +08:00
|
|
|
pte = pte_mkprivileged(pte);
|
2010-04-07 12:39:36 +08:00
|
|
|
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
if (ppc_md.ioremap)
|
2018-10-09 21:51:56 +08:00
|
|
|
return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
|
|
|
|
|
return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
/*
|
|
|
|
|
* Unmap an IO region and remove it from imalloc'd list.
|
|
|
|
|
* Access to IO memory should be serialized by driver.
|
|
|
|
|
*/
|
2006-11-13 06:27:39 +08:00
|
|
|
void __iounmap(volatile void __iomem *token)
|
2005-09-26 14:04:21 +08:00
|
|
|
{
|
|
|
|
|
void *addr;
|
|
|
|
|
|
2015-03-30 11:10:37 +08:00
|
|
|
if (!slab_is_available())
|
2005-09-26 14:04:21 +08:00
|
|
|
return;
|
|
|
|
|
|
[POWERPC] Rewrite IO allocation & mapping on powerpc64
This rewrites pretty much from scratch the handling of MMIO and PIO
space allocations on powerpc64. The main goals are:
- Get rid of imalloc and use more common code where possible
- Simplify the current mess so that PIO space is allocated and
mapped in a single place for PCI bridges
- Handle allocation constraints of PIO for all bridges including
hot plugged ones within the 2GB space reserved for IO ports,
so that devices on hotplugged busses will now work with drivers
that assume IO ports fit in an int.
- Cleanup and separate tracking of the ISA space in the reserved
low 64K of IO space. No ISA -> Nothing mapped there.
I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
far, that's it :-)
With this patch, all allocations are done using the code in
mm/vmalloc.c, though we use the low level __get_vm_area with
explicit start/stop constraints in order to manage separate
areas for vmalloc/vmap, ioremap, and PCI IOs.
This greatly simplifies a lot of things, as you can see in the
diffstat of that patch :-)
A new pair of functions pcibios_map/unmap_io_space() now replace
all of the previous code that used to manipulate PCI IOs space.
The allocation is done at mapping time, which is now called from
scan_phb's, just before the devices are probed (instead of after,
which is by itself a bug fix). The only other caller is the PCI
hotplug code for hot adding PCI-PCI bridges (slots).
imalloc is gone, as is the "sub-allocation" thing, but I do beleive
that hotplug should still work in the sense that the space allocation
is always done by the PHB, but if you unmap a child bus of this PHB
(which seems to be possible), then the code should properly tear
down all the HPTE mappings for that area of the PHB allocated IO space.
I now always reserve the first 64K of IO space for the bridge with
the ISA bus on it. I have moved the code for tracking ISA in a separate
file which should also make it smarter if we ever are capable of
hot unplugging or re-plugging an ISA bridge.
This should have a side effect on platforms like powermac where VGA IOs
will no longer work. This is done on purpose though as they would have
worked semi-randomly before. The idea at this point is to isolate drivers
that might need to access those and fix them by providing a proper
function to obtain an offset to the legacy IOs of a given bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-04 13:15:36 +08:00
|
|
|
addr = (void *) ((unsigned long __force)
|
|
|
|
|
PCI_FIX_ADDR(token) & PAGE_MASK);
|
|
|
|
|
if ((unsigned long)addr < ioremap_bot) {
|
|
|
|
|
printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
|
|
|
|
|
" at 0x%p\n", addr);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
vunmap(addr);
|
2005-09-26 14:04:21 +08:00
|
|
|
}
|
|
|
|
|
|
2006-11-13 06:27:39 +08:00
|
|
|
void iounmap(volatile void __iomem *token)
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
{
|
|
|
|
|
if (ppc_md.iounmap)
|
|
|
|
|
ppc_md.iounmap(token);
|
|
|
|
|
else
|
|
|
|
|
__iounmap(token);
|
|
|
|
|
}
|
|
|
|
|
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(ioremap);
|
2011-05-09 05:41:59 +08:00
|
|
|
EXPORT_SYMBOL(ioremap_wc);
|
2011-05-09 05:43:47 +08:00
|
|
|
EXPORT_SYMBOL(ioremap_prot);
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(__ioremap);
|
2007-08-31 11:58:51 +08:00
|
|
|
EXPORT_SYMBOL(__ioremap_at);
|
2005-09-26 14:04:21 +08:00
|
|
|
EXPORT_SYMBOL(iounmap);
|
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
and PIO) and provides a generic way for other platforms to do so (we
have need to do that for various other platforms).
While reworking the IO ops, I ended up doing some spring cleaning in
io.h and eeh.h which I might want to split into 2 or 3 patches (among
others, eeh.h had a lot of useless stuff in it).
A side effect is that EEH for PIO should work now (it used to pass IO
ports down to the eeh address check functions which is bogus).
Also, new are MMIO "repeat" ops, which other archs like ARM already had,
and that we have too now: readsb, readsw, readsl, writesb, writesw,
writesl.
In the long run, I might also make EEH use the hooks instead
of wrapping at the toplevel, which would make things even cleaner and
relegate EEH completely in platforms/iseries, but we have to measure the
performance impact there (though it's really only on MMIO reads)
Since I also need to hook on ioremap, I shuffled the functions a bit
there. I introduced ioremap_flags() to use by drivers who want to pass
explicit flags to ioremap (and it can be hooked). The old __ioremap() is
still there as a low level and cannot be hooked, thus drivers who use it
should migrate unless they know they want the low level version.
The patch "arch provides generic iomap missing accessors" (should be
number 4 in this series) is a pre-requisite to provide full iomap
API support with this patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-11 14:25:10 +08:00
|
|
|
EXPORT_SYMBOL(__iounmap);
|
2007-08-31 11:58:51 +08:00
|
|
|
EXPORT_SYMBOL(__iounmap_at);
|
2013-04-28 17:37:33 +08:00
|
|
|
|
2014-11-06 00:27:39 +08:00
|
|
|
#ifndef __PAGETABLE_PUD_FOLDED
|
|
|
|
|
/* 4 level page table */
|
|
|
|
|
struct page *pgd_page(pgd_t pgd)
|
|
|
|
|
{
|
|
|
|
|
if (pgd_huge(pgd))
|
|
|
|
|
return pte_page(pgd_pte(pgd));
|
|
|
|
|
return virt_to_page(pgd_page_vaddr(pgd));
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
struct page *pud_page(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
if (pud_huge(pud))
|
|
|
|
|
return pte_page(pud_pte(pud));
|
|
|
|
|
return virt_to_page(pud_page_vaddr(pud));
|
|
|
|
|
}
|
|
|
|
|
|
2013-06-20 17:00:15 +08:00
|
|
|
/*
|
|
|
|
|
* For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
|
|
|
|
|
* For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
|
|
|
|
|
*/
|
|
|
|
|
struct page *pmd_page(pmd_t pmd)
|
|
|
|
|
{
|
2018-09-21 02:09:44 +08:00
|
|
|
if (pmd_large(pmd) || pmd_huge(pmd) || pmd_devmap(pmd))
|
2015-12-01 11:36:53 +08:00
|
|
|
return pte_page(pmd_pte(pmd));
|
2013-06-20 17:00:15 +08:00
|
|
|
return virt_to_page(pmd_page_vaddr(pmd));
|
|
|
|
|
}
|
|
|
|
|
|
2017-06-29 01:04:08 +08:00
|
|
|
#ifdef CONFIG_STRICT_KERNEL_RWX
|
|
|
|
|
void mark_rodata_ro(void)
|
|
|
|
|
{
|
|
|
|
|
if (!mmu_has_feature(MMU_FTR_KERNEL_RO)) {
|
|
|
|
|
pr_warn("Warning: Unable to mark rodata read only on this CPU.\n");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2017-06-29 01:04:09 +08:00
|
|
|
if (radix_enabled())
|
|
|
|
|
radix__mark_rodata_ro();
|
|
|
|
|
else
|
2017-06-29 01:04:08 +08:00
|
|
|
hash__mark_rodata_ro();
|
|
|
|
|
}
|
2017-07-14 14:51:23 +08:00
|
|
|
|
|
|
|
|
void mark_initmem_nx(void)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
radix__mark_initmem_nx();
|
|
|
|
|
else
|
|
|
|
|
hash__mark_initmem_nx();
|
|
|
|
|
}
|
2017-06-29 01:04:08 +08:00
|
|
|
#endif
|