2018-09-05 14:25:07 +08:00
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/console.h>
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#include <linux/memblock.h>
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#include <linux/initrd.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/start_kernel.h>
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#include <linux/dma-contiguous.h>
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#include <linux/screen_info.h>
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#include <asm/sections.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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#ifdef CONFIG_DUMMY_CONSOLE
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struct screen_info screen_info = {
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.orig_video_lines = 30,
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.orig_video_cols = 80,
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.orig_video_mode = 0,
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.orig_video_ega_bx = 0,
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.orig_video_isVGA = 1,
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.orig_video_points = 8
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};
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#endif
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static void __init csky_memblock_init(void)
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{
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unsigned long zone_size[MAX_NR_ZONES];
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signed long size;
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memblock_reserve(__pa(_stext), _end - _stext);
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early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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memblock_dump_all();
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memset(zone_size, 0, sizeof(zone_size));
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min_low_pfn = PFN_UP(memblock_start_of_DRAM());
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2020-03-28 19:14:37 +08:00
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max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());
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2018-09-05 14:25:07 +08:00
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size = max_pfn - min_low_pfn;
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2020-03-28 19:14:37 +08:00
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if (size <= PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET))
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zone_size[ZONE_NORMAL] = size;
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else if (size < PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) {
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zone_size[ZONE_NORMAL] =
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PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
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max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
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2018-09-05 14:25:07 +08:00
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} else {
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2020-03-28 19:14:37 +08:00
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zone_size[ZONE_NORMAL] =
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2018-09-05 14:25:07 +08:00
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PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
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2020-03-28 19:14:37 +08:00
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max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
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write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
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2018-09-05 14:25:07 +08:00
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}
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#ifdef CONFIG_HIGHMEM
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2020-03-28 19:14:37 +08:00
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zone_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn;
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2018-09-05 14:25:07 +08:00
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2020-03-28 19:14:37 +08:00
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highstart_pfn = max_low_pfn;
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highend_pfn = max_pfn;
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2018-09-05 14:25:07 +08:00
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#endif
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memblock_set_current_limit(PFN_PHYS(max_low_pfn));
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dma_contiguous_reserve(0);
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2020-03-28 19:14:37 +08:00
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free_area_init_node(0, zone_size, min_low_pfn, NULL);
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2018-09-05 14:25:07 +08:00
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}
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void __init setup_arch(char **cmdline_p)
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{
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*cmdline_p = boot_command_line;
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console_verbose();
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pr_info("Phys. mem: %ldMB\n",
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(unsigned long) memblock_phys_mem_size()/1024/1024);
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init_mm.start_code = (unsigned long) _stext;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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parse_early_param();
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csky_memblock_init();
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unflatten_and_copy_device_tree();
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#ifdef CONFIG_SMP
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setup_smp();
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#endif
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sparse_init();
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2019-12-01 22:34:19 +08:00
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fixaddr_init();
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2018-09-05 14:25:07 +08:00
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#ifdef CONFIG_HIGHMEM
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kmap_init();
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#endif
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}
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2019-04-19 17:10:52 +08:00
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unsigned long va_pa_offset;
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EXPORT_SYMBOL(va_pa_offset);
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2019-04-08 11:12:25 +08:00
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2019-04-12 19:08:34 +08:00
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asmlinkage __visible void __init csky_start(unsigned int unused,
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void *dtb_start)
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2018-09-05 14:25:07 +08:00
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{
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/* Clean up bss section */
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memset(__bss_start, 0, __bss_stop - __bss_start);
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2019-04-19 17:10:52 +08:00
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va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);
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2019-04-08 11:12:25 +08:00
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2018-09-05 14:25:07 +08:00
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pre_trap_init();
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pre_mmu_init();
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2019-04-12 19:08:34 +08:00
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if (dtb_start == NULL)
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2018-09-05 14:25:07 +08:00
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early_init_dt_scan(__dtb_start);
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else
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2019-04-12 19:08:34 +08:00
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early_init_dt_scan(dtb_start);
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2018-09-05 14:25:07 +08:00
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start_kernel();
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asm volatile("br .\n");
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}
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