2012-03-01 13:49:57 +08:00
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* Marvell PXA GPIO controller
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Required properties:
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2013-04-09 22:27:50 +08:00
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- compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio",
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"intel,pxa27x-gpio", "intel,pxa3xx-gpio",
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2015-01-27 12:46:05 +08:00
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"marvell,pxa93x-gpio", "marvell,mmp-gpio",
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"marvell,mmp2-gpio" or marvell,pxa1928-gpio.
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2012-03-01 13:49:57 +08:00
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- reg : Address and length of the register set for the device
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2012-04-27 16:21:08 +08:00
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- interrupts : Should be the port interrupt shared by all gpio pins.
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There're three gpio interrupts in arch-pxa, and they're gpio0,
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gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
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gpio_mux.
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2013-07-11 23:17:54 +08:00
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- interrupt-names : Should be the names of irq resources. Each interrupt
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uses its own interrupt name, so there should be as many interrupt names
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2015-03-04 11:50:29 +08:00
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as referenced interrupts.
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2012-04-27 16:21:08 +08:00
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source.
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2012-03-01 13:49:57 +08:00
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be one. It is the pin number.
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2014-08-14 17:40:24 +08:00
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Example for a MMP platform:
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2012-03-01 13:49:57 +08:00
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gpio: gpio@d4019000 {
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2013-04-09 22:27:50 +08:00
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compatible = "marvell,mmp-gpio";
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2012-03-01 13:49:57 +08:00
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reg = <0xd4019000 0x1000>;
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2012-04-27 16:21:08 +08:00
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interrupts = <49>;
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2013-07-11 23:17:54 +08:00
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interrupt-names = "gpio_mux";
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2012-03-01 13:49:57 +08:00
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gpio-controller;
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#gpio-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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2012-06-27 19:40:04 +08:00
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2014-08-14 17:40:24 +08:00
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Example for a PXA3xx platform:
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gpio: gpio@40e00000 {
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compatible = "intel,pxa3xx-gpio";
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reg = <0x40e00000 0x10000>;
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interrupt-names = "gpio0", "gpio1", "gpio_mux";
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interrupts = <8 9 10>;
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gpio-controller;
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#gpio-cells = <0x2>;
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interrupt-controller;
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#interrupt-cells = <0x2>;
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};
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