mirror of https://gitee.com/openkylin/linux.git
27 lines
604 B
Plaintext
27 lines
604 B
Plaintext
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* VIA VT8500 and WonderMedia WM8xxx UART Controller
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Required properties:
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- compatible: should be "via,vt8500-uart"
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- reg: base physical address of the controller and length of memory mapped
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region.
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- interrupts: hardware interrupt number
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- clocks: shall be the input parent clock phandle for the clock. This should
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be the 24Mhz reference clock.
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Aliases may be defined to ensure the correct ordering of the uarts.
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Example:
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aliases {
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serial0 = &uart0;
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};
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uart0: serial@d8200000 {
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compatible = "via,vt8500-uart";
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reg = <0xd8200000 0x1040>;
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interrupts = <32>;
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clocks = <&clkuart0>;
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};
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