2005-04-17 06:20:36 +08:00
|
|
|
/*
|
|
|
|
|
* IRQ subsystem internal functions and variables:
|
2011-02-08 03:19:55 +08:00
|
|
|
*
|
|
|
|
|
* Do not ever include this file from anything else than
|
|
|
|
|
* kernel/irq/. Do not even think about using any information outside
|
|
|
|
|
* of this file for your non core code.
|
2005-04-17 06:20:36 +08:00
|
|
|
*/
|
2010-10-01 22:03:45 +08:00
|
|
|
#include <linux/irqdesc.h>
|
2014-02-24 05:40:23 +08:00
|
|
|
#include <linux/kernel_stat.h>
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2011-02-18 00:45:15 +08:00
|
|
|
#ifdef CONFIG_SPARSE_IRQ
|
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|
|
|
# define IRQ_BITMAP_BITS (NR_IRQS + 8196)
|
|
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|
|
#else
|
|
|
|
|
# define IRQ_BITMAP_BITS NR_IRQS
|
|
|
|
|
#endif
|
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|
2011-02-08 03:19:55 +08:00
|
|
|
#define istate core_internal_state__do_not_mess_with_it
|
|
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|
|
2012-01-13 07:02:18 +08:00
|
|
|
extern bool noirqdebug;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
genirq: Allow migration of chained interrupts by installing default action
When a CPU is offlined all interrupts that have an action are migrated to
other still online CPUs. However, if the interrupt has chained handler
installed this is not done. Chained handlers are used by GPIO drivers which
support interrupts, for instance.
When the affinity is not corrected properly we end up in situation where
most interrupts are not arriving to the online CPUs anymore. For example on
Intel Braswell system which has SD-card card detection signal connected to
a GPIO the IO-APIC routing entries look like below after CPU1 is offlined:
pin30, enabled , level, low , V(52), IRR(0), S(0), logical , D(03), M(1)
pin31, enabled , level, low , V(42), IRR(0), S(0), logical , D(03), M(1)
pin32, enabled , level, low , V(62), IRR(0), S(0), logical , D(03), M(1)
pin5b, enabled , level, low , V(72), IRR(0), S(0), logical , D(03), M(1)
The problem here is that the destination mask still contains both CPUs even
if CPU1 is already offline. This means that the IO-APIC still routes
interrupts to the other CPU as well.
We solve the problem by providing a default action for chained interrupts.
This action allows the migration code to correct affinity (as it finds
desc->action != NULL).
Also make the default action handler to emit a warning if for some reason a
chained handler ends up calling it.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Link: http://lkml.kernel.org/r/1444039935-30475-1-git-send-email-mika.westerberg@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-10-05 18:12:15 +08:00
|
|
|
extern struct irqaction chained_action;
|
|
|
|
|
|
2011-02-07 08:55:43 +08:00
|
|
|
/*
|
|
|
|
|
* Bits used by threaded handlers:
|
|
|
|
|
* IRQTF_RUNTHREAD - signals that the interrupt handler thread should run
|
|
|
|
|
* IRQTF_WARNED - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed
|
|
|
|
|
* IRQTF_AFFINITY - irq thread is requested to adjust affinity
|
2011-02-24 07:52:23 +08:00
|
|
|
* IRQTF_FORCED_THREAD - irq action is force threaded
|
2011-02-07 08:55:43 +08:00
|
|
|
*/
|
|
|
|
|
enum {
|
|
|
|
|
IRQTF_RUNTHREAD,
|
|
|
|
|
IRQTF_WARNED,
|
|
|
|
|
IRQTF_AFFINITY,
|
2011-02-24 07:52:23 +08:00
|
|
|
IRQTF_FORCED_THREAD,
|
2011-02-07 08:55:43 +08:00
|
|
|
};
|
|
|
|
|
|
2011-02-08 03:25:25 +08:00
|
|
|
/*
|
2014-05-27 16:07:37 +08:00
|
|
|
* Bit masks for desc->core_internal_state__do_not_mess_with_it
|
2011-02-08 03:25:25 +08:00
|
|
|
*
|
|
|
|
|
* IRQS_AUTODETECT - autodetection in progress
|
2011-02-08 03:40:54 +08:00
|
|
|
* IRQS_SPURIOUS_DISABLED - was disabled due to spurious interrupt
|
|
|
|
|
* detection
|
2011-02-08 03:55:35 +08:00
|
|
|
* IRQS_POLL_INPROGRESS - polling in progress
|
2011-02-08 04:02:10 +08:00
|
|
|
* IRQS_ONESHOT - irq is not unmasked in primary handler
|
2011-02-08 18:39:15 +08:00
|
|
|
* IRQS_REPLAY - irq is replayed
|
|
|
|
|
* IRQS_WAITING - irq is waiting
|
2011-02-08 19:17:57 +08:00
|
|
|
* IRQS_PENDING - irq is pending and replayed later
|
2011-02-08 19:44:58 +08:00
|
|
|
* IRQS_SUSPENDED - irq is suspended
|
2011-02-08 03:25:25 +08:00
|
|
|
*/
|
|
|
|
|
enum {
|
|
|
|
|
IRQS_AUTODETECT = 0x00000001,
|
2011-02-08 03:40:54 +08:00
|
|
|
IRQS_SPURIOUS_DISABLED = 0x00000002,
|
2011-02-08 03:55:35 +08:00
|
|
|
IRQS_POLL_INPROGRESS = 0x00000008,
|
2011-02-08 04:02:10 +08:00
|
|
|
IRQS_ONESHOT = 0x00000020,
|
2011-02-08 18:39:15 +08:00
|
|
|
IRQS_REPLAY = 0x00000040,
|
|
|
|
|
IRQS_WAITING = 0x00000080,
|
2011-02-08 19:17:57 +08:00
|
|
|
IRQS_PENDING = 0x00000200,
|
2011-02-08 19:44:58 +08:00
|
|
|
IRQS_SUSPENDED = 0x00000800,
|
2011-02-08 03:25:25 +08:00
|
|
|
};
|
|
|
|
|
|
2011-02-10 03:44:21 +08:00
|
|
|
#include "debug.h"
|
|
|
|
|
#include "settings.h"
|
|
|
|
|
|
2015-06-24 01:47:29 +08:00
|
|
|
extern int __irq_set_trigger(struct irq_desc *desc, unsigned long flags);
|
2015-06-24 01:52:36 +08:00
|
|
|
extern void __disable_irq(struct irq_desc *desc);
|
|
|
|
|
extern void __enable_irq(struct irq_desc *desc);
|
2008-10-02 05:46:18 +08:00
|
|
|
|
2012-02-08 18:57:52 +08:00
|
|
|
extern int irq_startup(struct irq_desc *desc, bool resend);
|
2011-02-03 05:41:14 +08:00
|
|
|
extern void irq_shutdown(struct irq_desc *desc);
|
2011-02-03 19:27:44 +08:00
|
|
|
extern void irq_enable(struct irq_desc *desc);
|
|
|
|
|
extern void irq_disable(struct irq_desc *desc);
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu);
|
|
|
|
|
extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu);
|
2011-02-10 20:16:14 +08:00
|
|
|
extern void mask_irq(struct irq_desc *desc);
|
|
|
|
|
extern void unmask_irq(struct irq_desc *desc);
|
2014-03-14 02:03:51 +08:00
|
|
|
extern void unmask_threaded_irq(struct irq_desc *desc);
|
2011-02-03 05:41:14 +08:00
|
|
|
|
2014-05-07 23:44:21 +08:00
|
|
|
#ifdef CONFIG_SPARSE_IRQ
|
|
|
|
|
static inline void irq_mark_irq(unsigned int irq) { }
|
|
|
|
|
#else
|
|
|
|
|
extern void irq_mark_irq(unsigned int irq);
|
|
|
|
|
#endif
|
|
|
|
|
|
2009-04-28 09:00:38 +08:00
|
|
|
extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr);
|
2009-01-11 14:24:06 +08:00
|
|
|
|
2015-09-02 10:24:55 +08:00
|
|
|
irqreturn_t handle_irq_event_percpu(struct irq_desc *desc);
|
2011-02-07 08:08:49 +08:00
|
|
|
irqreturn_t handle_irq_event(struct irq_desc *desc);
|
|
|
|
|
|
2010-10-01 22:03:45 +08:00
|
|
|
/* Resending of interrupts :*/
|
2015-06-04 12:13:27 +08:00
|
|
|
void check_irq_resend(struct irq_desc *desc);
|
2011-02-07 17:34:30 +08:00
|
|
|
bool irq_wait_for_poll(struct irq_desc *desc);
|
2014-02-15 08:55:19 +08:00
|
|
|
void __irq_wake_thread(struct irq_desc *desc, struct irqaction *action);
|
2010-10-01 22:03:45 +08:00
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
#ifdef CONFIG_PROC_FS
|
2008-08-20 11:50:11 +08:00
|
|
|
extern void register_irq_proc(unsigned int irq, struct irq_desc *desc);
|
2010-09-30 08:46:07 +08:00
|
|
|
extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc);
|
2005-04-17 06:20:36 +08:00
|
|
|
extern void register_handler_proc(unsigned int irq, struct irqaction *action);
|
|
|
|
|
extern void unregister_handler_proc(unsigned int irq, struct irqaction *action);
|
|
|
|
|
#else
|
2008-08-20 11:50:11 +08:00
|
|
|
static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { }
|
2010-09-30 08:46:07 +08:00
|
|
|
static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { }
|
2005-04-17 06:20:36 +08:00
|
|
|
static inline void register_handler_proc(unsigned int irq,
|
|
|
|
|
struct irqaction *action) { }
|
|
|
|
|
static inline void unregister_handler_proc(unsigned int irq,
|
|
|
|
|
struct irqaction *action) { }
|
|
|
|
|
#endif
|
|
|
|
|
|
2011-02-07 23:02:20 +08:00
|
|
|
extern int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask);
|
2008-11-07 20:18:30 +08:00
|
|
|
|
2009-07-21 17:09:39 +08:00
|
|
|
extern void irq_set_thread_affinity(struct irq_desc *desc);
|
2009-04-28 08:59:53 +08:00
|
|
|
|
2012-03-30 23:11:34 +08:00
|
|
|
extern int irq_do_set_affinity(struct irq_data *data,
|
|
|
|
|
const struct cpumask *dest, bool force);
|
|
|
|
|
|
2009-08-13 18:17:48 +08:00
|
|
|
/* Inline functions for support of irq chips on slow busses */
|
2010-09-27 20:44:35 +08:00
|
|
|
static inline void chip_bus_lock(struct irq_desc *desc)
|
2009-08-13 18:17:48 +08:00
|
|
|
{
|
2010-09-27 20:44:35 +08:00
|
|
|
if (unlikely(desc->irq_data.chip->irq_bus_lock))
|
|
|
|
|
desc->irq_data.chip->irq_bus_lock(&desc->irq_data);
|
2009-08-13 18:17:48 +08:00
|
|
|
}
|
|
|
|
|
|
2010-09-27 20:44:35 +08:00
|
|
|
static inline void chip_bus_sync_unlock(struct irq_desc *desc)
|
2009-08-13 18:17:48 +08:00
|
|
|
{
|
2010-09-27 20:44:35 +08:00
|
|
|
if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock))
|
|
|
|
|
desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data);
|
2009-08-13 18:17:48 +08:00
|
|
|
}
|
|
|
|
|
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
#define _IRQ_DESC_CHECK (1 << 0)
|
|
|
|
|
#define _IRQ_DESC_PERCPU (1 << 1)
|
|
|
|
|
|
|
|
|
|
#define IRQ_GET_DESC_CHECK_GLOBAL (_IRQ_DESC_CHECK)
|
|
|
|
|
#define IRQ_GET_DESC_CHECK_PERCPU (_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU)
|
|
|
|
|
|
2016-01-14 17:54:13 +08:00
|
|
|
#define for_each_action_of_desc(desc, act) \
|
|
|
|
|
for (act = desc->act; act; act = act->next)
|
|
|
|
|
|
2011-02-12 19:16:16 +08:00
|
|
|
struct irq_desc *
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
|
|
|
|
|
unsigned int check);
|
2011-02-12 19:16:16 +08:00
|
|
|
void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus);
|
|
|
|
|
|
|
|
|
|
static inline struct irq_desc *
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check)
|
2011-02-12 19:16:16 +08:00
|
|
|
{
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
return __irq_get_desc_lock(irq, flags, true, check);
|
2011-02-12 19:16:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags)
|
|
|
|
|
{
|
|
|
|
|
__irq_put_desc_unlock(desc, flags, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline struct irq_desc *
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check)
|
2011-02-12 19:16:16 +08:00
|
|
|
{
|
genirq: Add support for per-cpu dev_id interrupts
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.
While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.
For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.
The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:
int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);
The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUs
Once the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.
Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-09-24 00:03:06 +08:00
|
|
|
return __irq_get_desc_lock(irq, flags, false, check);
|
2011-02-12 19:16:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags)
|
|
|
|
|
{
|
|
|
|
|
__irq_put_desc_unlock(desc, flags, false);
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-29 12:18:48 +08:00
|
|
|
#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
|
|
|
|
|
|
2011-02-05 22:20:04 +08:00
|
|
|
/*
|
|
|
|
|
* Manipulation functions for irq_data.state
|
|
|
|
|
*/
|
|
|
|
|
static inline void irqd_set_move_pending(struct irq_data *d)
|
|
|
|
|
{
|
2015-06-01 16:05:12 +08:00
|
|
|
__irqd_to_state(d) |= IRQD_SETAFFINITY_PENDING;
|
2011-02-05 22:20:04 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void irqd_clr_move_pending(struct irq_data *d)
|
|
|
|
|
{
|
2015-06-01 16:05:12 +08:00
|
|
|
__irqd_to_state(d) &= ~IRQD_SETAFFINITY_PENDING;
|
2011-02-05 22:20:04 +08:00
|
|
|
}
|
2011-02-09 00:11:03 +08:00
|
|
|
|
|
|
|
|
static inline void irqd_clear(struct irq_data *d, unsigned int mask)
|
|
|
|
|
{
|
2015-06-01 16:05:12 +08:00
|
|
|
__irqd_to_state(d) &= ~mask;
|
2011-02-09 00:11:03 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void irqd_set(struct irq_data *d, unsigned int mask)
|
|
|
|
|
{
|
2015-06-01 16:05:12 +08:00
|
|
|
__irqd_to_state(d) |= mask;
|
2011-02-09 00:11:03 +08:00
|
|
|
}
|
|
|
|
|
|
2011-02-09 00:22:00 +08:00
|
|
|
static inline bool irqd_has_set(struct irq_data *d, unsigned int mask)
|
|
|
|
|
{
|
2015-06-01 16:05:12 +08:00
|
|
|
return __irqd_to_state(d) & mask;
|
2011-02-09 00:22:00 +08:00
|
|
|
}
|
2014-02-24 05:40:23 +08:00
|
|
|
|
2015-12-29 12:18:48 +08:00
|
|
|
#undef __irqd_to_state
|
|
|
|
|
|
2015-06-04 12:13:25 +08:00
|
|
|
static inline void kstat_incr_irqs_this_cpu(struct irq_desc *desc)
|
2014-02-24 05:40:23 +08:00
|
|
|
{
|
|
|
|
|
__this_cpu_inc(*desc->kstat_irqs);
|
|
|
|
|
__this_cpu_inc(kstat.irqs_sum);
|
|
|
|
|
}
|
2014-08-28 17:44:31 +08:00
|
|
|
|
2015-06-01 16:05:13 +08:00
|
|
|
static inline int irq_desc_get_node(struct irq_desc *desc)
|
|
|
|
|
{
|
2015-06-01 16:05:16 +08:00
|
|
|
return irq_common_data_get_node(&desc->irq_common_data);
|
2015-06-01 16:05:13 +08:00
|
|
|
}
|
|
|
|
|
|
2015-11-10 17:58:12 +08:00
|
|
|
static inline int irq_desc_is_chained(struct irq_desc *desc)
|
|
|
|
|
{
|
|
|
|
|
return (desc->action && desc->action == &chained_action);
|
|
|
|
|
}
|
|
|
|
|
|
2014-08-28 17:44:31 +08:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2014-08-29 20:00:16 +08:00
|
|
|
bool irq_pm_check_wakeup(struct irq_desc *desc);
|
2014-08-28 17:44:31 +08:00
|
|
|
void irq_pm_install_action(struct irq_desc *desc, struct irqaction *action);
|
|
|
|
|
void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action);
|
|
|
|
|
#else
|
2014-08-29 20:00:16 +08:00
|
|
|
static inline bool irq_pm_check_wakeup(struct irq_desc *desc) { return false; }
|
2014-08-28 17:44:31 +08:00
|
|
|
static inline void
|
|
|
|
|
irq_pm_install_action(struct irq_desc *desc, struct irqaction *action) { }
|
|
|
|
|
static inline void
|
|
|
|
|
irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action) { }
|
|
|
|
|
#endif
|