2005-04-17 06:20:36 +08:00
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/*
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* Copyright (c) 2001-2002 by David Brownell
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2006-08-31 05:50:06 +08:00
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*
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2005-04-17 06:20:36 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* this file is part of ehci-hcd.c */
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#define ehci_dbg(ehci, fmt, args...) \
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dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
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#define ehci_err(ehci, fmt, args...) \
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dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
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#define ehci_info(ehci, fmt, args...) \
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dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
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#define ehci_warn(ehci, fmt, args...) \
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dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
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#ifdef EHCI_VERBOSE_DEBUG
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# define vdbg dbg
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# define ehci_vdbg ehci_dbg
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#else
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# define vdbg(fmt,args...) do { } while (0)
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# define ehci_vdbg(ehci, fmt, args...) do { } while (0)
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#endif
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#ifdef DEBUG
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/* check the values in the HCSPARAMS register
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* (host controller _Structural_ parameters)
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* see EHCI spec, Table 2-4 for each value
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*/
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static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
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{
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u32 params = readl (&ehci->caps->hcs_params);
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ehci_dbg (ehci,
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"%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
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label, params,
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HCS_DEBUG_PORT (params),
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HCS_INDICATOR (params) ? " ind" : "",
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HCS_N_CC (params),
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HCS_N_PCC (params),
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HCS_PORTROUTED (params) ? "" : " ordered",
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HCS_PPC (params) ? "" : " !ppc",
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HCS_N_PORTS (params)
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);
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/* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
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if (HCS_PORTROUTED (params)) {
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int i;
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char buf [46], tmp [7], byte;
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buf[0] = 0;
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for (i = 0; i < HCS_N_PORTS (params); i++) {
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// FIXME MIPS won't readb() ...
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byte = readb (&ehci->caps->portroute[(i>>1)]);
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2006-08-31 05:50:06 +08:00
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sprintf(tmp, "%d ",
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2005-04-17 06:20:36 +08:00
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((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
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strcat(buf, tmp);
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}
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ehci_dbg (ehci, "%s portroute %s\n",
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label, buf);
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}
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}
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#else
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static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
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#endif
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#ifdef DEBUG
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/* check the values in the HCCPARAMS register
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* (host controller _Capability_ parameters)
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* see EHCI Spec, Table 2-5 for each value
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* */
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static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
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{
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u32 params = readl (&ehci->caps->hcc_params);
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if (HCC_ISOC_CACHE (params)) {
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ehci_dbg (ehci,
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"%s hcc_params %04x caching frame %s%s%s\n",
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label, params,
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HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
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HCC_CANPARK (params) ? " park" : "",
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HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
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} else {
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ehci_dbg (ehci,
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"%s hcc_params %04x thresh %d uframes %s%s%s\n",
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label,
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params,
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HCC_ISOC_THRES (params),
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HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
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HCC_CANPARK (params) ? " park" : "",
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HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
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}
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}
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#else
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static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
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#endif
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#ifdef DEBUG
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static void __attribute__((__unused__))
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dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
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{
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ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
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le32_to_cpup (&qtd->hw_next),
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le32_to_cpup (&qtd->hw_alt_next),
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le32_to_cpup (&qtd->hw_token),
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le32_to_cpup (&qtd->hw_buf [0]));
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if (qtd->hw_buf [1])
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ehci_dbg (ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
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le32_to_cpup (&qtd->hw_buf [1]),
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le32_to_cpup (&qtd->hw_buf [2]),
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le32_to_cpup (&qtd->hw_buf [3]),
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le32_to_cpup (&qtd->hw_buf [4]));
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}
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static void __attribute__((__unused__))
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dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
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{
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ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
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qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
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qh->hw_current);
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dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
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}
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static void __attribute__((__unused__))
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2006-08-31 05:50:06 +08:00
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dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
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2005-04-17 06:20:36 +08:00
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{
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ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
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label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
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ehci_dbg (ehci,
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2006-08-31 05:50:06 +08:00
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" trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
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2005-04-17 06:20:36 +08:00
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le32_to_cpu(itd->hw_transaction[0]),
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le32_to_cpu(itd->hw_transaction[1]),
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le32_to_cpu(itd->hw_transaction[2]),
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le32_to_cpu(itd->hw_transaction[3]),
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le32_to_cpu(itd->hw_transaction[4]),
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le32_to_cpu(itd->hw_transaction[5]),
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le32_to_cpu(itd->hw_transaction[6]),
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le32_to_cpu(itd->hw_transaction[7]));
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ehci_dbg (ehci,
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2006-08-31 05:50:06 +08:00
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" buf: %08x %08x %08x %08x %08x %08x %08x\n",
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2005-04-17 06:20:36 +08:00
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le32_to_cpu(itd->hw_bufp[0]),
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le32_to_cpu(itd->hw_bufp[1]),
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le32_to_cpu(itd->hw_bufp[2]),
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le32_to_cpu(itd->hw_bufp[3]),
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le32_to_cpu(itd->hw_bufp[4]),
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le32_to_cpu(itd->hw_bufp[5]),
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le32_to_cpu(itd->hw_bufp[6]));
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ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
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itd->index[0], itd->index[1], itd->index[2],
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itd->index[3], itd->index[4], itd->index[5],
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itd->index[6], itd->index[7]);
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}
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static void __attribute__((__unused__))
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2006-08-31 05:50:06 +08:00
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dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
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2005-04-17 06:20:36 +08:00
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{
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ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
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label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb);
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ehci_dbg (ehci,
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2006-08-31 05:50:06 +08:00
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" addr %08x sched %04x result %08x buf %08x %08x\n",
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2005-04-17 06:20:36 +08:00
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le32_to_cpu(sitd->hw_fullspeed_ep),
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le32_to_cpu(sitd->hw_uframe),
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le32_to_cpu(sitd->hw_results),
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le32_to_cpu(sitd->hw_buf [0]),
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le32_to_cpu(sitd->hw_buf [1]));
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}
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static int __attribute__((__unused__))
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dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
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{
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return scnprintf (buf, len,
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"%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
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label, label [0] ? " " : "", status,
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(status & STS_ASS) ? " Async" : "",
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(status & STS_PSS) ? " Periodic" : "",
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(status & STS_RECL) ? " Recl" : "",
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(status & STS_HALT) ? " Halt" : "",
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(status & STS_IAA) ? " IAA" : "",
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(status & STS_FATAL) ? " FATAL" : "",
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(status & STS_FLR) ? " FLR" : "",
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(status & STS_PCD) ? " PCD" : "",
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(status & STS_ERR) ? " ERR" : "",
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(status & STS_INT) ? " INT" : ""
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);
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}
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static int __attribute__((__unused__))
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dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
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{
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return scnprintf (buf, len,
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"%s%sintrenable %02x%s%s%s%s%s%s",
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label, label [0] ? " " : "", enable,
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(enable & STS_IAA) ? " IAA" : "",
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(enable & STS_FATAL) ? " FATAL" : "",
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(enable & STS_FLR) ? " FLR" : "",
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(enable & STS_PCD) ? " PCD" : "",
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(enable & STS_ERR) ? " ERR" : "",
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(enable & STS_INT) ? " INT" : ""
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);
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}
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static const char *const fls_strings [] =
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{ "1024", "512", "256", "??" };
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static int
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dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
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{
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return scnprintf (buf, len,
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"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
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label, label [0] ? " " : "", command,
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(command & CMD_PARK) ? "park" : "(park)",
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CMD_PARK_CNT (command),
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(command >> 16) & 0x3f,
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(command & CMD_LRESET) ? " LReset" : "",
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(command & CMD_IAAD) ? " IAAD" : "",
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(command & CMD_ASE) ? " Async" : "",
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(command & CMD_PSE) ? " Periodic" : "",
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fls_strings [(command >> 2) & 0x3],
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(command & CMD_RESET) ? " Reset" : "",
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(command & CMD_RUN) ? "RUN" : "HALT"
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);
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}
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static int
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dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
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{
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char *sig;
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/* signaling state */
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switch (status & (3 << 10)) {
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case 0 << 10: sig = "se0"; break;
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case 1 << 10: sig = "k"; break; /* low speed */
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case 2 << 10: sig = "j"; break;
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default: sig = "?"; break;
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}
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return scnprintf (buf, len,
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2005-05-08 04:21:50 +08:00
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"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
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2005-04-17 06:20:36 +08:00
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label, label [0] ? " " : "", port, status,
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(status & PORT_POWER) ? " POWER" : "",
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(status & PORT_OWNER) ? " OWNER" : "",
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sig,
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(status & PORT_RESET) ? " RESET" : "",
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(status & PORT_SUSPEND) ? " SUSPEND" : "",
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(status & PORT_RESUME) ? " RESUME" : "",
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(status & PORT_OCC) ? " OCC" : "",
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(status & PORT_OC) ? " OC" : "",
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(status & PORT_PEC) ? " PEC" : "",
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(status & PORT_PE) ? " PE" : "",
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(status & PORT_CSC) ? " CSC" : "",
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(status & PORT_CONNECT) ? " CONNECT" : ""
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);
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}
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#else
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static inline void __attribute__((__unused__))
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dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
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{}
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static inline int __attribute__((__unused__))
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dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
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{ return 0; }
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static inline int __attribute__((__unused__))
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dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
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{ return 0; }
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static inline int __attribute__((__unused__))
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dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
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{ return 0; }
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static inline int __attribute__((__unused__))
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dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
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{ return 0; }
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#endif /* DEBUG */
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/* functions have the "wrong" filename when they're output... */
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#define dbg_status(ehci, label, status) { \
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char _buf [80]; \
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dbg_status_buf (_buf, sizeof _buf, label, status); \
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ehci_dbg (ehci, "%s\n", _buf); \
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}
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#define dbg_cmd(ehci, label, command) { \
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char _buf [80]; \
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dbg_command_buf (_buf, sizeof _buf, label, command); \
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ehci_dbg (ehci, "%s\n", _buf); \
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}
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#define dbg_port(ehci, label, port, status) { \
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char _buf [80]; \
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|
|
dbg_port_buf (_buf, sizeof _buf, label, port, status); \
|
|
|
|
ehci_dbg (ehci, "%s\n", _buf); \
|
|
|
|
}
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
#ifdef STUB_DEBUG_FILES
|
|
|
|
|
|
|
|
static inline void create_debug_files (struct ehci_hcd *bus) { }
|
|
|
|
static inline void remove_debug_files (struct ehci_hcd *bus) { }
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
/* troubleshooting help: expose state in driverfs */
|
|
|
|
|
|
|
|
#define speed_char(info1) ({ char tmp; \
|
|
|
|
switch (info1 & (3 << 12)) { \
|
|
|
|
case 0 << 12: tmp = 'f'; break; \
|
|
|
|
case 1 << 12: tmp = 'l'; break; \
|
|
|
|
case 2 << 12: tmp = 'h'; break; \
|
|
|
|
default: tmp = '?'; break; \
|
|
|
|
}; tmp; })
|
|
|
|
|
|
|
|
static inline char token_mark (__le32 token)
|
|
|
|
{
|
|
|
|
__u32 v = le32_to_cpu (token);
|
|
|
|
if (v & QTD_STS_ACTIVE)
|
|
|
|
return '*';
|
|
|
|
if (v & QTD_STS_HALT)
|
|
|
|
return '-';
|
|
|
|
if (!IS_SHORT_READ (v))
|
|
|
|
return ' ';
|
|
|
|
/* tries to advance through hw_alt_next */
|
|
|
|
return '/';
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qh_lines (
|
|
|
|
struct ehci_hcd *ehci,
|
|
|
|
struct ehci_qh *qh,
|
|
|
|
char **nextp,
|
|
|
|
unsigned *sizep
|
|
|
|
)
|
|
|
|
{
|
|
|
|
u32 scratch;
|
|
|
|
u32 hw_curr;
|
|
|
|
struct list_head *entry;
|
|
|
|
struct ehci_qtd *td;
|
|
|
|
unsigned temp;
|
|
|
|
unsigned size = *sizep;
|
|
|
|
char *next = *nextp;
|
|
|
|
char mark;
|
|
|
|
|
|
|
|
if (qh->hw_qtd_next == EHCI_LIST_END) /* NEC does this */
|
|
|
|
mark = '@';
|
|
|
|
else
|
|
|
|
mark = token_mark (qh->hw_token);
|
|
|
|
if (mark == '/') { /* qh_alt_next controls qh advance? */
|
|
|
|
if ((qh->hw_alt_next & QTD_MASK) == ehci->async->hw_alt_next)
|
|
|
|
mark = '#'; /* blocked */
|
|
|
|
else if (qh->hw_alt_next == EHCI_LIST_END)
|
|
|
|
mark = '.'; /* use hw_qtd_next */
|
|
|
|
/* else alt_next points to some other qtd */
|
|
|
|
}
|
|
|
|
scratch = le32_to_cpup (&qh->hw_info1);
|
|
|
|
hw_curr = (mark == '*') ? le32_to_cpup (&qh->hw_current) : 0;
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
"qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
|
|
|
|
qh, scratch & 0x007f,
|
|
|
|
speed_char (scratch),
|
|
|
|
(scratch >> 8) & 0x000f,
|
|
|
|
scratch, le32_to_cpup (&qh->hw_info2),
|
|
|
|
le32_to_cpup (&qh->hw_token), mark,
|
|
|
|
(__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token)
|
|
|
|
? "data1" : "data0",
|
|
|
|
(le32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
/* hc may be modifying the list as we read it ... */
|
|
|
|
list_for_each (entry, &qh->qtd_list) {
|
|
|
|
td = list_entry (entry, struct ehci_qtd, qtd_list);
|
|
|
|
scratch = le32_to_cpup (&td->hw_token);
|
|
|
|
mark = ' ';
|
|
|
|
if (hw_curr == td->qtd_dma)
|
|
|
|
mark = '*';
|
2005-04-19 08:39:23 +08:00
|
|
|
else if (qh->hw_qtd_next == cpu_to_le32(td->qtd_dma))
|
2005-04-17 06:20:36 +08:00
|
|
|
mark = '+';
|
|
|
|
else if (QTD_LENGTH (scratch)) {
|
|
|
|
if (td->hw_alt_next == ehci->async->hw_alt_next)
|
|
|
|
mark = '#';
|
|
|
|
else if (td->hw_alt_next != EHCI_LIST_END)
|
|
|
|
mark = '/';
|
|
|
|
}
|
|
|
|
temp = snprintf (next, size,
|
|
|
|
"\n\t%p%c%s len=%d %08x urb %p",
|
|
|
|
td, mark, ({ char *tmp;
|
|
|
|
switch ((scratch>>8)&0x03) {
|
|
|
|
case 0: tmp = "out"; break;
|
|
|
|
case 1: tmp = "in"; break;
|
|
|
|
case 2: tmp = "setup"; break;
|
|
|
|
default: tmp = "?"; break;
|
|
|
|
} tmp;}),
|
|
|
|
(scratch >> 16) & 0x7fff,
|
|
|
|
scratch,
|
|
|
|
td->urb);
|
|
|
|
if (temp < 0)
|
|
|
|
temp = 0;
|
|
|
|
else if (size < temp)
|
|
|
|
temp = size;
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
if (temp == size)
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
temp = snprintf (next, size, "\n");
|
|
|
|
if (temp < 0)
|
|
|
|
temp = 0;
|
|
|
|
else if (size < temp)
|
|
|
|
temp = size;
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
done:
|
|
|
|
*sizep = size;
|
|
|
|
*nextp = next;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
show_async (struct class_device *class_dev, char *buf)
|
|
|
|
{
|
|
|
|
struct usb_bus *bus;
|
|
|
|
struct usb_hcd *hcd;
|
|
|
|
struct ehci_hcd *ehci;
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned temp, size;
|
|
|
|
char *next;
|
|
|
|
struct ehci_qh *qh;
|
|
|
|
|
|
|
|
*buf = 0;
|
|
|
|
|
2005-03-16 07:10:13 +08:00
|
|
|
bus = class_get_devdata(class_dev);
|
2006-08-30 23:32:52 +08:00
|
|
|
hcd = bus_to_hcd(bus);
|
2005-04-17 06:20:36 +08:00
|
|
|
ehci = hcd_to_ehci (hcd);
|
|
|
|
next = buf;
|
|
|
|
size = PAGE_SIZE;
|
|
|
|
|
|
|
|
/* dumps a snapshot of the async schedule.
|
|
|
|
* usually empty except for long-term bulk reads, or head.
|
|
|
|
* one QH per line, and TDs we know about
|
|
|
|
*/
|
|
|
|
spin_lock_irqsave (&ehci->lock, flags);
|
|
|
|
for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
|
|
|
|
qh_lines (ehci, qh, &next, &size);
|
|
|
|
if (ehci->reclaim && size > 0) {
|
|
|
|
temp = scnprintf (next, size, "\nreclaim =\n");
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
|
|
|
|
qh_lines (ehci, qh, &next, &size);
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore (&ehci->lock, flags);
|
|
|
|
|
|
|
|
return strlen (buf);
|
|
|
|
}
|
|
|
|
static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
|
|
|
|
|
|
|
|
#define DBG_SCHED_LIMIT 64
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
show_periodic (struct class_device *class_dev, char *buf)
|
|
|
|
{
|
|
|
|
struct usb_bus *bus;
|
|
|
|
struct usb_hcd *hcd;
|
|
|
|
struct ehci_hcd *ehci;
|
|
|
|
unsigned long flags;
|
|
|
|
union ehci_shadow p, *seen;
|
|
|
|
unsigned temp, size, seen_count;
|
|
|
|
char *next;
|
|
|
|
unsigned i;
|
|
|
|
__le32 tag;
|
|
|
|
|
|
|
|
if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
|
|
|
|
return 0;
|
|
|
|
seen_count = 0;
|
|
|
|
|
2005-03-16 07:10:13 +08:00
|
|
|
bus = class_get_devdata(class_dev);
|
2006-08-30 23:32:52 +08:00
|
|
|
hcd = bus_to_hcd(bus);
|
2005-04-17 06:20:36 +08:00
|
|
|
ehci = hcd_to_ehci (hcd);
|
|
|
|
next = buf;
|
|
|
|
size = PAGE_SIZE;
|
|
|
|
|
|
|
|
temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
/* dump a snapshot of the periodic schedule.
|
|
|
|
* iso changes, interrupt usually doesn't.
|
|
|
|
*/
|
|
|
|
spin_lock_irqsave (&ehci->lock, flags);
|
|
|
|
for (i = 0; i < ehci->periodic_size; i++) {
|
|
|
|
p = ehci->pshadow [i];
|
|
|
|
if (likely (!p.ptr))
|
|
|
|
continue;
|
|
|
|
tag = Q_NEXT_TYPE (ehci->periodic [i]);
|
|
|
|
|
|
|
|
temp = scnprintf (next, size, "%4d: ", i);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
do {
|
|
|
|
switch (tag) {
|
|
|
|
case Q_TYPE_QH:
|
|
|
|
temp = scnprintf (next, size, " qh%d-%04x/%p",
|
|
|
|
p.qh->period,
|
|
|
|
le32_to_cpup (&p.qh->hw_info2)
|
|
|
|
/* uframe masks */
|
2005-08-05 09:06:41 +08:00
|
|
|
& (QH_CMASK | QH_SMASK),
|
2005-04-17 06:20:36 +08:00
|
|
|
p.qh);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
/* don't repeat what follows this qh */
|
|
|
|
for (temp = 0; temp < seen_count; temp++) {
|
|
|
|
if (seen [temp].ptr != p.ptr)
|
|
|
|
continue;
|
|
|
|
if (p.qh->qh_next.ptr)
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" ...");
|
|
|
|
p.ptr = NULL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* show more info the first time around */
|
|
|
|
if (temp == seen_count && p.ptr) {
|
|
|
|
u32 scratch = le32_to_cpup (
|
|
|
|
&p.qh->hw_info1);
|
|
|
|
struct ehci_qtd *qtd;
|
|
|
|
char *type = "";
|
|
|
|
|
|
|
|
/* count tds, get ep direction */
|
|
|
|
temp = 0;
|
|
|
|
list_for_each_entry (qtd,
|
|
|
|
&p.qh->qtd_list,
|
|
|
|
qtd_list) {
|
|
|
|
temp++;
|
|
|
|
switch (0x03 & (le32_to_cpu (
|
|
|
|
qtd->hw_token) >> 8)) {
|
|
|
|
case 0: type = "out"; continue;
|
|
|
|
case 1: type = "in"; continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" (%c%d ep%d%s "
|
|
|
|
"[%d/%d] q%d p%d)",
|
|
|
|
speed_char (scratch),
|
|
|
|
scratch & 0x007f,
|
|
|
|
(scratch >> 8) & 0x000f, type,
|
|
|
|
p.qh->usecs, p.qh->c_usecs,
|
|
|
|
temp,
|
|
|
|
0x7ff & (scratch >> 16));
|
|
|
|
|
|
|
|
if (seen_count < DBG_SCHED_LIMIT)
|
|
|
|
seen [seen_count++].qh = p.qh;
|
|
|
|
} else
|
|
|
|
temp = 0;
|
|
|
|
if (p.qh) {
|
|
|
|
tag = Q_NEXT_TYPE (p.qh->hw_next);
|
|
|
|
p = p.qh->qh_next;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case Q_TYPE_FSTN:
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" fstn-%8x/%p", p.fstn->hw_prev,
|
|
|
|
p.fstn);
|
|
|
|
tag = Q_NEXT_TYPE (p.fstn->hw_next);
|
|
|
|
p = p.fstn->fstn_next;
|
|
|
|
break;
|
|
|
|
case Q_TYPE_ITD:
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" itd/%p", p.itd);
|
|
|
|
tag = Q_NEXT_TYPE (p.itd->hw_next);
|
|
|
|
p = p.itd->itd_next;
|
|
|
|
break;
|
|
|
|
case Q_TYPE_SITD:
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" sitd%d-%04x/%p",
|
|
|
|
p.sitd->stream->interval,
|
|
|
|
le32_to_cpup (&p.sitd->hw_uframe)
|
|
|
|
& 0x0000ffff,
|
|
|
|
p.sitd);
|
|
|
|
tag = Q_NEXT_TYPE (p.sitd->hw_next);
|
|
|
|
p = p.sitd->sitd_next;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
} while (p.ptr);
|
|
|
|
|
|
|
|
temp = scnprintf (next, size, "\n");
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore (&ehci->lock, flags);
|
|
|
|
kfree (seen);
|
|
|
|
|
|
|
|
return PAGE_SIZE - size;
|
|
|
|
}
|
|
|
|
static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
|
|
|
|
|
|
|
|
#undef DBG_SCHED_LIMIT
|
|
|
|
|
|
|
|
static ssize_t
|
|
|
|
show_registers (struct class_device *class_dev, char *buf)
|
|
|
|
{
|
|
|
|
struct usb_bus *bus;
|
|
|
|
struct usb_hcd *hcd;
|
|
|
|
struct ehci_hcd *ehci;
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned temp, size, i;
|
|
|
|
char *next, scratch [80];
|
|
|
|
static char fmt [] = "%*s\n";
|
|
|
|
static char label [] = "";
|
|
|
|
|
2005-03-16 07:10:13 +08:00
|
|
|
bus = class_get_devdata(class_dev);
|
2006-08-30 23:32:52 +08:00
|
|
|
hcd = bus_to_hcd(bus);
|
2005-04-17 06:20:36 +08:00
|
|
|
ehci = hcd_to_ehci (hcd);
|
|
|
|
next = buf;
|
|
|
|
size = PAGE_SIZE;
|
|
|
|
|
|
|
|
spin_lock_irqsave (&ehci->lock, flags);
|
|
|
|
|
2005-09-04 06:56:57 +08:00
|
|
|
if (bus->controller->power.power_state.event) {
|
2005-04-17 06:20:36 +08:00
|
|
|
size = scnprintf (next, size,
|
|
|
|
"bus %s, device %s (driver " DRIVER_VERSION ")\n"
|
2005-05-08 04:21:50 +08:00
|
|
|
"%s\n"
|
2005-04-17 06:20:36 +08:00
|
|
|
"SUSPENDED (no register access)\n",
|
|
|
|
hcd->self.controller->bus->name,
|
2005-05-08 04:21:50 +08:00
|
|
|
hcd->self.controller->bus_id,
|
|
|
|
hcd->product_desc);
|
2005-04-17 06:20:36 +08:00
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Capability Registers */
|
|
|
|
i = HC_VERSION(readl (&ehci->caps->hc_capbase));
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
"bus %s, device %s (driver " DRIVER_VERSION ")\n"
|
2005-05-08 04:21:50 +08:00
|
|
|
"%s\n"
|
2005-04-17 06:20:36 +08:00
|
|
|
"EHCI %x.%02x, hcd state %d\n",
|
|
|
|
hcd->self.controller->bus->name,
|
|
|
|
hcd->self.controller->bus_id,
|
2005-05-08 04:21:50 +08:00
|
|
|
hcd->product_desc,
|
2005-04-17 06:20:36 +08:00
|
|
|
i >> 8, i & 0x0ff, hcd->state);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
2005-05-08 04:21:50 +08:00
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
/* EHCI 0.96 and later may have "extended capabilities" */
|
|
|
|
if (hcd->self.controller->bus == &pci_bus_type) {
|
|
|
|
struct pci_dev *pdev;
|
|
|
|
u32 offset, cap, cap2;
|
|
|
|
unsigned count = 256/4;
|
|
|
|
|
|
|
|
pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
|
|
|
|
offset = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
|
|
|
|
while (offset && count--) {
|
|
|
|
pci_read_config_dword (pdev, offset, &cap);
|
|
|
|
switch (cap & 0xff) {
|
|
|
|
case 1:
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
"ownership %08x%s%s\n", cap,
|
|
|
|
(cap & (1 << 24)) ? " linux" : "",
|
|
|
|
(cap & (1 << 16)) ? " firmware" : "");
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
offset += 4;
|
|
|
|
pci_read_config_dword (pdev, offset, &cap2);
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
"SMI sts/enable 0x%08x\n", cap2);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
break;
|
|
|
|
case 0: /* illegal reserved capability */
|
|
|
|
cap = 0;
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
default: /* unknown */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
temp = (cap >> 8) & 0xff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
// FIXME interpret both types of params
|
|
|
|
i = readl (&ehci->caps->hcs_params);
|
|
|
|
temp = scnprintf (next, size, "structural params 0x%08x\n", i);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
i = readl (&ehci->caps->hcc_params);
|
|
|
|
temp = scnprintf (next, size, "capability params 0x%08x\n", i);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
/* Operational Registers */
|
|
|
|
temp = dbg_status_buf (scratch, sizeof scratch, label,
|
|
|
|
readl (&ehci->regs->status));
|
|
|
|
temp = scnprintf (next, size, fmt, temp, scratch);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
temp = dbg_command_buf (scratch, sizeof scratch, label,
|
|
|
|
readl (&ehci->regs->command));
|
|
|
|
temp = scnprintf (next, size, fmt, temp, scratch);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
temp = dbg_intr_buf (scratch, sizeof scratch, label,
|
|
|
|
readl (&ehci->regs->intr_enable));
|
|
|
|
temp = scnprintf (next, size, fmt, temp, scratch);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
temp = scnprintf (next, size, "uframe %04x\n",
|
|
|
|
readl (&ehci->regs->frame_index));
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
2005-05-08 04:21:50 +08:00
|
|
|
for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
|
|
|
|
temp = dbg_port_buf (scratch, sizeof scratch, label, i,
|
|
|
|
readl (&ehci->regs->port_status [i - 1]));
|
2005-04-17 06:20:36 +08:00
|
|
|
temp = scnprintf (next, size, fmt, temp, scratch);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
2005-05-08 04:21:50 +08:00
|
|
|
if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
" debug control %08x\n",
|
|
|
|
readl (&ehci->debug->control));
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
}
|
2005-04-17 06:20:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ehci->reclaim) {
|
|
|
|
temp = scnprintf (next, size, "reclaim qh %p%s\n",
|
|
|
|
ehci->reclaim,
|
|
|
|
ehci->reclaim_ready ? " ready" : "");
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef EHCI_STATS
|
|
|
|
temp = scnprintf (next, size,
|
|
|
|
"irq normal %ld err %ld reclaim %ld (lost %ld)\n",
|
|
|
|
ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
|
|
|
|
ehci->stats.lost_iaa);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
|
|
|
|
temp = scnprintf (next, size, "complete %ld unlink %ld\n",
|
|
|
|
ehci->stats.complete, ehci->stats.unlink);
|
|
|
|
size -= temp;
|
|
|
|
next += temp;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
done:
|
|
|
|
spin_unlock_irqrestore (&ehci->lock, flags);
|
|
|
|
|
|
|
|
return PAGE_SIZE - size;
|
|
|
|
}
|
|
|
|
static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
|
|
|
|
|
|
|
|
static inline void create_debug_files (struct ehci_hcd *ehci)
|
|
|
|
{
|
2005-03-16 07:10:13 +08:00
|
|
|
struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
class_device_create_file(cldev, &class_device_attr_async);
|
|
|
|
class_device_create_file(cldev, &class_device_attr_periodic);
|
|
|
|
class_device_create_file(cldev, &class_device_attr_registers);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void remove_debug_files (struct ehci_hcd *ehci)
|
|
|
|
{
|
2005-03-16 07:10:13 +08:00
|
|
|
struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
class_device_remove_file(cldev, &class_device_attr_async);
|
|
|
|
class_device_remove_file(cldev, &class_device_attr_periodic);
|
|
|
|
class_device_remove_file(cldev, &class_device_attr_registers);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* STUB_DEBUG_FILES */
|
|
|
|
|