2008-10-23 13:26:29 +08:00
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#ifndef _ASM_X86_XOR_64_H
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#define _ASM_X86_XOR_64_H
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2008-06-11 05:45:45 +08:00
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2005-04-17 06:20:36 +08:00
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static struct xor_block_template xor_block_sse = {
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2008-03-23 16:04:03 +08:00
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.name = "generic_sse",
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.do_2 = xor_sse_2,
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.do_3 = xor_sse_3,
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.do_4 = xor_sse_4,
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.do_5 = xor_sse_5,
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2005-04-17 06:20:36 +08:00
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};
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2012-05-22 11:54:04 +08:00
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/* Also try the AVX routines */
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2012-10-03 01:01:25 +08:00
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#include <asm/xor_avx.h>
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2012-05-22 11:54:04 +08:00
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2012-11-02 22:20:24 +08:00
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/* We force the use of the SSE xor block because it can write around L2.
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We may also be able to load into the L1 only depending on how the cpu
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deals with a load to a line that is being prefetched. */
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2005-04-17 06:20:36 +08:00
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#undef XOR_TRY_TEMPLATES
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2008-03-23 16:04:03 +08:00
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#define XOR_TRY_TEMPLATES \
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do { \
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2012-05-22 11:54:04 +08:00
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AVX_XOR_SPEED; \
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2012-11-02 22:20:24 +08:00
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xor_speed(&xor_block_sse_pf64); \
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2008-03-23 16:04:03 +08:00
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xor_speed(&xor_block_sse); \
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} while (0)
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2005-04-17 06:20:36 +08:00
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2008-10-23 13:26:29 +08:00
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#endif /* _ASM_X86_XOR_64_H */
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