2013-07-17 01:40:29 +08:00
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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/ {
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regulators {
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compatible = "simple-bus";
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reg_2p5v: 2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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sound {
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compatible = "fsl,imx6-wandboard-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6-wandboard-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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2013-09-03 10:51:41 +08:00
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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spdif-controller = <&spdif>;
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spdif-out;
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};
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2013-07-17 01:40:29 +08:00
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux_2>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_2>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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2013-07-18 14:42:28 +08:00
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clocks = <&clks 201>;
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2013-07-17 01:40:29 +08:00
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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2013-07-28 08:00:20 +08:00
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
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MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 /* WL_REF_ON */
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* WL_RST_N */
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
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MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
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2013-09-27 22:12:42 +08:00
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MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
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2013-07-17 01:40:29 +08:00
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>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_1>;
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phy-mode = "rgmii";
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2013-09-27 22:12:42 +08:00
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phy-reset-gpios = <&gpio3 29 0>;
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2013-07-17 01:40:29 +08:00
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status = "okay";
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};
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2013-09-03 10:51:41 +08:00
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&spdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif_3>;
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status = "okay";
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};
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2013-07-17 01:40:29 +08:00
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&ssi1 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_2>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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2013-08-21 21:27:02 +08:00
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg_1>;
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disable-over-current;
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dr_mode = "peripheral";
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status = "okay";
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};
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2013-07-17 01:40:29 +08:00
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1_2>;
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cd-gpios = <&gpio1 2 0>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_2>;
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non-removable;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_2>;
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cd-gpios = <&gpio3 9 0>;
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status = "okay";
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};
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