2012-07-26 22:01:32 +08:00
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/*
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* Device Tree Source for OMAP243x SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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2013-05-31 20:32:55 +08:00
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#include "omap2.dtsi"
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2012-07-26 22:01:32 +08:00
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/ {
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compatible = "ti,omap2430", "ti,omap2";
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ocp {
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2015-02-12 16:38:16 +08:00
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l4_wkup: l4_wkup@49000000 {
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compatible = "ti,omap2-l4-wkup", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x49000000 0x31000>;
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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prcm: prcm@6000 {
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compatible = "ti,omap2-prcm";
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reg = <0x6000 0x1000>;
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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prcm_clockdomains: clockdomains {
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};
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};
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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scm: scm@2000 {
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compatible = "ti,omap2-scm", "simple-bus";
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reg = <0x2000 0x1000>;
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2014-02-21 23:05:02 +08:00
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#address-cells = <1>;
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2015-02-12 16:38:16 +08:00
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#size-cells = <1>;
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ranges = <0 0x2000 0x1000>;
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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omap2430_pmx: pinmux@30 {
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compatible = "ti,omap2430-padconf",
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"pinctrl-single";
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reg = <0x30 0x0154>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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};
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2014-02-21 23:05:02 +08:00
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2015-02-12 16:38:16 +08:00
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scm_conf: scm_conf@270 {
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compatible = "syscon";
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reg = <0x270 0x240>;
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#address-cells = <1>;
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#size-cells = <1>;
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2012-10-26 03:24:14 +08:00
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2015-02-12 16:38:16 +08:00
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scm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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2012-09-11 01:34:51 +08:00
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2015-02-12 16:38:16 +08:00
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pbias_regulator: pbias_regulator {
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compatible = "ti,pbias-omap";
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reg = <0x230 0x4>;
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syscon = <&scm_conf>;
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pbias_mmc_reg: pbias_mmc_omap2430 {
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regulator-name = "pbias_mmc_omap2430";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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};
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};
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};
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scm_clockdomains: clockdomains {
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};
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};
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2014-02-19 22:56:40 +08:00
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2015-02-12 16:38:16 +08:00
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counter32k: counter@20000 {
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compatible = "ti,omap-counter32k";
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reg = <0x20000 0x20>;
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ti,hwmods = "counter_32k";
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2014-02-19 22:56:40 +08:00
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};
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};
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2013-03-01 05:32:00 +08:00
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gpio1: gpio@4900c000 {
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compatible = "ti,omap2-gpio";
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reg = <0x4900c000 0x200>;
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interrupts = <29>;
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ti,hwmods = "gpio1";
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2013-04-05 04:16:16 +08:00
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ti,gpio-always-on;
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2013-03-01 05:32:00 +08:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@4900e000 {
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compatible = "ti,omap2-gpio";
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reg = <0x4900e000 0x200>;
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interrupts = <30>;
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ti,hwmods = "gpio2";
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2013-04-05 04:16:16 +08:00
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ti,gpio-always-on;
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2013-03-01 05:32:00 +08:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@49010000 {
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compatible = "ti,omap2-gpio";
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reg = <0x49010000 0x200>;
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interrupts = <31>;
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ti,hwmods = "gpio3";
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2013-04-05 04:16:16 +08:00
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ti,gpio-always-on;
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2013-03-01 05:32:00 +08:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@49012000 {
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compatible = "ti,omap2-gpio";
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reg = <0x49012000 0x200>;
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interrupts = <32>;
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ti,hwmods = "gpio4";
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2013-04-05 04:16:16 +08:00
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ti,gpio-always-on;
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2013-03-01 05:32:00 +08:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio5: gpio@480b6000 {
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compatible = "ti,omap2-gpio";
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reg = <0x480b6000 0x200>;
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interrupts = <33>;
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ti,hwmods = "gpio5";
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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2013-02-23 05:33:31 +08:00
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gpmc: gpmc@6e000000 {
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compatible = "ti,omap2430-gpmc";
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reg = <0x6e000000 0x1000>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupts = <20>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <4>;
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ti,hwmods = "gpmc";
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};
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2012-07-26 22:01:32 +08:00
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mcbsp1: mcbsp@48074000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48074000 0xff>;
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reg-names = "mpu";
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interrupts = <64>, /* OCP compliant interrupt */
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<59>, /* TX interrupt */
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<60>, /* RX interrupt */
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<61>; /* RX overflow interrupt */
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interrupt-names = "common", "tx", "rx", "rx_overflow";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp1";
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2013-03-11 15:50:21 +08:00
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dmas = <&sdma 31>,
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<&sdma 32>;
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dma-names = "tx", "rx";
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2014-01-24 16:19:06 +08:00
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status = "disabled";
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2012-07-26 22:01:32 +08:00
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};
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mcbsp2: mcbsp@48076000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48076000 0xff>;
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reg-names = "mpu";
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interrupts = <16>, /* OCP compliant interrupt */
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<62>, /* TX interrupt */
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<63>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp2";
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2013-03-11 15:50:21 +08:00
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dmas = <&sdma 33>,
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<&sdma 34>;
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dma-names = "tx", "rx";
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2014-01-24 16:19:06 +08:00
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status = "disabled";
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2012-07-26 22:01:32 +08:00
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};
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mcbsp3: mcbsp@4808c000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x4808c000 0xff>;
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reg-names = "mpu";
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interrupts = <17>, /* OCP compliant interrupt */
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<89>, /* TX interrupt */
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<90>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp3";
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2013-03-11 15:50:21 +08:00
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dmas = <&sdma 17>,
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<&sdma 18>;
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dma-names = "tx", "rx";
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2014-01-24 16:19:06 +08:00
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status = "disabled";
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2012-07-26 22:01:32 +08:00
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};
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mcbsp4: mcbsp@4808e000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x4808e000 0xff>;
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reg-names = "mpu";
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interrupts = <18>, /* OCP compliant interrupt */
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<54>, /* TX interrupt */
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<55>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp4";
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2013-03-11 15:50:21 +08:00
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dmas = <&sdma 19>,
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<&sdma 20>;
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dma-names = "tx", "rx";
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2014-01-24 16:19:06 +08:00
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status = "disabled";
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2012-07-26 22:01:32 +08:00
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};
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mcbsp5: mcbsp@48096000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48096000 0xff>;
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reg-names = "mpu";
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interrupts = <19>, /* OCP compliant interrupt */
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<81>, /* TX interrupt */
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<82>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp5";
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2013-03-11 15:50:21 +08:00
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dmas = <&sdma 21>,
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<&sdma 22>;
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dma-names = "tx", "rx";
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2014-01-24 16:19:06 +08:00
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status = "disabled";
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2012-07-26 22:01:32 +08:00
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};
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2012-10-19 22:59:00 +08:00
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2013-11-15 07:25:09 +08:00
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mmc1: mmc@4809c000 {
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compatible = "ti,omap2-hsmmc";
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reg = <0x4809c000 0x200>;
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interrupts = <83>;
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ti,hwmods = "mmc1";
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ti,dual-volt;
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dmas = <&sdma 61>, <&sdma 62>;
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dma-names = "tx", "rx";
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2014-02-19 22:56:40 +08:00
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pbias-supply = <&pbias_mmc_reg>;
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2013-11-15 07:25:09 +08:00
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};
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mmc2: mmc@480b4000 {
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compatible = "ti,omap2-hsmmc";
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reg = <0x480b4000 0x200>;
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interrupts = <86>;
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ti,hwmods = "mmc2";
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dmas = <&sdma 47>, <&sdma 48>;
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dma-names = "tx", "rx";
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};
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2014-04-23 06:23:36 +08:00
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mailbox: mailbox@48094000 {
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compatible = "ti,omap2-mailbox";
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reg = <0x48094000 0x200>;
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interrupts = <26>;
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ti,hwmods = "mailbox";
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2014-11-04 07:07:35 +08:00
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#mbox-cells = <1>;
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2014-07-12 05:44:34 +08:00
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <6>;
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2014-09-11 03:27:23 +08:00
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mbox_dsp: dsp {
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ti,mbox-tx = <0 0 0>;
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ti,mbox-rx = <1 0 0>;
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};
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2014-04-23 06:23:36 +08:00
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};
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2012-10-19 22:59:00 +08:00
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timer1: timer@49018000 {
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2013-03-20 01:38:18 +08:00
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compatible = "ti,omap2420-timer";
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2012-10-19 22:59:00 +08:00
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reg = <0x49018000 0x400>;
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interrupts = <37>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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2013-11-15 07:25:09 +08:00
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mcspi3: mcspi@480b8000 {
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compatible = "ti,omap2-mcspi";
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ti,hwmods = "mcspi3";
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reg = <0x480b8000 0x100>;
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interrupts = <91>;
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dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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usb_otg_hs: usb_otg_hs@480ac000 {
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compatible = "ti,omap2-musb";
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ti,hwmods = "usb_otg_hs";
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reg = <0x480ac000 0x1000>;
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interrupts = <93>;
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};
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wd_timer2: wdt@49016000 {
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compatible = "ti,omap2-wdt";
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ti,hwmods = "wd_timer2";
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reg = <0x49016000 0x80>;
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};
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2012-07-26 22:01:32 +08:00
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};
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};
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2013-11-15 07:25:09 +08:00
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&i2c1 {
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compatible = "ti,omap2430-i2c";
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};
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&i2c2 {
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compatible = "ti,omap2430-i2c";
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};
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2014-02-25 00:51:05 +08:00
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/include/ "omap24xx-clocks.dtsi"
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/include/ "omap2430-clocks.dtsi"
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