mirror of https://gitee.com/openkylin/linux.git
180 lines
3.9 KiB
C
180 lines
3.9 KiB
C
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/*
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* Clock framework for Telechips SoCs
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* Based on arch/arm/plat-mxc/clock.c
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*
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* Copyright (C) 2004 - 2005 Nokia corporation
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* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
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* Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
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* Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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* Copyright 2010 Hans J. Koch, hjk@linutronix.de
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*
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* Licensed under the terms of the GPL v2.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/string.h>
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#include <mach/clock.h>
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#include <mach/hardware.h>
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static DEFINE_MUTEX(clocks_mutex);
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/*-------------------------------------------------------------------------
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* Standard clock functions defined in include/linux/clk.h
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*-------------------------------------------------------------------------*/
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static void __clk_disable(struct clk *clk)
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{
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BUG_ON(clk->refcount == 0);
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if (!(--clk->refcount) && clk->disable) {
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/* Unconditionally disable the clock in hardware */
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clk->disable(clk);
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/* recursively disable parents */
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if (clk->parent)
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__clk_disable(clk->parent);
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}
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}
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static int __clk_enable(struct clk *clk)
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{
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int ret = 0;
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if (clk->refcount++ == 0 && clk->enable) {
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if (clk->parent)
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ret = __clk_enable(clk->parent);
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if (ret)
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return ret;
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else
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return clk->enable(clk);
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}
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return 0;
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}
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/* This function increments the reference count on the clock and enables the
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* clock if not already enabled. The parent clock tree is recursively enabled
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*/
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int clk_enable(struct clk *clk)
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{
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int ret = 0;
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if (!clk)
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return -EINVAL;
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mutex_lock(&clocks_mutex);
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ret = __clk_enable(clk);
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mutex_unlock(&clocks_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_enable);
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/* This function decrements the reference count on the clock and disables
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* the clock when reference count is 0. The parent clock tree is
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* recursively disabled
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*/
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void clk_disable(struct clk *clk)
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{
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if (!clk)
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return;
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mutex_lock(&clocks_mutex);
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__clk_disable(clk);
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mutex_unlock(&clocks_mutex);
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}
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EXPORT_SYMBOL_GPL(clk_disable);
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/* Retrieve the *current* clock rate. If the clock itself
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* does not provide a special calculation routine, ask
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* its parent and so on, until one is able to return
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* a valid clock rate
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*/
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (!clk)
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return 0UL;
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if (clk->get_rate)
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return clk->get_rate(clk);
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return clk_get_rate(clk->parent);
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}
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EXPORT_SYMBOL_GPL(clk_get_rate);
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/* Round the requested clock rate to the nearest supported
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* rate that is less than or equal to the requested rate.
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* This is dependent on the clock's current parent.
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*/
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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if (!clk)
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return 0;
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if (!clk->round_rate)
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return 0;
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return clk->round_rate(clk, rate);
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}
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EXPORT_SYMBOL_GPL(clk_round_rate);
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/* Set the clock to the requested clock rate. The rate must
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* match a supported rate exactly based on what clk_round_rate returns
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*/
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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int ret = -EINVAL;
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if (!clk)
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return ret;
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if (!clk->set_rate || !rate)
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return ret;
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mutex_lock(&clocks_mutex);
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ret = clk->set_rate(clk, rate);
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mutex_unlock(&clocks_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_set_rate);
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/* Set the clock's parent to another clock source */
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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struct clk *old;
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int ret = -EINVAL;
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if (!clk)
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return ret;
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if (!clk->set_parent || !parent)
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return ret;
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mutex_lock(&clocks_mutex);
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old = clk->parent;
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if (clk->refcount)
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__clk_enable(parent);
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ret = clk->set_parent(clk, parent);
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if (ret)
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old = parent;
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if (clk->refcount)
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__clk_disable(old);
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mutex_unlock(&clocks_mutex);
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_set_parent);
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/* Retrieve the clock's parent clock source */
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struct clk *clk_get_parent(struct clk *clk)
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{
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if (!clk)
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return NULL;
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return clk->parent;
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}
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EXPORT_SYMBOL_GPL(clk_get_parent);
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