2013-04-02 13:15:16 +08:00
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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2014-01-20 20:02:38 +08:00
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#include <dt-bindings/gpio/gpio.h>
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2013-12-20 05:07:24 +08:00
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#include <dt-bindings/input/input.h>
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2013-04-02 13:15:16 +08:00
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/ {
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2014-05-07 21:19:00 +08:00
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chosen {
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stdout-path = &uart1;
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};
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2013-04-02 13:15:16 +08:00
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memory {
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reg = <0x10000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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2014-02-07 23:22:50 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2013-04-02 13:15:16 +08:00
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2014-02-07 23:22:50 +08:00
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reg_usb_otg_vbus: regulator@0 {
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2013-04-02 13:15:16 +08:00
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compatible = "regulator-fixed";
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2014-02-07 23:22:50 +08:00
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reg = <0>;
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2013-04-02 13:15:16 +08:00
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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2013-06-13 19:51:00 +08:00
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2014-02-07 23:22:50 +08:00
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reg_usb_h1_vbus: regulator@1 {
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2013-08-12 16:46:24 +08:00
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compatible = "regulator-fixed";
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2014-02-07 23:22:50 +08:00
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reg = <1>;
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2013-08-12 16:46:24 +08:00
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 29 0>;
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enable-active-high;
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};
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2014-02-07 23:22:50 +08:00
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reg_audio: regulator@2 {
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2013-06-13 19:51:00 +08:00
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compatible = "regulator-fixed";
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2014-02-07 23:22:50 +08:00
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reg = <2>;
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2013-06-13 19:51:00 +08:00
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regulator-name = "wm8962-supply";
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gpio = <&gpio4 10 0>;
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enable-active-high;
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};
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2013-04-02 13:15:16 +08:00
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};
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gpio-keys {
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compatible = "gpio-keys";
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2013-12-20 05:07:24 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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2014-01-20 20:02:38 +08:00
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gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
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2013-12-20 05:07:24 +08:00
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gpio-key,wakeup;
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linux,code = <KEY_POWER>;
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};
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2013-04-02 13:15:16 +08:00
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volume-up {
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label = "Volume Up";
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2014-01-20 20:02:38 +08:00
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gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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2013-07-19 21:40:23 +08:00
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gpio-key,wakeup;
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2013-12-20 05:07:24 +08:00
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linux,code = <KEY_VOLUMEUP>;
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2013-04-02 13:15:16 +08:00
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};
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volume-down {
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label = "Volume Down";
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2014-01-20 20:02:38 +08:00
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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2013-07-19 21:40:23 +08:00
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gpio-key,wakeup;
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2013-12-20 05:07:24 +08:00
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linux,code = <KEY_VOLUMEDOWN>;
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2013-04-02 13:15:16 +08:00
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};
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};
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2013-06-14 13:22:46 +08:00
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sound {
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compatible = "fsl,imx6q-sabresd-wm8962",
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"fsl,imx-audio-wm8962";
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model = "wm8962-audio";
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ssi-controller = <&ssi2>;
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audio-codec = <&codec>;
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audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"Ext Spk", "SPKOUTL",
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"Ext Spk", "SPKOUTR",
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"MICBIAS", "AMIC",
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"IN3R", "MICBIAS",
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"DMIC", "MICBIAS",
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"DMICDAT", "DMIC";
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mux-int-port = <2>;
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mux-ext-port = <3>;
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};
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2013-10-12 03:48:16 +08:00
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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status = "okay";
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};
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2014-03-06 02:58:39 +08:00
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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red {
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gpios = <&gpio1 2 0>;
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default-state = "on";
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};
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};
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2013-04-02 13:15:16 +08:00
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};
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2013-06-14 13:19:57 +08:00
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&audmux {
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pinctrl-names = "default";
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2013-10-23 15:36:09 +08:00
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pinctrl-0 = <&pinctrl_audmux>;
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2013-06-14 13:19:57 +08:00
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status = "okay";
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};
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2013-06-21 10:19:11 +08:00
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&ecspi1 {
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio4 9 0>;
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pinctrl-names = "default";
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2013-10-23 15:36:09 +08:00
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pinctrl-0 = <&pinctrl_ecspi1>;
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2013-06-21 10:19:11 +08:00
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status = "okay";
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p32";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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2013-04-02 13:15:16 +08:00
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&fec {
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pinctrl-names = "default";
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2013-10-23 15:36:09 +08:00
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pinctrl-0 = <&pinctrl_enet>;
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2013-04-02 13:15:16 +08:00
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phy-mode = "rgmii";
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2013-09-27 22:12:41 +08:00
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phy-reset-gpios = <&gpio1 25 0>;
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2013-04-02 13:15:16 +08:00
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status = "okay";
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};
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2014-04-22 21:04:59 +08:00
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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2013-06-13 19:51:01 +08:00
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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2013-10-23 15:36:09 +08:00
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pinctrl-0 = <&pinctrl_i2c1>;
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2013-06-13 19:51:01 +08:00
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status = "okay";
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codec: wm8962@1a {
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compatible = "wlf,wm8962";
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reg = <0x1a>;
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2013-07-18 14:42:28 +08:00
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clocks = <&clks 201>;
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2013-06-13 19:51:01 +08:00
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DCVDD-supply = <®_audio>;
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DBVDD-supply = <®_audio>;
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AVDD-supply = <®_audio>;
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CPVDD-supply = <®_audio>;
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MICVDD-supply = <®_audio>;
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PLLVDD-supply = <®_audio>;
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SPKVDD1-supply = <®_audio>;
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SPKVDD2-supply = <®_audio>;
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gpio-cfg = <
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0x0000 /* 0:Default */
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0x0000 /* 1:Default */
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0x0013 /* 2:FN_DMICCLK */
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0x0000 /* 3:Default */
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0x8014 /* 4:FN_DMICCDAT */
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0x0000 /* 5:Default */
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>;
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};
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};
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2013-12-24 11:04:49 +08:00
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pmic: pfuze100@08 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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2013-07-25 04:20:03 +08:00
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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2013-10-23 15:36:09 +08:00
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pinctrl-0 = <&pinctrl_i2c3>;
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2013-07-25 04:20:03 +08:00
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status = "okay";
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egalax_ts@04 {
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compatible = "eeti,egalax_ts";
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reg = <0x04>;
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interrupt-parent = <&gpio6>;
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interrupts = <7 2>;
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wakeup-gpios = <&gpio6 7 0>;
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};
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};
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2013-07-11 13:58:36 +08:00
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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2013-10-23 15:36:09 +08:00
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imx6qdl-sabresd {
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2013-07-11 13:58:36 +08:00
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
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MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
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MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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2013-07-25 04:20:03 +08:00
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MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
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2013-08-12 16:46:24 +08:00
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
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2013-08-12 16:51:39 +08:00
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
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2013-09-27 22:12:41 +08:00
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
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2013-07-11 13:58:36 +08:00
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>;
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};
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2013-10-23 15:36:09 +08:00
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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2014-02-08 10:14:28 +08:00
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
2013-10-23 15:36:09 +08:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
|
|
|
|
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
|
|
|
|
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
|
2014-05-15 03:53:55 +08:00
|
|
|
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
|
2013-10-23 15:36:09 +08:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_enet: enetgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-20 05:07:24 +08:00
|
|
|
pinctrl_gpio_keys: gpio_keysgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
|
|
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
|
|
|
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
|
|
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-24 11:04:49 +08:00
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2014-04-22 04:56:49 +08:00
|
|
|
pinctrl_pcie: pciegrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
|
|
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
|
|
|
|
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
|
|
|
|
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
|
|
|
|
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
|
|
|
>;
|
|
|
|
};
|
2014-05-08 22:10:56 +08:00
|
|
|
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
|
|
|
>;
|
|
|
|
};
|
2013-07-11 13:58:36 +08:00
|
|
|
};
|
2014-03-06 02:58:39 +08:00
|
|
|
|
|
|
|
gpio_leds {
|
|
|
|
pinctrl_gpio_leds: gpioledsgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
};
|
2013-07-11 13:58:36 +08:00
|
|
|
};
|
|
|
|
|
2013-07-16 22:15:18 +08:00
|
|
|
&ldb {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
lvds-channel@1 {
|
|
|
|
fsl,data-mapping = "spwg";
|
|
|
|
fsl,data-width = <18>;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
display-timings {
|
|
|
|
native-mode = <&timing0>;
|
|
|
|
timing0: hsd100pxn1 {
|
|
|
|
clock-frequency = <65000000>;
|
|
|
|
hactive = <1024>;
|
|
|
|
vactive = <768>;
|
|
|
|
hback-porch = <220>;
|
|
|
|
hfront-porch = <40>;
|
|
|
|
vback-porch = <21>;
|
|
|
|
vfront-porch = <7>;
|
|
|
|
hsync-len = <60>;
|
|
|
|
vsync-len = <10>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-04-22 04:56:49 +08:00
|
|
|
&pcie {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
|
|
reset-gpio = <&gpio7 12 0>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2013-10-12 03:48:16 +08:00
|
|
|
&pwm1 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
2013-10-12 03:48:16 +08:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2013-06-14 13:19:57 +08:00
|
|
|
&ssi2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2013-04-02 13:15:16 +08:00
|
|
|
&uart1 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
2013-04-02 13:15:16 +08:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbh1 {
|
2013-08-12 16:46:24 +08:00
|
|
|
vbus-supply = <®_usb_h1_vbus>;
|
2013-04-02 13:15:16 +08:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbotg {
|
|
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
2013-04-02 13:15:16 +08:00
|
|
|
disable-over-current;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc2 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
2013-09-18 00:46:23 +08:00
|
|
|
bus-width = <8>;
|
2013-04-02 13:15:16 +08:00
|
|
|
cd-gpios = <&gpio2 2 0>;
|
|
|
|
wp-gpios = <&gpio2 3 0>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc3 {
|
|
|
|
pinctrl-names = "default";
|
2013-10-23 15:36:09 +08:00
|
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
2013-09-18 00:46:23 +08:00
|
|
|
bus-width = <8>;
|
2013-04-02 13:15:16 +08:00
|
|
|
cd-gpios = <&gpio2 0 0>;
|
|
|
|
wp-gpios = <&gpio2 1 0>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
2014-05-08 22:10:56 +08:00
|
|
|
|
|
|
|
&usdhc4 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
|
|
|
bus-width = <8>;
|
|
|
|
non-removable;
|
|
|
|
no-1-8-v;
|
|
|
|
status = "okay";
|
|
|
|
};
|