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linux/tools/perf/pmu-events/arch/nds32/n13/atcpmu.json

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nds32: Perf porting This is the commit that porting the perf for nds32. 1.Raw event: The raw events start with 'r'. Usage: perf stat -e rXYZ ./app X: the index of performance counter. YZ: the index(convert to hexdecimal) of events Example: 'perf stat -e r101 ./app' means the counter 1 will count the instruction event. The index of counter and events can be found in "Andes System Privilege Architecture Version 3 Manual". Or you can perform the 'perf list' to find the symbolic name of raw events. 2.Perf mmap2: Fix unexpected perf mmap2() page fault When the mmap2() called by perf application, you will encounter such condition:"failed to write." With return value -EFAULT This is due to the page fault caused by "reading" buffer from the mapped legal address region to write to the descriptor. The page_fault handler will get a VM_FAULT_SIGBUS return value, which should not happens here.(Due to this is a read request.) You can refer to kernel/events/core.c:perf_mmap_fault(...) If "(vmf->pgoff && (vmf->flags & FAULT_FLAG_WRITE))" is evaluated as true, you will get VM_FAULT_SIGBUS as return value. However, this is not an write request. The flags which indicated why the page fault happens is wrong. Furthermore, NDS32 SPAv3 is not able to detect it is read or write. It only know either it is instruction fetch or data access. Therefore, by removing the wrong flag assignment(actually, the hardware is not able to show the reason), we can fix this bug. 3.Perf multiple events map to same counter. When there are multiple events map to the same counter, the counter counts inaccurately. This is because each counter only counts one event in the same time. So when there are multiple events map to same counter, they have to take turns in each context. There are two solution: 1. Print the error message when multiple events map to the same counter. But print the error message would let the program hang in loop. The ltp (linux test program) would be failed when the program hang in loop. 2. Don't print the error message, the ltp would pass. But the user need to have the knowledge that don't count the events which map to the same counter, or the user will get the inaccurate results. We choose method 2 for the solution Signed-off-by: Nickhu <nickhu@andestech.com> Acked-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-10-25 10:24:15 +08:00
[
{
"PublicDescription": "Conditional branch",
"EventCode": "0x102",
"EventName": "cond_br",
"BriefDescription": "V3 Conditional branch"
},
{
"PublicDescription": "Taken conditional branches",
"EventCode": "0x103",
"EventName": "taken_cond_br",
"BriefDescription": "V3 Taken Conditional branch"
},
{
"PublicDescription": "Prefetch Instruction",
"EventCode": "0x104",
"EventName": "prefetch_inst",
"BriefDescription": "V3 Prefetch Instruction"
},
{
"PublicDescription": "RET Inst",
"EventCode": "0x105",
"EventName": "ret_inst",
"BriefDescription": "V3 RET Inst"
},
{
"PublicDescription": "JR(non-RET) instructions",
"EventCode": "0x106",
"EventName": "jr_inst",
"BriefDescription": "V3 JR(non-RET) instructions"
},
{
"PublicDescription": "JAL/JRAL instructions",
"EventCode": "0x107",
"EventName": "jal_jral_inst",
"BriefDescription": "V3 JAL/JRAL instructions"
},
{
"PublicDescription": "NOP instructions",
"EventCode": "0x108",
"EventName": "nop_inst",
"BriefDescription": "V3 NOP instructions"
},
{
"PublicDescription": "SCW instructions",
"EventCode": "0x109",
"EventName": "scw_inst",
"BriefDescription": "V3 SCW instructions"
},
{
"PublicDescription": "ISB/DSB instructions",
"EventCode": "0x10a",
"EventName": "isb_dsb_inst",
"BriefDescription": "V3 ISB/DSB instructions"
},
{
"PublicDescription": "CCTL instructions",
"EventCode": "0x10b",
"EventName": "cctl_inst",
"BriefDescription": "V3 CCTL instructions"
},
{
"PublicDescription": "Taken Interrupts",
"EventCode": "0x10c",
"EventName": "taken_interrupts",
"BriefDescription": "V3 Taken Interrupts"
},
{
"PublicDescription": "Loads Completed",
"EventCode": "0x10d",
"EventName": "load_completed",
"BriefDescription": "V3 Loads Completed"
},
{
"PublicDescription": "uITLB accesses",
"EventCode": "0x10e",
"EventName": "uitlb_access",
"BriefDescription": "V3 uITLB accesses"
},
{
"PublicDescription": "uDTLB accesses",
"EventCode": "0x10f",
"EventName": "udtlb_access",
"BriefDescription": "V3 uDTLB accesses"
},
{
"PublicDescription": "MTLB accesses",
"EventCode": "0x110",
"EventName": "mtlb_access",
"BriefDescription": "V3 MTLB accesses"
},
{
"PublicDescription": "DATA_DEPENDENCY_STALL_CYCLES",
"EventCode": "0x112",
"EventName": "data_dependency_stall",
"BriefDescription": "V3 DATA_DEPENDENCY_STALL_CYCLES"
},
{
"PublicDescription": "DATA_CACHE_MISS_STALL_CYCLES",
"EventCode": "0x113",
"EventName": "dcache_miss_stall",
"BriefDescription": "V3 DATA_CACHE_MISS_STALL_CYCLES"
},
{
"PublicDescription": "ILM access",
"EventCode": "0x118",
"EventName": "ilm_access",
"BriefDescription": "V3 ILM accesses"
},
{
"PublicDescription": "LSU BIU CYCLES",
"EventCode": "0x119",
"EventName": "lsu_biu_cycles",
"BriefDescription": "V3 LSU BIU CYCLES"
},
{
"PublicDescription": "HPTWK BIU CYCLES",
"EventCode": "0x11a",
"EventName": "hptwk_biu_cycles",
"BriefDescription": "V3 HPTWK BIU CYCLES"
},
{
"PublicDescription": "DMA BIU CYCLES",
"EventCode": "0x11b",
"EventName": "dma_biu_cycles",
"BriefDescription": "V3 DMA BIU CYCLES"
},
{
"PublicDescription": "CODE CACHE FILL BIU CYCLES",
"EventCode": "0x11c",
"EventName": "icache_fill_biu_cycles",
"BriefDescription": "V3 CODE CACHE FILL BIU CYCLES"
},
{
"PublicDescription": "LEAGAL UNALIGN DCACHE ACCESS",
"EventCode": "0x11d",
"EventName": "legal_unalined_dcache_access",
"BriefDescription": "V3 LEAGAL UNALIGN DCACHE ACCESS"
},
{
"PublicDescription": "PUSH25 instructions",
"EventCode": "0x11e",
"EventName": "push25_inst",
"BriefDescription": "V3 PUSH25 instructions"
},
{
"PublicDescription": "SYSCALL instructions",
"EventCode": "0x11f",
"EventName": "syscall_inst",
"BriefDescription": "V3 SYSCALL instructions"
},
{
"PublicDescription": "conditional branch miss",
"EventCode": "0x202",
"EventName": "cond_br_miss",
"BriefDescription": "V3 conditional branch miss"
},
{
"PublicDescription": "taken conditional branch miss",
"EventCode": "0x203",
"EventName": "taken_cond_br_miss",
"BriefDescription": "V3 taken conditional branch miss"
},
{
"PublicDescription": "Prefetch Instructions with cache hit",
"EventCode": "0x204",
"EventName": "prefetch_icache_hit",
"BriefDescription": "V3 Prefetch Instructions with cache hit"
},
{
"PublicDescription": "RET mispredict",
"EventCode": "0x205",
"EventName": "ret_mispredict",
"BriefDescription": "V3 RET mispredict"
},
{
"PublicDescription": "Immediate J instructions",
"EventCode": "0x206",
"EventName": "imm_j_inst",
"BriefDescription": "V3 Immediate J instructions"
},
{
"PublicDescription": "Multiply instructions",
"EventCode": "0x207",
"EventName": "mul_inst",
"BriefDescription": "V3 Multiply instructions"
},
{
"PublicDescription": "16 bits instructions",
"EventCode": "0x208",
"EventName": "sixteen_bits_inst",
"BriefDescription": "V3 16 bits instructions"
},
{
"PublicDescription": "Failed SCW instructions",
"EventCode": "0x209",
"EventName": "fail_scw_inst",
"BriefDescription": "V3 Failed SCW instructions"
},
{
"PublicDescription": "ld-after-st conflict replays",
"EventCode": "0x20a",
"EventName": "ld_af_st_conflict",
"BriefDescription": "V3 ld-after-st conflict replays"
},
{
"PublicDescription": "Exception taken",
"EventCode": "0x20c",
"EventName": "exception_taken",
"BriefDescription": "V3 Exception taken"
},
{
"PublicDescription": "Stores completed",
"EventCode": "0x20d",
"EventName": "store_completed",
"BriefDescription": "V3 Stores completed"
},
{
"PublicDescription": "uITLB miss",
"EventCode": "0x20e",
"EventName": "uitlb_miss",
"BriefDescription": "V3 uITLB miss"
},
{
"PublicDescription": "uDTLB miss",
"EventCode": "0x20f",
"EventName": "udtlb_miss",
"BriefDescription": "V3 uDTLB miss"
},
{
"PublicDescription": "MTLB miss",
"EventCode": "0x210",
"EventName": "mtlb_miss",
"BriefDescription": "V3 MTLB miss"
},
{
"PublicDescription": "Empty instructions queue stall cycles",
"EventCode": "0x212",
"EventName": "empty_inst_q_stall",
"BriefDescription": "V3 Empty instructions queue stall cycles"
},
{
"PublicDescription": "Data write back",
"EventCode": "0x213",
"EventName": "data_wb",
"BriefDescription": "V3 Data write back"
},
{
"PublicDescription": "DLM access",
"EventCode": "0x218",
"EventName": "dlm_access",
"BriefDescription": "V3 DLM access"
},
{
"PublicDescription": "LSU BIU request",
"EventCode": "0x219",
"EventName": "lsu_biu_req",
"BriefDescription": "V3 LSU BIU request"
},
{
"PublicDescription": "HPTWK BIU request",
"EventCode": "0x21a",
"EventName": "hptwk_biu_req",
"BriefDescription": "V3 HPTWK BIU request"
},
{
"PublicDescription": "DMA BIU request",
"EventCode": "0x21b",
"EventName": "dma_biu_req",
"BriefDescription": "V3 DMA BIU request"
},
{
"PublicDescription": "Icache fill BIU request",
"EventCode": "0x21c",
"EventName": "icache_fill_biu_req",
"BriefDescription": "V3 Icache fill BIU request"
},
{
"PublicDescription": "External events",
"EventCode": "0x21d",
"EventName": "external_events",
"BriefDescription": "V3 External events"
},
{
"PublicDescription": "POP25 instructions",
"EventCode": "0x21e",
"EventName": "pop25_inst",
"BriefDescription": "V3 POP25 instructions"
},
]