mirror of https://gitee.com/openkylin/linux.git
67 lines
1.3 KiB
C
67 lines
1.3 KiB
C
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/clock.h>
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#include "clk.h"
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/**
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* pll v1
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*
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* @clk_hw clock source
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* @parent the parent clock name
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* @base base address of pll registers
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*
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* PLL clock version 1, found on i.MX1/21/25/27/31/35
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*/
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struct clk_pllv1 {
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struct clk_hw hw;
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void __iomem *base;
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};
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#define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk))
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static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_pllv1 *pll = to_clk_pllv1(hw);
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return mxc_decode_pll(readl(pll->base), parent_rate);
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}
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struct clk_ops clk_pllv1_ops = {
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.recalc_rate = clk_pllv1_recalc_rate,
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};
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struct clk *imx_clk_pllv1(const char *name, const char *parent,
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void __iomem *base)
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{
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struct clk_pllv1 *pll;
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struct clk *clk;
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struct clk_init_data init;
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pll = kmalloc(sizeof(*pll), GFP_KERNEL);
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if (!pll)
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return ERR_PTR(-ENOMEM);
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pll->base = base;
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init.name = name;
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init.ops = &clk_pllv1_ops;
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init.flags = 0;
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init.parent_names = &parent;
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init.num_parents = 1;
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pll->hw.init = &init;
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clk = clk_register(NULL, &pll->hw);
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if (IS_ERR(clk))
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kfree(pll);
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return clk;
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}
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