2011-09-06 14:59:40 +08:00
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/errno.h>
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#include <asm/cacheflush.h>
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2012-05-22 22:13:46 +08:00
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#include <asm/cp15.h>
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2011-09-06 14:59:40 +08:00
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#include <mach/common.h>
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int platform_cpu_kill(unsigned int cpu)
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{
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return 1;
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}
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2012-05-22 22:13:46 +08:00
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static inline void cpu_enter_lowpower(void)
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{
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unsigned int v;
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flush_cache_all();
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asm volatile(
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"mcr p15, 0, %1, c7, c5, 0\n"
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" mcr p15, 0, %1, c7, c10, 4\n"
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/*
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* Turn off coherency
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, %3\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "r" (0), "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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static inline void cpu_leave_lowpower(void)
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{
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unsigned int v;
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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2011-09-06 14:59:40 +08:00
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void platform_cpu_die(unsigned int cpu)
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{
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2012-05-22 22:13:46 +08:00
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cpu_enter_lowpower();
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2011-09-06 14:59:40 +08:00
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imx_enable_cpu(cpu, false);
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cpu_do_idle();
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2012-05-22 22:13:46 +08:00
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cpu_leave_lowpower();
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2011-09-06 14:59:40 +08:00
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/* We should never return from idle */
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panic("cpu %d unexpectedly exit from shutdown\n", cpu);
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}
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int platform_cpu_disable(unsigned int cpu)
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{
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/*
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* we don't allow CPU 0 to be shutdown (it is still too special
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* e.g. clock tick interrupts)
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*/
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return cpu == 0 ? -EPERM : 0;
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}
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